On 01/19/2015 11:24 PM, Thomas Niederprüm wrote:

This patch fixes faulty behaviour in a setup where the input clock for the SRG is fed through the CLKR/CLKX pin but the McBSP is configured to be master (SND_SOC_DAIFMT_CBS_CFS). In that case of course CLKR/CLKX must not be configured as output pin. Otherwise the input clock is messed up horribly.

This patch makes it possible to use the CLKR/CLKX pin rather than CLKS to inject a reference clock in setups where McBSP is master and not both rx and tx are used. However for this to work it has to be ensured that set_dai_sysclk() is called after set_dai_fmt().

This was tested on a beagleboard-xm using McBSP1 to drive a i2s DAC through the tx lines (CLKX,FSX,DX). Using this patch the CLKR pin is used to inject an external reference clock.

changes since v1:

• added comments explaining the bit masking to disable output on CLKR/CLKX

Acked-by: Peter Ujfalusi peter.ujfalusi@ti.com

Signed-off-by: Thomas Niederprüm niederp@physik.uni-kl.de

sound/soc/omap/omap-mcbsp.c | 11 +++++++++++ 1 file changed, 11 insertions(+)

diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c index bd3ef2a..c37f606 100644 --- a/sound/soc/omap/omap-mcbsp.c +++ b/sound/soc/omap/omap-mcbsp.c @@ -530,8 +530,19 @@ static int omap_mcbsp_dai_set_dai_sysclk(struct snd_soc_dai *cpu_dai,

case OMAP_MCBSP_SYSCLK_CLKX_EXT: regs->srgr2 |= CLKSM;

• regs->pcr0	|= SCLKME;
  

• /*
  

•  * If McBSP is master but yet the CLKX/CLKR pin drives the SRG,
  

•  * disable output on those pins. This enables to inject the 
  

•  * reference clock through CLKX/CLKR. For this to work 
  

•  * set_dai_sysclk() _needs_ to be called after set_dai_fmt().
  

•  */
  

• regs->pcr0	&= ~CLKXM;
  

• break;
  

  case OMAP_MCBSP_SYSCLK_CLKR_EXT: regs->pcr0 |= SCLKME;

• /* Disable ouput on CLKR pin in master mode */
  

• regs->pcr0	&= ~CLKRM;
  

  break; default: err = -ENODEV;