[RESEND v2 0/3] Add audio device nodes for i.MX93 platform
changes in v2 - Move MQS device node under "/" root node - Convert fsl,mqs.txt to yaml
Tests pass based on broonie-sound/for-next.
Chancel Liu (3): arm64: dts: imx93: Add audio device nodes arm64: dts: imx93: Configure clock rate for audio PLL ASoC: dt-bindings: fsl,mqs: Convert format to json-schema
.../devicetree/bindings/sound/fsl,mqs.txt | 36 ------ .../devicetree/bindings/sound/fsl,mqs.yaml | 113 ++++++++++++++++++ arch/arm64/boot/dts/freescale/imx93.dtsi | 89 ++++++++++++++ 3 files changed, 202 insertions(+), 36 deletions(-) delete mode 100644 Documentation/devicetree/bindings/sound/fsl,mqs.txt create mode 100644 Documentation/devicetree/bindings/sound/fsl,mqs.yaml
-- 2.42.0
Add audio devices nodes including SAI, MICFIL, XCVR and MQS.
Signed-off-by: Chancel Liu chancel.liu@nxp.com --- arch/arm64/boot/dts/freescale/imx93.dtsi | 87 ++++++++++++++++++++++++ 1 file changed, 87 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi index ceccf4766440..9a7bff39519c 100644 --- a/arch/arm64/boot/dts/freescale/imx93.dtsi +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi @@ -171,6 +171,18 @@ cm33: remoteproc-cm33 { status = "disabled"; };
+ mqs1: mqs1 { + compatible = "fsl,imx93-mqs"; + gpr = <&aonmix_ns_gpr>; + status = "disabled"; + }; + + mqs2: mqs2 { + compatible = "fsl,imx93-mqs"; + gpr = <&wakeupmix_gpr>; + status = "disabled"; + }; + soc@0 { compatible = "simple-bus"; #address-cells = <1>; @@ -367,6 +379,19 @@ flexcan1: can@443a0000 { status = "disabled"; };
+ sai1: sai@443b0000 { + compatible = "fsl,imx93-sai"; + reg = <0x443b0000 0x10000>; + interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX93_CLK_SAI1_IPG>, <&clk IMX93_CLK_DUMMY>, + <&clk IMX93_CLK_SAI1_GATE>, <&clk IMX93_CLK_DUMMY>, + <&clk IMX93_CLK_DUMMY>; + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; + dmas = <&edma1 22 0 1>, <&edma1 21 0 0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + iomuxc: pinctrl@443c0000 { compatible = "fsl,imx93-iomuxc"; reg = <0x443c0000 0x10000>; @@ -447,6 +472,23 @@ tmu: tmu@44482000 { #thermal-sensor-cells = <1>; };
+ micfil: micfil@44520000 { + compatible = "fsl,imx93-micfil"; + reg = <0x44520000 0x10000>; + interrupts = <GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX93_CLK_PDM_IPG>, + <&clk IMX93_CLK_PDM_GATE>, + <&clk IMX93_CLK_AUDIO_PLL>, + <&clk IMX93_CLK_DUMMY>; + clock-names = "ipg_clk", "ipg_clk_app", + "pll8k", "clkext3"; + dmas = <&edma1 29 0 5>; + dma-names = "rx"; + status = "disabled"; + };
adc1: adc@44530000 { compatible = "nxp,imx93-adc"; @@ -738,6 +780,51 @@ flexspi1: spi@425e0000 { status = "disabled"; };
+ sai2: sai@42650000 { + compatible = "fsl,imx93-sai"; + reg = <0x42650000 0x10000>; + interrupts = <GIC_SPI 170 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX93_CLK_SAI2_IPG>, <&clk IMX93_CLK_DUMMY>, + <&clk IMX93_CLK_SAI2_GATE>, <&clk IMX93_CLK_DUMMY>, + <&clk IMX93_CLK_DUMMY>; + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; + dmas = <&edma2 59 0 1>, <&edma2 58 0 0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + sai3: sai@42660000 { + compatible = "fsl,imx93-sai"; + reg = <0x42660000 0x10000>; + interrupts = <GIC_SPI 171 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX93_CLK_SAI3_IPG>, <&clk IMX93_CLK_DUMMY>, + <&clk IMX93_CLK_SAI3_GATE>, <&clk IMX93_CLK_DUMMY>, + <&clk IMX93_CLK_DUMMY>; + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3"; + dmas = <&edma2 61 0 1>, <&edma2 60 0 0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + + xcvr: xcvr@42680000 { + compatible = "fsl,imx93-xcvr"; + reg = <0x42680000 0x800>, + <0x42680800 0x400>, + <0x42680c00 0x080>, + <0x42680e00 0x080>; + reg-names = "ram", "regs", "rxfifo", "txfifo"; + interrupts = <GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH>, + <GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH>; + clocks = <&clk IMX93_CLK_BUS_WAKEUP>, + <&clk IMX93_CLK_SPDIF_GATE>, + <&clk IMX93_CLK_DUMMY>, + <&clk IMX93_CLK_AUD_XCVR_GATE>; + clock-names = "ipg", "phy", "spba", "pll_ipg"; + dmas = <&edma2 65 0 1>, <&edma2 66 0 0>; + dma-names = "rx", "tx"; + status = "disabled"; + }; + lpuart7: serial@42690000 { compatible = "fsl,imx93-lpuart", "fsl,imx8ulp-lpuart", "fsl,imx7ulp-lpuart"; reg = <0x42690000 0x1000>;
Configure clock rate for audio PLL. There's one audio PLL on i.MX93. It is used as parent clock for clocks that are multiple of 8kHz.
Signed-off-by: Chancel Liu chancel.liu@nxp.com --- arch/arm64/boot/dts/freescale/imx93.dtsi | 2 ++ 1 file changed, 2 insertions(+)
diff --git a/arch/arm64/boot/dts/freescale/imx93.dtsi b/arch/arm64/boot/dts/freescale/imx93.dtsi index 9a7bff39519c..e6745801308e 100644 --- a/arch/arm64/boot/dts/freescale/imx93.dtsi +++ b/arch/arm64/boot/dts/freescale/imx93.dtsi @@ -420,6 +420,8 @@ clk: clock-controller@44450000 { #clock-cells = <1>; clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>; clock-names = "osc_32k", "osc_24m", "clk_ext1"; + assigned-clocks = <&clk IMX93_CLK_AUDIO_PLL>; + assigned-clock-rates = <393216000>; status = "okay"; };
Convert NXP medium quality sound (MQS) device tree binding documentation to json-schema.
Signed-off-by: Chancel Liu chancel.liu@nxp.com Reviewed-by: Rob Herring robh@kernel.org --- .../devicetree/bindings/sound/fsl,mqs.txt | 36 ------ .../devicetree/bindings/sound/fsl,mqs.yaml | 113 ++++++++++++++++++ 2 files changed, 113 insertions(+), 36 deletions(-) delete mode 100644 Documentation/devicetree/bindings/sound/fsl,mqs.txt create mode 100644 Documentation/devicetree/bindings/sound/fsl,mqs.yaml
diff --git a/Documentation/devicetree/bindings/sound/fsl,mqs.txt b/Documentation/devicetree/bindings/sound/fsl,mqs.txt deleted file mode 100644 index d66284b8bef2..000000000000 --- a/Documentation/devicetree/bindings/sound/fsl,mqs.txt +++ /dev/null @@ -1,36 +0,0 @@ -fsl,mqs audio CODEC - -Required properties: - - compatible : Must contain one of "fsl,imx6sx-mqs", "fsl,codec-mqs" - "fsl,imx8qm-mqs", "fsl,imx8qxp-mqs", "fsl,imx93-mqs". - - clocks : A list of phandles + clock-specifiers, one for each entry in - clock-names - - clock-names : "mclk" - must required. - "core" - required if compatible is "fsl,imx8qm-mqs", it - is for register access. - - gpr : A phandle of General Purpose Registers in IOMUX Controller. - Required if compatible is "fsl,imx6sx-mqs". - -Required if compatible is "fsl,imx8qm-mqs": - - power-domains: A phandle of PM domain provider node. - - reg: Offset and length of the register set for the device. - -Example: - -mqs: mqs { - compatible = "fsl,imx6sx-mqs"; - gpr = <&gpr>; - clocks = <&clks IMX6SX_CLK_SAI1>; - clock-names = "mclk"; - status = "disabled"; -}; - -mqs: mqs@59850000 { - compatible = "fsl,imx8qm-mqs"; - reg = <0x59850000 0x10000>; - clocks = <&clk IMX8QM_AUD_MQS_IPG>, - <&clk IMX8QM_AUD_MQS_HMCLK>; - clock-names = "core", "mclk"; - power-domains = <&pd_mqs0>; - status = "disabled"; -}; diff --git a/Documentation/devicetree/bindings/sound/fsl,mqs.yaml b/Documentation/devicetree/bindings/sound/fsl,mqs.yaml new file mode 100644 index 000000000000..c697b97f888e --- /dev/null +++ b/Documentation/devicetree/bindings/sound/fsl,mqs.yaml @@ -0,0 +1,113 @@ +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/fsl,mqs.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: NXP Medium Quality Sound (MQS) + +maintainers: + - Shengjiu Wang shengjiu.wang@nxp.com + - Chancel Liu chancel.liu@nxp.com + +description: | + Medium quality sound (MQS) is used to generate medium quality audio + via a standard GPIO in the pinmux, allowing the user to connect + stereo speakers or headphones to a power amplifier without an + additional DAC chip. + +properties: + compatible: + enum: + - fsl,imx6sx-mqs + - fsl,codec-mqs + - fsl,imx8qm-mqs + - fsl,imx8qxp-mqs + - fsl,imx93-mqs + + clocks: + minItems: 1 + maxItems: 2 + + clock-names: + minItems: 1 + maxItems: 2 + + gpr: + $ref: /schemas/types.yaml#/definitions/phandle + description: The phandle to the General Purpose Register (GPR) node + + reg: + maxItems: 1 + + power-domains: + maxItems: 1 + + resets: + maxItems: 1 + +required: + - compatible + - clocks + - clock-names + +allOf: + - if: + properties: + compatible: + contains: + const: fsl,imx8qm-mqs + then: + properties: + clocks: + items: + - description: Master clock + - description: Clock for register access + clock-names: + items: + - const: mclk + - const: core + required: + - reg + - power-domains + else: + properties: + clocks: + items: + - description: Master clock + clock-names: + items: + - const: mclk + + - if: + properties: + compatible: + contains: + enum: + - fsl,imx6sx-mqs + - fsl,imx93-mqs + then: + required: + - gpr + +additionalProperties: false + +examples: + - | + #include <dt-bindings/clock/imx6sx-clock.h> + mqs0: mqs { + compatible = "fsl,imx6sx-mqs"; + gpr = <&gpr>; + clocks = <&clks IMX6SX_CLK_SAI1>; + clock-names = "mclk"; + }; + + - | + #include <dt-bindings/firmware/imx/rsrc.h> + mqs1: mqs@59850000 { + compatible = "fsl,imx8qm-mqs"; + reg = <0x59850000 0x10000>; + clocks = <&mqs0_lpcg 0>, <&mqs0_lpcg 1>; + clock-names = "mclk", "core"; + power-domains = <&pd IMX_SC_R_MQS_0>; + };
On 20/11/2023 09:49, Chancel Liu wrote:
+allOf:
- if:
properties:
compatible:
contains:
const: fsl,imx8qm-mqs
- then:
properties:
clocks:
items:
- description: Master clock
- description: Clock for register access
clock-names:
items:
- const: mclk
- const: core
required:
- reg
- power-domains
- else:
properties:
clocks:
items:
- description: Master clock
clock-names:
items:
- const: mclk
- if:
properties:
compatible:
contains:
enum:
- fsl,imx6sx-mqs
- fsl,imx93-mqs
- then:
required:
- gpr
This is a bit confusing. Only "fsl,imx8qm-mqs" requires (uses?) reg. imx6sx and imx93 use gpr. Then what do the other variants use?
Best regards, Krzysztof
+allOf:
- if:
properties:
compatible:
contains:
const: fsl,imx8qm-mqs
- then:
properties:
clocks:
items:
- description: Master clock
- description: Clock for register access
clock-names:
items:
- const: mclk
- const: core
required:
- reg
- power-domains
- else:
properties:
clocks:
items:
- description: Master clock
clock-names:
items:
- const: mclk
- if:
properties:
compatible:
contains:
enum:
- fsl,imx6sx-mqs
- fsl,imx93-mqs
- then:
required:
- gpr
This is a bit confusing. Only "fsl,imx8qm-mqs" requires (uses?) reg. imx6sx and imx93 use gpr. Then what do the other variants use?
Best regards, Krzysztof
Thanks to your pointing out. I checked the history and found the legacy "fsl,codec-mqs" is not used anymore. I will drop it and also "fsl,imx8qxp-mqs" is completed which uses reg.
Regards, Chancel Liu
participants (2)
-
Chancel Liu
-
Krzysztof Kozlowski