[PATCH v2 0/3] soundwire: qcom: add pm runtime support
This patchset adds pm runtime support to Qualcomm SounWire Controller using SoundWire Clock Stop and Wake up using Headset events on supported instances and instances like WSA which do not support clock stop a soft reset of controller along with full rest of slaves is done to resume from a low power state.
Tested it on SM8250 MTP and Dragon Board DB845c
--srini
Changes since v1: - updated wake irq to not deal with slave pm runtime directly. - added delay after soft reset of SoundWire controller where clock stop is not supported
Srinivas Kandagatla (3): soundwire: qcom: add runtime pm support dt-bindings: soundwire: qcom: document optional wake irq soundwire: qcom: add in-band wake up interrupt support
.../bindings/soundwire/qcom,sdw.txt | 2 +- drivers/soundwire/qcom.c | 202 +++++++++++++++++- 2 files changed, 202 insertions(+), 2 deletions(-)
Add support to runtime PM using SoundWire clock stop Mode0 on supported controller instances and soft reset on instances that do not support clock stop.
Signed-off-by: Srinivas Kandagatla srinivas.kandagatla@linaro.org --- drivers/soundwire/qcom.c | 152 ++++++++++++++++++++++++++++++++++++++- 1 file changed, 151 insertions(+), 1 deletion(-)
diff --git a/drivers/soundwire/qcom.c b/drivers/soundwire/qcom.c index 54813417ef8e..2c763a9f088f 100644 --- a/drivers/soundwire/qcom.c +++ b/drivers/soundwire/qcom.c @@ -11,6 +11,7 @@ #include <linux/of.h> #include <linux/of_irq.h> #include <linux/of_device.h> +#include <linux/pm_runtime.h> #include <linux/regmap.h> #include <linux/slab.h> #include <linux/slimbus.h> @@ -20,6 +21,9 @@ #include <sound/soc.h> #include "bus.h"
+#define SWRM_COMP_SW_RESET 0x008 +#define SWRM_COMP_STATUS 0x014 +#define SWRM_FRM_GEN_ENABLED BIT(0) #define SWRM_COMP_HW_VERSION 0x00 #define SWRM_COMP_CFG_ADDR 0x04 #define SWRM_COMP_CFG_IRQ_LEVEL_OR_PULSE_MSK BIT(1) @@ -29,6 +33,7 @@ #define SWRM_COMP_PARAMS_RD_FIFO_DEPTH GENMASK(19, 15) #define SWRM_COMP_PARAMS_DOUT_PORTS_MASK GENMASK(4, 0) #define SWRM_COMP_PARAMS_DIN_PORTS_MASK GENMASK(9, 5) +#define SWRM_COMP_MASTER_ID 0x104 #define SWRM_INTERRUPT_STATUS 0x200 #define SWRM_INTERRUPT_STATUS_RMSK GENMASK(16, 0) #define SWRM_INTERRUPT_STATUS_SLAVE_PEND_IRQ BIT(0) @@ -111,6 +116,13 @@ #define SWR_MAX_CMD_ID 14 #define MAX_FIFO_RD_RETRY 3 #define SWR_OVERFLOW_RETRY_COUNT 30 +#define SWRM_LINK_STATUS_RETRY_CNT 100 + +enum { + MASTER_ID_WSA = 1, + MASTER_ID_RX, + MASTER_ID_TX +};
struct qcom_swrm_port_config { u8 si; @@ -159,6 +171,7 @@ struct qcom_swrm_ctrl { u32 slave_status; u32 wr_fifo_depth; u32 rd_fifo_depth; + bool clock_stop_not_supported; };
struct qcom_swrm_data { @@ -497,6 +510,7 @@ static irqreturn_t qcom_swrm_irq_handler(int irq, void *dev_id) u32 i; int devnum; int ret = IRQ_HANDLED; + clk_prepare_enable(swrm->hclk);
swrm->reg_read(swrm, SWRM_INTERRUPT_STATUS, &intr_sts); intr_sts_masked = intr_sts & swrm->intr_mask; @@ -604,6 +618,7 @@ static irqreturn_t qcom_swrm_irq_handler(int irq, void *dev_id) intr_sts_masked = intr_sts & swrm->intr_mask; } while (intr_sts_masked);
+ clk_disable_unprepare(swrm->hclk); return ret; }
@@ -1017,6 +1032,15 @@ static int qcom_swrm_startup(struct snd_pcm_substream *substream, struct snd_soc_dai *codec_dai; int ret, i;
+ ret = pm_runtime_get_sync(ctrl->dev); + if (ret < 0 && ret != -EACCES) { + dev_err_ratelimited(ctrl->dev, + "pm_runtime_get_sync failed in %s, ret %d\n", + __func__, ret); + pm_runtime_put_noidle(ctrl->dev); + return ret; + } + sruntime = sdw_alloc_stream(dai->name); if (!sruntime) return -ENOMEM; @@ -1044,6 +1068,9 @@ static void qcom_swrm_shutdown(struct snd_pcm_substream *substream,
sdw_release_stream(ctrl->sruntime[dai->id]); ctrl->sruntime[dai->id] = NULL; + pm_runtime_mark_last_busy(ctrl->dev); + pm_runtime_put_autosuspend(ctrl->dev); + }
static const struct snd_soc_dai_ops qcom_swrm_pdm_dai_ops = { @@ -1197,12 +1224,23 @@ static int qcom_swrm_get_port_config(struct qcom_swrm_ctrl *ctrl) static int swrm_reg_show(struct seq_file *s_file, void *data) { struct qcom_swrm_ctrl *swrm = s_file->private; - int reg, reg_val; + int reg, reg_val, ret; + + ret = pm_runtime_get_sync(swrm->dev); + if (ret < 0 && ret != -EACCES) { + dev_err_ratelimited(swrm->dev, + "pm_runtime_get_sync failed in %s, ret %d\n", + __func__, ret); + pm_runtime_put_noidle(swrm->dev); + }
for (reg = 0; reg <= SWR_MSTR_MAX_REG_ADDR; reg += 4) { swrm->reg_read(swrm, reg, ®_val); seq_printf(s_file, "0x%.3x: 0x%.2x\n", reg, reg_val); } + pm_runtime_mark_last_busy(swrm->dev); + pm_runtime_put_autosuspend(swrm->dev); +
return 0; } @@ -1267,6 +1305,7 @@ static int qcom_swrm_probe(struct platform_device *pdev) ctrl->bus.ops = &qcom_swrm_ops; ctrl->bus.port_ops = &qcom_swrm_port_ops; ctrl->bus.compute_params = &qcom_swrm_compute_params; + ctrl->bus.clk_stop_timeout = 300;
ret = qcom_swrm_get_port_config(ctrl); if (ret) @@ -1319,6 +1358,21 @@ static int qcom_swrm_probe(struct platform_device *pdev) (ctrl->version >> 24) & 0xff, (ctrl->version >> 16) & 0xff, ctrl->version & 0xffff);
+ pm_runtime_set_autosuspend_delay(dev, 3000); + pm_runtime_use_autosuspend(dev); + pm_runtime_mark_last_busy(dev); + pm_runtime_set_active(dev); + pm_runtime_enable(dev); + + /* Clk stop is not supported on WSA Soundwire masters */ + if (ctrl->version <= 0x01030000) { + ctrl->clock_stop_not_supported = true; + } else { + ctrl->reg_read(ctrl, SWRM_COMP_MASTER_ID, &val); + if (val == MASTER_ID_WSA) + ctrl->clock_stop_not_supported = true; + } + #ifdef CONFIG_DEBUG_FS ctrl->debugfs = debugfs_create_dir("qualcomm-sdw", ctrl->bus.debugfs); debugfs_create_file("qualcomm-registers", 0400, ctrl->debugfs, ctrl, @@ -1345,6 +1399,101 @@ static int qcom_swrm_remove(struct platform_device *pdev) return 0; }
+static bool swrm_wait_for_frame_gen_enabled(struct qcom_swrm_ctrl *swrm) +{ + int retry = SWRM_LINK_STATUS_RETRY_CNT; + int comp_sts; + + do { + swrm->reg_read(swrm, SWRM_COMP_STATUS, &comp_sts); + + if (comp_sts & SWRM_FRM_GEN_ENABLED) + return true; + + usleep_range(500, 510); + } while (retry--); + + dev_err(swrm->dev, "%s: link status not %s\n", __func__, + comp_sts && SWRM_FRM_GEN_ENABLED ? "connected" : "disconnected"); + + return false; +} + +static int swrm_runtime_resume(struct device *dev) +{ + struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dev); + int ret; + + clk_prepare_enable(ctrl->hclk); + + if (ctrl->clock_stop_not_supported) { + reinit_completion(&ctrl->enumeration); + ctrl->reg_write(ctrl, SWRM_COMP_SW_RESET, 0x01); + usleep_range(100, 105); + qcom_swrm_init(ctrl); + /* wait for hw enumeration to complete */ + wait_for_completion_timeout(&ctrl->enumeration, + msecs_to_jiffies(TIMEOUT_MS)); + qcom_swrm_get_device_status(ctrl); + sdw_handle_slave_status(&ctrl->bus, ctrl->status); + } else { + ctrl->reg_write(ctrl, SWRM_MCP_BUS_CTRL, SWRM_MCP_BUS_CLK_START); + ctrl->reg_write(ctrl, SWRM_INTERRUPT_CLEAR, + SWRM_INTERRUPT_STATUS_MASTER_CLASH_DET); + + ctrl->intr_mask |= SWRM_INTERRUPT_STATUS_MASTER_CLASH_DET; + ctrl->reg_write(ctrl, SWRM_INTERRUPT_MASK_ADDR, ctrl->intr_mask); + ctrl->reg_write(ctrl, SWRM_INTERRUPT_CPU_EN, ctrl->intr_mask); + + usleep_range(100, 105); + } + + if (!swrm_wait_for_frame_gen_enabled(ctrl)) + dev_err(ctrl->dev, "link failed to connect\n"); + + usleep_range(300, 305); + ret = sdw_bus_exit_clk_stop(&ctrl->bus); + if (ret < 0) + dev_err(ctrl->dev, "bus failed to exit clock stop %d\n", ret); + + return 0; +} + +static int __maybe_unused swrm_runtime_suspend(struct device *dev) +{ + struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dev); + int ret; + + if (!ctrl->clock_stop_not_supported) { + /* Mask bus clash interrupt */ + ctrl->intr_mask &= ~SWRM_INTERRUPT_STATUS_MASTER_CLASH_DET; + ctrl->reg_write(ctrl, SWRM_INTERRUPT_MASK_ADDR, ctrl->intr_mask); + ctrl->reg_write(ctrl, SWRM_INTERRUPT_CPU_EN, ctrl->intr_mask); + } + /* Prepare slaves for clock stop */ + ret = sdw_bus_prep_clk_stop(&ctrl->bus); + if (ret < 0) { + dev_err(dev, "prepare clock stop failed %d", ret); + return ret; + } + + ret = sdw_bus_clk_stop(&ctrl->bus); + if (ret < 0 && ret != -ENODATA) { + dev_err(dev, "bus clock stop failed %d", ret); + return ret; + } + + clk_disable_unprepare(ctrl->hclk); + + usleep_range(300, 305); + + return 0; +} + +static const struct dev_pm_ops swrm_dev_pm_ops = { + SET_RUNTIME_PM_OPS(swrm_runtime_suspend, swrm_runtime_resume, NULL) +}; + static const struct of_device_id qcom_swrm_of_match[] = { { .compatible = "qcom,soundwire-v1.3.0", .data = &swrm_v1_3_data }, { .compatible = "qcom,soundwire-v1.5.1", .data = &swrm_v1_5_data }, @@ -1359,6 +1508,7 @@ static struct platform_driver qcom_swrm_driver = { .driver = { .name = "qcom-soundwire", .of_match_table = qcom_swrm_of_match, + .pm = &swrm_dev_pm_ops, } }; module_platform_driver(qcom_swrm_driver);
static const struct snd_soc_dai_ops qcom_swrm_pdm_dai_ops = { @@ -1197,12 +1224,23 @@ static int qcom_swrm_get_port_config(struct qcom_swrm_ctrl *ctrl) static int swrm_reg_show(struct seq_file *s_file, void *data) { struct qcom_swrm_ctrl *swrm = s_file->private;
- int reg, reg_val;
int reg, reg_val, ret;
ret = pm_runtime_get_sync(swrm->dev);
if (ret < 0 && ret != -EACCES) {
dev_err_ratelimited(swrm->dev,
"pm_runtime_get_sync failed in %s, ret %d\n",
__func__, ret);
pm_runtime_put_noidle(swrm->dev);
}
for (reg = 0; reg <= SWR_MSTR_MAX_REG_ADDR; reg += 4) { swrm->reg_read(swrm, reg, ®_val); seq_printf(s_file, "0x%.3x: 0x%.2x\n", reg, reg_val); }
pm_runtime_mark_last_busy(swrm->dev);
pm_runtime_put_autosuspend(swrm->dev);
question: is there a reason why this specific set of reg_read() is surrounded pm_runtime stuff? Is this saying that in all other case where the callback is used, the controller is already resumed and fully operational? That's be worthy of a comment.
struct qcom_swrm_ctrl *swrm struct qcom_swrm_ctrl *ctrl
nit-pick: it helps reviewers when the same variable name is used consistently.
+static int __maybe_unused swrm_runtime_suspend(struct device *dev) +{
- struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dev);
- int ret;
- if (!ctrl->clock_stop_not_supported) {
/* Mask bus clash interrupt */
ctrl->intr_mask &= ~SWRM_INTERRUPT_STATUS_MASTER_CLASH_DET;
ctrl->reg_write(ctrl, SWRM_INTERRUPT_MASK_ADDR, ctrl->intr_mask);
ctrl->reg_write(ctrl, SWRM_INTERRUPT_CPU_EN, ctrl->intr_mask);
- }
- /* Prepare slaves for clock stop */
- ret = sdw_bus_prep_clk_stop(&ctrl->bus);
- if (ret < 0) {
if (ret < 0 && ret != -ENODATA) {
?
dev_err(dev, "prepare clock stop failed %d", ret);
return ret;
- }
- ret = sdw_bus_clk_stop(&ctrl->bus);
- if (ret < 0 && ret != -ENODATA) {
dev_err(dev, "bus clock stop failed %d", ret);
return ret;
- }
- clk_disable_unprepare(ctrl->hclk);
- usleep_range(300, 305);
- return 0;
+}
On 24/02/2022 15:41, Pierre-Louis Bossart wrote:
static const struct snd_soc_dai_ops qcom_swrm_pdm_dai_ops = { @@ -1197,12 +1224,23 @@ static int qcom_swrm_get_port_config(struct qcom_swrm_ctrl *ctrl) static int swrm_reg_show(struct seq_file *s_file, void *data) { struct qcom_swrm_ctrl *swrm = s_file->private;
- int reg, reg_val;
int reg, reg_val, ret;
ret = pm_runtime_get_sync(swrm->dev);
if (ret < 0 && ret != -EACCES) {
dev_err_ratelimited(swrm->dev,
"pm_runtime_get_sync failed in %s, ret %d\n",
__func__, ret);
pm_runtime_put_noidle(swrm->dev);
}
for (reg = 0; reg <= SWR_MSTR_MAX_REG_ADDR; reg += 4) { swrm->reg_read(swrm, reg, ®_val); seq_printf(s_file, "0x%.3x: 0x%.2x\n", reg, reg_val); }
pm_runtime_mark_last_busy(swrm->dev);
pm_runtime_put_autosuspend(swrm->dev);
question: is there a reason why this specific set of reg_read() is surrounded pm_runtime stuff? Is this saying that in all other case where the callback is used, the controller is already resumed and fully operational? That's be worthy of a comment.
controller register reads require clk to be ON, which might not be always ON. In suspended case we switch off the clocks.
Other places so far that I have seen is that controller is either already resumed or clk is on (interrupt case) and resume case.
struct qcom_swrm_ctrl *swrm struct qcom_swrm_ctrl *ctrl
nit-pick: it helps reviewers when the same variable name is used consistently.
Yes, I did notice this, but for some reason I forgot to fix it.
+static int __maybe_unused swrm_runtime_suspend(struct device *dev) +{
- struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dev);
- int ret;
- if (!ctrl->clock_stop_not_supported) {
/* Mask bus clash interrupt */
ctrl->intr_mask &= ~SWRM_INTERRUPT_STATUS_MASTER_CLASH_DET;
ctrl->reg_write(ctrl, SWRM_INTERRUPT_MASK_ADDR, ctrl->intr_mask);
ctrl->reg_write(ctrl, SWRM_INTERRUPT_CPU_EN, ctrl->intr_mask);
- }
- /* Prepare slaves for clock stop */
- ret = sdw_bus_prep_clk_stop(&ctrl->bus);
- if (ret < 0) {
if (ret < 0 && ret != -ENODATA) {
?
dev_err(dev, "prepare clock stop failed %d", ret);
return ret;
- }
- ret = sdw_bus_clk_stop(&ctrl->bus);
- if (ret < 0 && ret != -ENODATA) {
dev_err(dev, "bus clock stop failed %d", ret);
return ret;
- }
- clk_disable_unprepare(ctrl->hclk);
- usleep_range(300, 305);
- return 0;
+}
Wake IRQ is optional interrupt that can be wired up on SoundWire controller instances like RX path along with MBHC(Multi Button Headset connection). Document this in bindings.
Signed-off-by: Srinivas Kandagatla srinivas.kandagatla@linaro.org --- Documentation/devicetree/bindings/soundwire/qcom,sdw.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt b/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt index b93a2b3e029d..bade68f429b0 100644 --- a/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt +++ b/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt @@ -22,7 +22,7 @@ board specific bus parameters. - interrupts: Usage: required Value type: <prop-encoded-array> - Definition: should specify the SoundWire Controller IRQ + Definition: should specify the SoundWire Controller and optional wake IRQ
- clock-names: Usage: required
On Thu, Feb 24, 2022 at 01:31:24PM +0000, Srinivas Kandagatla wrote:
Wake IRQ is optional interrupt that can be wired up on SoundWire controller instances like RX path along with MBHC(Multi Button Headset connection). Document this in bindings.
Signed-off-by: Srinivas Kandagatla srinivas.kandagatla@linaro.org
Documentation/devicetree/bindings/soundwire/qcom,sdw.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt b/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt index b93a2b3e029d..bade68f429b0 100644 --- a/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt +++ b/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt @@ -22,7 +22,7 @@ board specific bus parameters.
- interrupts: Usage: required Value type: <prop-encoded-array>
- Definition: should specify the SoundWire Controller IRQ
- Definition: should specify the SoundWire Controller and optional wake IRQ
What about 'wakeup-source' property?
- clock-names: Usage: required
-- 2.21.0
On 25/02/2022 20:21, Rob Herring wrote:
On Thu, Feb 24, 2022 at 01:31:24PM +0000, Srinivas Kandagatla wrote:
Wake IRQ is optional interrupt that can be wired up on SoundWire controller instances like RX path along with MBHC(Multi Button Headset connection). Document this in bindings.
Signed-off-by: Srinivas Kandagatla srinivas.kandagatla@linaro.org
Documentation/devicetree/bindings/soundwire/qcom,sdw.txt | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt b/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt index b93a2b3e029d..bade68f429b0 100644 --- a/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt +++ b/Documentation/devicetree/bindings/soundwire/qcom,sdw.txt @@ -22,7 +22,7 @@ board specific bus parameters.
- interrupts:
Usage: required Value type: <prop-encoded-array>
- Definition: should specify the SoundWire Controller IRQ
- Definition: should specify the SoundWire Controller and optional wake IRQ
What about 'wakeup-source' property?
Thanks for the hint, I was not aware of this flag. Will add this in next version.
--srini
- clock-names:
Usage: required
2.21.0
Some of the Qualcomm SoundWire Controller instances like the ones that are connected to RX path along with Headset connections support Waking up Controller from Low power clock stop state using SoundWire In-band interrupt. SoundWire Slave on the bus would intiate this by pulling the data line high, during clock stop condition.
Add support to this wake up interrupt.
Signed-off-by: Srinivas Kandagatla srinivas.kandagatla@linaro.org --- drivers/soundwire/qcom.c | 50 ++++++++++++++++++++++++++++++++++++++++ 1 file changed, 50 insertions(+)
diff --git a/drivers/soundwire/qcom.c b/drivers/soundwire/qcom.c index 2c763a9f088f..27cfe4e05206 100644 --- a/drivers/soundwire/qcom.c +++ b/drivers/soundwire/qcom.c @@ -14,6 +14,7 @@ #include <linux/pm_runtime.h> #include <linux/regmap.h> #include <linux/slab.h> +#include <linux/pm_wakeirq.h> #include <linux/slimbus.h> #include <linux/soundwire/sdw.h> #include <linux/soundwire/sdw_registers.h> @@ -154,6 +155,7 @@ struct qcom_swrm_ctrl { u8 rd_cmd_id; int irq; unsigned int version; + int wake_irq; int num_din_ports; int num_dout_ports; int cols_index; @@ -503,6 +505,31 @@ static int qcom_swrm_enumerate(struct sdw_bus *bus) return 0; }
+static irqreturn_t qcom_swrm_wake_irq_handler(int irq, void *dev_id) +{ + struct qcom_swrm_ctrl *swrm = dev_id; + int ret; + + ret = pm_runtime_get_sync(swrm->dev); + if (ret < 0 && ret != -EACCES) { + dev_err_ratelimited(swrm->dev, + "pm_runtime_get_sync failed in %s, ret %d\n", + __func__, ret); + pm_runtime_put_noidle(swrm->dev); + } + + if (swrm->wake_irq > 0) { + if (!irqd_irq_disabled(irq_get_irq_data(swrm->wake_irq))) + disable_irq_nosync(swrm->wake_irq); + } + + pm_runtime_mark_last_busy(swrm->dev); + pm_runtime_put_autosuspend(swrm->dev); + + return IRQ_HANDLED; +} + + static irqreturn_t qcom_swrm_irq_handler(int irq, void *dev_id) { struct qcom_swrm_ctrl *swrm = dev_id; @@ -1340,6 +1367,19 @@ static int qcom_swrm_probe(struct platform_device *pdev) goto err_clk; }
+ ctrl->wake_irq = of_irq_get(dev->of_node, 1); + if (ctrl->wake_irq > 0) { + ret = devm_request_threaded_irq(dev, ctrl->wake_irq, NULL, + qcom_swrm_wake_irq_handler, + IRQF_TRIGGER_HIGH | IRQF_ONESHOT, + "swr_wake_irq", ctrl); + if (ret) { + dev_err(dev, "Failed to request soundwire wake irq\n"); + goto err_init; + } + } + + ret = sdw_bus_master_add(&ctrl->bus, dev, dev->fwnode); if (ret) { dev_err(dev, "Failed to register Soundwire controller (%d)\n", @@ -1424,6 +1464,11 @@ static int swrm_runtime_resume(struct device *dev) struct qcom_swrm_ctrl *ctrl = dev_get_drvdata(dev); int ret;
+ if (ctrl->wake_irq > 0) { + if (!irqd_irq_disabled(irq_get_irq_data(ctrl->wake_irq))) + disable_irq_nosync(ctrl->wake_irq); + } + clk_prepare_enable(ctrl->hclk);
if (ctrl->clock_stop_not_supported) { @@ -1487,6 +1532,11 @@ static int __maybe_unused swrm_runtime_suspend(struct device *dev)
usleep_range(300, 305);
+ if (ctrl->wake_irq > 0) { + if (irqd_irq_disabled(irq_get_irq_data(ctrl->wake_irq))) + enable_irq(ctrl->wake_irq); + } + return 0; }
On 2/24/22 07:31, Srinivas Kandagatla wrote:
Some of the Qualcomm SoundWire Controller instances like the ones that are connected to RX path along with Headset connections support Waking up Controller from Low power clock stop state using SoundWire In-band interrupt. SoundWire Slave on the bus would intiate this by pulling the data line high,
typo: initiate
during clock stop condition.
while the clock is stopped.
A peripheral cannot generate an interrupt after a successful completion of a write to the ClockStopNow bitfield.
participants (3)
-
Pierre-Louis Bossart
-
Rob Herring
-
Srinivas Kandagatla