[alsa-devel] [PATCH_V3 0/4] sound:soc: jz4740: DT, dynamic sampling, enable clocks
Hi,
Here are a few simple patches for the jz4740.
First adds dynamic sampling support to jz4740-i2s. Then two to add a simple binding and DT support. Then a patch to set the clock rate for i2s.
These are in preparation for jz4780 and ci20 later on.
Patches are based on 3.19-rc6. Quite disjoint and stay within jz4740 so should apply easily on other trees.
If you would like to have them rebased to a different tree, please tell.
Thank-you
V3 changes: Added dma binding to example but forgot to put it in required properties.
V2 changes: Removed a redundant #define Added #ifdef CONFIG_OF Added dma in binding document Removed a redundant call to clk_prepare_enable
Zubair Lutfullah Kakakhel (4): sound: soc: jz4740: Add dynamic sampling rate support to jz4740-i2s dt: sound: jz4740: Add binding documentation for jz4740-i2s sound: soc: jz4740: Add DT support to jz4740-i2s driver sound: jz4740: set i2s clk rate to 12MHz
.../bindings/sound/ingenic,jz4740-i2s.txt | 23 ++++++++++++++++++++++ sound/soc/jz4740/jz4740-i2s.c | 22 ++++++++++++++++++++- 2 files changed, 44 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/sound/ingenic,jz4740-i2s.txt
The div clock register is not modified during jz4740_i2s_hw_params. Hence, default sampling rates are actually used regardless of sampling rates input from userspace.
This patch adds support to calculate the value of the divider from the parameters passed from userspace and update the relevant div registers
Signed-off-by: Zubair Lutfullah Kakakhel Zubair.Kakakhel@imgtec.com
--- V2 changes: Removed a redundant #define --- sound/soc/jz4740/jz4740-i2s.c | 11 ++++++++++- 1 file changed, 10 insertions(+), 1 deletion(-)
diff --git a/sound/soc/jz4740/jz4740-i2s.c b/sound/soc/jz4740/jz4740-i2s.c index d3d45c6..b7a7e82 100644 --- a/sound/soc/jz4740/jz4740-i2s.c +++ b/sound/soc/jz4740/jz4740-i2s.c @@ -83,6 +83,8 @@ #define JZ_AIC_I2S_STATUS_BUSY BIT(2)
#define JZ_AIC_CLK_DIV_MASK 0xf +#define I2SDIV_DV_SHIFT 8 +#define I2SDIV_DV_MASK (0xf << I2SDIV_DV_SHIFT)
struct jz4740_i2s { struct resource *mem; @@ -237,10 +239,14 @@ static int jz4740_i2s_hw_params(struct snd_pcm_substream *substream, { struct jz4740_i2s *i2s = snd_soc_dai_get_drvdata(dai); unsigned int sample_size; - uint32_t ctrl; + uint32_t ctrl, div_reg; + int div;
ctrl = jz4740_i2s_read(i2s, JZ_REG_AIC_CTRL);
+ div_reg = jz4740_i2s_read(i2s, JZ_REG_AIC_CLK_DIV); + div = clk_get_rate(i2s->clk_i2s) / (64 * params_rate(params)); + switch (params_format(params)) { case SNDRV_PCM_FORMAT_S8: sample_size = 0; @@ -264,7 +270,10 @@ static int jz4740_i2s_hw_params(struct snd_pcm_substream *substream, ctrl |= sample_size << JZ_AIC_CTRL_INPUT_SAMPLE_SIZE_OFFSET; }
+ div_reg &= ~I2SDIV_DV_MASK; + div_reg |= (div - 1) << I2SDIV_DV_SHIFT; jz4740_i2s_write(i2s, JZ_REG_AIC_CTRL, ctrl); + jz4740_i2s_write(i2s, JZ_REG_AIC_CLK_DIV, div_reg);
return 0; }
This patch adds binding for the jz4740-i2s driver.
Signed-off-by: Zubair Lutfullah Kakakhel Zubair.Kakakhel@imgtec.com
--- The jz4740 is platform only at the moment.
But DT support is being added
See http://patchwork.linux-mips.org/bundle/paulburton/ci20-v3.20/
V3 changes: Missed out adding dma bindings in required properties. Only put them in example node for V2.
V2 changes: Added DMA bindings for later on --- .../bindings/sound/ingenic,jz4740-i2s.txt | 23 ++++++++++++++++++++++ 1 file changed, 23 insertions(+) create mode 100644 Documentation/devicetree/bindings/sound/ingenic,jz4740-i2s.txt
diff --git a/Documentation/devicetree/bindings/sound/ingenic,jz4740-i2s.txt b/Documentation/devicetree/bindings/sound/ingenic,jz4740-i2s.txt new file mode 100644 index 0000000..b414333 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/ingenic,jz4740-i2s.txt @@ -0,0 +1,23 @@ +Ingenic JZ4740 I2S controller + +Required properties: +- compatible : "ingenic,jz4740-i2s" +- reg : I2S registers location and length +- clocks : AIC and I2S PLL clock specifiers. +- clock-names: "aic" and "i2s" +- dmas: DMA controller phandle and DMA request line for I2S Tx and Rx channels +- dma-names: Must be "tx" and "rx" + +Example: + +i2s: i2s@10020000 { + compatible = "ingenic,jz4740-i2s"; + reg = <0x10020000 0x94>; + + clocks = <&cgu JZ4740_CLK_AIC>, <&cgu JZ4740_CLK_I2SPLL>; + clock-names = "aic", "i2s"; + + dmas = <&dma 2>, <&dma 3>; + dma-names = "tx", "rx"; + +};
This patch adds device tree support for the jz4740 driver.
Signed-off-by: Zubair Lutfullah Kakakhel Zubair.Kakakhel@imgtec.com
--- V2 changes: Added ifdef config_of --- sound/soc/jz4740/jz4740-i2s.c | 10 ++++++++++ 1 file changed, 10 insertions(+)
diff --git a/sound/soc/jz4740/jz4740-i2s.c b/sound/soc/jz4740/jz4740-i2s.c index b7a7e82..07f7781 100644 --- a/sound/soc/jz4740/jz4740-i2s.c +++ b/sound/soc/jz4740/jz4740-i2s.c @@ -14,6 +14,8 @@
#include <linux/init.h> #include <linux/io.h> +#include <linux/of.h> +#include <linux/of_device.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/platform_device.h> @@ -424,6 +426,13 @@ static const struct snd_soc_component_driver jz4740_i2s_component = { .name = "jz4740-i2s", };
+#ifdef CONFIG_OF +static const struct of_device_id jz4740_of_matches[] = { + { .compatible = "ingenic,jz4740-i2s" }, + { /* sentinel */ } +}; +#endif + static int jz4740_i2s_dev_probe(struct platform_device *pdev) { struct jz4740_i2s *i2s; @@ -464,6 +473,7 @@ static struct platform_driver jz4740_i2s_driver = { .probe = jz4740_i2s_dev_probe, .driver = { .name = "jz4740-i2s", + .of_match_table = of_match_ptr(jz4740_of_matches) }, };
i2s clock rate is not set to 12MHz currently. Set it before enabling the clock.
Signed-off-by: Zubair Lutfullah Kakakhel Zubair.Kakakhel@imgtec.com
--- V2 changes: Removed clk_prepare_enable call as clock was already being enabled elsewhere. Just set rate to 12MHz. --- sound/soc/jz4740/jz4740-i2s.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/sound/soc/jz4740/jz4740-i2s.c b/sound/soc/jz4740/jz4740-i2s.c index 07f7781..c2e5852 100644 --- a/sound/soc/jz4740/jz4740-i2s.c +++ b/sound/soc/jz4740/jz4740-i2s.c @@ -125,6 +125,7 @@ static int jz4740_i2s_startup(struct snd_pcm_substream *substream, ctrl |= JZ_AIC_CTRL_FLUSH; jz4740_i2s_write(i2s, JZ_REG_AIC_CTRL, ctrl);
+ clk_set_rate(i2s->clk_i2s, 12000000); clk_prepare_enable(i2s->clk_i2s);
conf = jz4740_i2s_read(i2s, JZ_REG_AIC_CONF);
On 26/01/15 14:53, Zubair Lutfullah Kakakhel wrote:
i2s clock rate is not set to 12MHz currently. Set it before enabling the clock.
Signed-off-by: Zubair Lutfullah Kakakhel Zubair.Kakakhel@imgtec.com
V2 changes: Removed clk_prepare_enable call as clock was already being enabled elsewhere. Just set rate to 12MHz.
sound/soc/jz4740/jz4740-i2s.c | 1 + 1 file changed, 1 insertion(+)
diff --git a/sound/soc/jz4740/jz4740-i2s.c b/sound/soc/jz4740/jz4740-i2s.c index 07f7781..c2e5852 100644 --- a/sound/soc/jz4740/jz4740-i2s.c +++ b/sound/soc/jz4740/jz4740-i2s.c @@ -125,6 +125,7 @@ static int jz4740_i2s_startup(struct snd_pcm_substream *substream, ctrl |= JZ_AIC_CTRL_FLUSH; jz4740_i2s_write(i2s, JZ_REG_AIC_CTRL, ctrl);
- clk_set_rate(i2s->clk_i2s, 12000000);
Lars recommended using dt and assigned-clock-rates for this. (irc) I've checked and it can be done.
This patch is not needed.
Patch 1-3 in this series are OK. This last one can be skipped.
Do you want me to repost the series without it? Or is this fine?
Thanks, ZubairLK
clk_prepare_enable(i2s->clk_i2s);
conf = jz4740_i2s_read(i2s, JZ_REG_AIC_CONF);
On 01/26/2015 03:53 PM, Zubair Lutfullah Kakakhel wrote:
Hi,
Here are a few simple patches for the jz4740.
For 1-3:
Acked-by: Lars-Peter Clausen lars@metafoo.de
participants (2)
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Lars-Peter Clausen -
Zubair Lutfullah Kakakhel