[PATCH 0/2] ASoC: ti: j721e-evm: Support for j7200 variant
Hi,
When j7200 SOM is connected to the CPB, the audio setup is a bit different: Only 48KHz family have clock path, 44.1KHz is not supported.
Update the binding documentation and add support for the j7200 version of CPB to the driver.
Regards, Peter --- Peter Ujfalusi (2): ASoC: dt-bindings: ti,j721e-cpb-audio: Document support for j7200-cpb ASoC: ti: j721e-evm: Add support for j7200-cpb audio
.../bindings/sound/ti,j721e-cpb-audio.yaml | 92 ++++++++++++++----- sound/soc/ti/j721e-evm.c | 11 +++ 2 files changed, 81 insertions(+), 22 deletions(-)
j721e or j7200 SOM can be attached to the same Common Processor Board (CPB)
With the j7200 SOM only the 48KHz family parent clock is available and McASP0 is used for the audio.
Signed-off-by: Peter Ujfalusi peter.ujfalusi@ti.com --- .../bindings/sound/ti,j721e-cpb-audio.yaml | 92 ++++++++++++++----- 1 file changed, 70 insertions(+), 22 deletions(-)
diff --git a/Documentation/devicetree/bindings/sound/ti,j721e-cpb-audio.yaml b/Documentation/devicetree/bindings/sound/ti,j721e-cpb-audio.yaml index d52cfbeb2d07..805da4d6a88e 100644 --- a/Documentation/devicetree/bindings/sound/ti,j721e-cpb-audio.yaml +++ b/Documentation/devicetree/bindings/sound/ti,j721e-cpb-audio.yaml @@ -18,18 +18,25 @@ description: | PLL15 (for 44.1KHz). The same PLLs are used for McASP10's AUXCLK clock via different HSDIVIDER.
- Clocking setup for 48KHz family: - PLL4 ---> PLL4_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk - |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI + Clocking setup for j721e: + 48KHz family: + PLL4 ---> PLL4_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk + |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI
- Clocking setup for 44.1KHz family: - PLL15 ---> PLL15_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk - |-> PLL15_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI + 44.1KHz family: + PLL15 ---> PLL15_HSDIV0 ---> MCASP10_AUXCLK ---> McASP10.auxclk + |-> PLL15_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI + + Clocking setup for j7200: + 48KHz family: + PLL4 ---> PLL4_HSDIV0 ---> MCASP0_AUXCLK ---> McASP0.auxclk + |-> PLL4_HSDIV2 ---> AUDIO_REFCLK2 ---> pcm3168a.SCKI
properties: compatible: - items: - - const: ti,j721e-cpb-audio + enum: + - ti,j721e-cpb-audio + - ti,j7200-cpb-audio
model: $ref: /schemas/types.yaml#/definitions/string @@ -44,22 +51,12 @@ properties: $ref: /schemas/types.yaml#/definitions/phandle
clocks: - items: - - description: AUXCLK clock for McASP used by CPB audio - - description: Parent for CPB_McASP auxclk (for 48KHz) - - description: Parent for CPB_McASP auxclk (for 44.1KHz) - - description: SCKI clock for the pcm3168a codec on CPB - - description: Parent for CPB_SCKI clock (for 48KHz) - - description: Parent for CPB_SCKI clock (for 44.1KHz) + minItems: 4 + maxItems: 6
clock-names: - items: - - const: cpb-mcasp-auxclk - - const: cpb-mcasp-auxclk-48000 - - const: cpb-mcasp-auxclk-44100 - - const: cpb-codec-scki - - const: cpb-codec-scki-48000 - - const: cpb-codec-scki-44100 + minItems: 4 + maxItems: 6
required: - compatible @@ -71,6 +68,57 @@ required:
additionalProperties: false
+allOf: + - if: + properties: + compatible: + contains: + const: ti,j721e-cpb-audio + + then: + properties: + clocks: + minItems: 6 + items: + - description: AUXCLK clock for McASP used by CPB audio + - description: Parent for CPB_McASP auxclk (for 48KHz) + - description: Parent for CPB_McASP auxclk (for 44.1KHz) + - description: SCKI clock for the pcm3168a codec on CPB + - description: Parent for CPB_SCKI clock (for 48KHz) + - description: Parent for CPB_SCKI clock (for 44.1KHz) + + clock-names: + items: + - const: cpb-mcasp-auxclk + - const: cpb-mcasp-auxclk-48000 + - const: cpb-mcasp-auxclk-44100 + - const: cpb-codec-scki + - const: cpb-codec-scki-48000 + - const: cpb-codec-scki-44100 + + - if: + properties: + compatible: + contains: + const: ti,j7200-cpb-audio + + then: + properties: + clocks: + maxItems: 4 + items: + - description: AUXCLK clock for McASP used by CPB audio + - description: Parent for CPB_McASP auxclk (for 48KHz) + - description: SCKI clock for the pcm3168a codec on CPB + - description: Parent for CPB_SCKI clock (for 48KHz) + + clock-names: + items: + - const: cpb-mcasp-auxclk + - const: cpb-mcasp-auxclk-48000 + - const: cpb-codec-scki + - const: cpb-codec-scki-48000 + examples: - |+ sound {
When j7200 SOM is attached to the CPB we only have parent clock for 48KHz family and the rate of the parent clock is 2359296000Hz.
Signed-off-by: Peter Ujfalusi peter.ujfalusi@ti.com --- sound/soc/ti/j721e-evm.c | 11 +++++++++++ 1 file changed, 11 insertions(+)
diff --git a/sound/soc/ti/j721e-evm.c b/sound/soc/ti/j721e-evm.c index cb074af47a7d..f66674fd5f64 100644 --- a/sound/soc/ti/j721e-evm.c +++ b/sound/soc/ti/j721e-evm.c @@ -525,6 +525,14 @@ static const struct j721e_audio_match_data j721e_cpb_ivi_data = { }, };
+static const struct j721e_audio_match_data j7200_cpb_data = { + .board_type = J721E_BOARD_CPB, + .num_links = 2, /* CPB pcm3168a */ + .pll_rates = { + [J721E_CLK_PARENT_48000] = 2359296000, /* PLL4 */ + }, +}; + static const struct of_device_id j721e_audio_of_match[] = { { .compatible = "ti,j721e-cpb-audio", @@ -532,6 +540,9 @@ static const struct of_device_id j721e_audio_of_match[] = { }, { .compatible = "ti,j721e-cpb-ivi-audio", .data = &j721e_cpb_ivi_data, + }, { + .compatible = "ti,j7200-cpb-audio", + .data = &j7200_cpb_data, }, { }, };
Hi Peter,
I love your patch! Perhaps something to improve:
[auto build test WARNING on asoc/for-next] [also build test WARNING on v5.9-rc4 next-20200909] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Peter-Ujfalusi/ASoC-ti-j721e-evm-Su... base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next config: m68k-allmodconfig (attached as .config) compiler: m68k-linux-gcc (GCC) 9.3.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=m68k
If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot lkp@intel.com
All warnings (new ones prefixed by >>):
sound/soc/ti/j721e-evm.c:532:3: warning: this decimal constant is unsigned only in ISO C90
532 | [J721E_CLK_PARENT_48000] = 2359296000, /* PLL4 */ | ^
# https://github.com/0day-ci/linux/commit/63afa4709f3914bb58dd727c1119c447a23c... git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Peter-Ujfalusi/ASoC-ti-j721e-evm-Support-for-j7200-variant/20200910-155534 git checkout 63afa4709f3914bb58dd727c1119c447a23ce150 vim +532 sound/soc/ti/j721e-evm.c
527 528 static const struct j721e_audio_match_data j7200_cpb_data = { 529 .board_type = J721E_BOARD_CPB, 530 .num_links = 2, /* CPB pcm3168a */ 531 .pll_rates = {
532 [J721E_CLK_PARENT_48000] = 2359296000, /* PLL4 */
533 }, 534 }; 535
--- 0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
Hi,
On 10/09/2020 12.54, kernel test robot wrote:
Hi Peter,
I love your patch! Perhaps something to improve:
[auto build test WARNING on asoc/for-next] [also build test WARNING on v5.9-rc4 next-20200909] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Peter-Ujfalusi/ASoC-ti-j721e-evm-Su... base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next config: m68k-allmodconfig (attached as .config) compiler: m68k-linux-gcc (GCC) 9.3.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=m68k
If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot lkp@intel.com
All warnings (new ones prefixed by >>):
sound/soc/ti/j721e-evm.c:532:3: warning: this decimal constant is unsigned only in ISO C90
532 | [J721E_CLK_PARENT_48000] = 2359296000, /* PLL4 */ | ^# https://github.com/0day-ci/linux/commit/63afa4709f3914bb58dd727c1119c447a23c... git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Peter-Ujfalusi/ASoC-ti-j721e-evm-Support-for-j7200-variant/20200910-155534 git checkout 63afa4709f3914bb58dd727c1119c447a23ce150 vim +532 sound/soc/ti/j721e-evm.c
527 528 static const struct j721e_audio_match_data j7200_cpb_data = { 529 .board_type = J721E_BOARD_CPB, 530 .num_links = 2, /* CPB pcm3168a */ 531 .pll_rates = {
532 [J721E_CLK_PARENT_48000] = 2359296000, /* PLL4 */
struct j721e_audio_match_data { enum j721e_board_type board_type; int num_links; unsigned int pll_rates[2]; };
pll_rates _is_ unsigned int.
533 }, 534 }; 535
0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
- Péter
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
On 10/09/2020 14.48, Peter Ujfalusi wrote:
Hi,
On 10/09/2020 12.54, kernel test robot wrote:
Hi Peter,
I love your patch! Perhaps something to improve:
[auto build test WARNING on asoc/for-next] [also build test WARNING on v5.9-rc4 next-20200909] [If your patch is applied to the wrong git tree, kindly drop us a note. And when submitting patch, we suggest to use '--base' as documented in https://git-scm.com/docs/git-format-patch]
url: https://github.com/0day-ci/linux/commits/Peter-Ujfalusi/ASoC-ti-j721e-evm-Su... base: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-next config: m68k-allmodconfig (attached as .config) compiler: m68k-linux-gcc (GCC) 9.3.0 reproduce (this is a W=1 build): wget https://raw.githubusercontent.com/intel/lkp-tests/master/sbin/make.cross -O ~/bin/make.cross chmod +x ~/bin/make.cross # save the attached .config to linux build tree COMPILER_INSTALL_PATH=$HOME/0day COMPILER=gcc-9.3.0 make.cross ARCH=m68k
If you fix the issue, kindly add following tag as appropriate Reported-by: kernel test robot lkp@intel.com
All warnings (new ones prefixed by >>):
sound/soc/ti/j721e-evm.c:532:3: warning: this decimal constant is unsigned only in ISO C90
532 | [J721E_CLK_PARENT_48000] = 2359296000, /* PLL4 */ | ^# https://github.com/0day-ci/linux/commit/63afa4709f3914bb58dd727c1119c447a23c... git remote add linux-review https://github.com/0day-ci/linux git fetch --no-tags linux-review Peter-Ujfalusi/ASoC-ti-j721e-evm-Support-for-j7200-variant/20200910-155534 git checkout 63afa4709f3914bb58dd727c1119c447a23ce150 vim +532 sound/soc/ti/j721e-evm.c
527 528 static const struct j721e_audio_match_data j7200_cpb_data = { 529 .board_type = J721E_BOARD_CPB, 530 .num_links = 2, /* CPB pcm3168a */ 531 .pll_rates = {
532 [J721E_CLK_PARENT_48000] = 2359296000, /* PLL4 */
Suffixing with 'u' silences the warning for C90, I'll send v2
struct j721e_audio_match_data { enum j721e_board_type board_type; int num_links; unsigned int pll_rates[2]; };
pll_rates _is_ unsigned int.
533 }, 534 }; 535
0-DAY CI Kernel Test Service, Intel Corporation https://lists.01.org/hyperkitty/list/kbuild-all@lists.01.org
- Péter
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
- Péter
Texas Instruments Finland Oy, Porkkalankatu 22, 00180 Helsinki. Y-tunnus/Business ID: 0615521-4. Kotipaikka/Domicile: Helsinki
participants (2)
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kernel test robot -
Peter Ujfalusi