[alsa-devel] [PATCH v2 0/3] Several SAI fixes
This series contains several fixes for SAI. They are unrelated but grouped them in a patch series to be easier applied.
Daniel Baluta (1): ASoC: fsl_sai: Fix TCSR.TE/RCSR.RE in synchronous mode
Mihai Serban (1): ASoC: fsl_sai: Fix noise when using EDMA
Shengjiu Wang (1): ASoC: fsl_sai: Fix xMR setting in synchronous mode
sound/soc/fsl/fsl_sai.c | 31 ++++++++++++++++++++++--------- sound/soc/fsl/fsl_sai.h | 1 + 2 files changed, 23 insertions(+), 9 deletions(-)
From: Mihai Serban mihai.serban@nxp.com
EDMA requires the period size to be multiple of maxburst. Otherwise the remaining bytes are not transferred and thus noise is produced.
We can handle this issue by adding a constraint on SNDRV_PCM_HW_PARAM_PERIOD_SIZE to be multiple of tx/rx maxburst value.
Signed-off-by: Mihai Serban mihai.serban@nxp.com Signed-off-by: Daniel Baluta daniel.baluta@nxp.com --- Changes since v1: * rename variable to use_edma as per Nicolin's suggestion.
sound/soc/fsl/fsl_sai.c | 15 +++++++++++++++ sound/soc/fsl/fsl_sai.h | 1 + 2 files changed, 16 insertions(+)
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c index ef0b74693093..b517e4bc1b87 100644 --- a/sound/soc/fsl/fsl_sai.c +++ b/sound/soc/fsl/fsl_sai.c @@ -628,6 +628,16 @@ static int fsl_sai_startup(struct snd_pcm_substream *substream, FSL_SAI_CR3_TRCE_MASK, FSL_SAI_CR3_TRCE);
+ /* + * EDMA controller needs period size to be a multiple of + * tx/rx maxburst + */ + if (sai->soc_data->use_edma) + snd_pcm_hw_constraint_step(substream->runtime, 0, + SNDRV_PCM_HW_PARAM_PERIOD_SIZE, + tx ? sai->dma_params_tx.maxburst : + sai->dma_params_rx.maxburst); + ret = snd_pcm_hw_constraint_list(substream->runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &fsl_sai_rate_constraints);
@@ -1026,30 +1036,35 @@ static int fsl_sai_remove(struct platform_device *pdev)
static const struct fsl_sai_soc_data fsl_sai_vf610_data = { .use_imx_pcm = false, + .use_edma = false, .fifo_depth = 32, .reg_offset = 0, };
static const struct fsl_sai_soc_data fsl_sai_imx6sx_data = { .use_imx_pcm = true, + .use_edma = false, .fifo_depth = 32, .reg_offset = 0, };
static const struct fsl_sai_soc_data fsl_sai_imx7ulp_data = { .use_imx_pcm = true, + .use_edma = false, .fifo_depth = 16, .reg_offset = 8, };
static const struct fsl_sai_soc_data fsl_sai_imx8mq_data = { .use_imx_pcm = true, + .use_edma = false, .fifo_depth = 128, .reg_offset = 8, };
static const struct fsl_sai_soc_data fsl_sai_imx8qm_data = { .use_imx_pcm = true, + .use_edma = true, .fifo_depth = 64, .reg_offset = 0, }; diff --git a/sound/soc/fsl/fsl_sai.h b/sound/soc/fsl/fsl_sai.h index b12cb578f6d0..76b15deea80c 100644 --- a/sound/soc/fsl/fsl_sai.h +++ b/sound/soc/fsl/fsl_sai.h @@ -157,6 +157,7 @@
struct fsl_sai_soc_data { bool use_imx_pcm; + bool use_edma; unsigned int fifo_depth; unsigned int reg_offset; };
On Fri, Sep 13, 2019 at 10:28:05PM +0300, Daniel Baluta wrote:
From: Mihai Serban mihai.serban@nxp.com
EDMA requires the period size to be multiple of maxburst. Otherwise the remaining bytes are not transferred and thus noise is produced.
We can handle this issue by adding a constraint on SNDRV_PCM_HW_PARAM_PERIOD_SIZE to be multiple of tx/rx maxburst value.
Signed-off-by: Mihai Serban mihai.serban@nxp.com Signed-off-by: Daniel Baluta daniel.baluta@nxp.com
Acked-by: Nicolin Chen nicoleotsuka@gmail.com
Thanks
Changes since v1:
- rename variable to use_edma as per Nicolin's suggestion.
sound/soc/fsl/fsl_sai.c | 15 +++++++++++++++ sound/soc/fsl/fsl_sai.h | 1 + 2 files changed, 16 insertions(+)
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c index ef0b74693093..b517e4bc1b87 100644 --- a/sound/soc/fsl/fsl_sai.c +++ b/sound/soc/fsl/fsl_sai.c @@ -628,6 +628,16 @@ static int fsl_sai_startup(struct snd_pcm_substream *substream, FSL_SAI_CR3_TRCE_MASK, FSL_SAI_CR3_TRCE);
- /*
* EDMA controller needs period size to be a multiple of* tx/rx maxburst*/- if (sai->soc_data->use_edma)
snd_pcm_hw_constraint_step(substream->runtime, 0,SNDRV_PCM_HW_PARAM_PERIOD_SIZE,tx ? sai->dma_params_tx.maxburst :sai->dma_params_rx.maxburst);- ret = snd_pcm_hw_constraint_list(substream->runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &fsl_sai_rate_constraints);
@@ -1026,30 +1036,35 @@ static int fsl_sai_remove(struct platform_device *pdev)
static const struct fsl_sai_soc_data fsl_sai_vf610_data = { .use_imx_pcm = false,
- .use_edma = false, .fifo_depth = 32, .reg_offset = 0,
};
static const struct fsl_sai_soc_data fsl_sai_imx6sx_data = { .use_imx_pcm = true,
- .use_edma = false, .fifo_depth = 32, .reg_offset = 0,
};
static const struct fsl_sai_soc_data fsl_sai_imx7ulp_data = { .use_imx_pcm = true,
- .use_edma = false, .fifo_depth = 16, .reg_offset = 8,
};
static const struct fsl_sai_soc_data fsl_sai_imx8mq_data = { .use_imx_pcm = true,
- .use_edma = false, .fifo_depth = 128, .reg_offset = 8,
};
static const struct fsl_sai_soc_data fsl_sai_imx8qm_data = { .use_imx_pcm = true,
- .use_edma = true, .fifo_depth = 64, .reg_offset = 0,
}; diff --git a/sound/soc/fsl/fsl_sai.h b/sound/soc/fsl/fsl_sai.h index b12cb578f6d0..76b15deea80c 100644 --- a/sound/soc/fsl/fsl_sai.h +++ b/sound/soc/fsl/fsl_sai.h @@ -157,6 +157,7 @@
struct fsl_sai_soc_data { bool use_imx_pcm;
- bool use_edma; unsigned int fifo_depth; unsigned int reg_offset;
};
2.17.1
The patch
ASoC: fsl_sai: Fix noise when using EDMA
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-5.4
All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying to this mail.
Thanks, Mark
From e75f4940e8ad0dd76527302a10c06b58bf7eb590 Mon Sep 17 00:00:00 2001
From: Mihai Serban mihai.serban@nxp.com Date: Fri, 13 Sep 2019 22:28:05 +0300 Subject: [PATCH] ASoC: fsl_sai: Fix noise when using EDMA
EDMA requires the period size to be multiple of maxburst. Otherwise the remaining bytes are not transferred and thus noise is produced.
We can handle this issue by adding a constraint on SNDRV_PCM_HW_PARAM_PERIOD_SIZE to be multiple of tx/rx maxburst value.
Signed-off-by: Mihai Serban mihai.serban@nxp.com Signed-off-by: Daniel Baluta daniel.baluta@nxp.com Acked-by: Nicolin Chen nicoleotsuka@gmail.com Link: https://lore.kernel.org/r/20190913192807.8423-2-daniel.baluta@nxp.com Signed-off-by: Mark Brown broonie@kernel.org --- sound/soc/fsl/fsl_sai.c | 15 +++++++++++++++ sound/soc/fsl/fsl_sai.h | 1 + 2 files changed, 16 insertions(+)
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c index ef0b74693093..b517e4bc1b87 100644 --- a/sound/soc/fsl/fsl_sai.c +++ b/sound/soc/fsl/fsl_sai.c @@ -628,6 +628,16 @@ static int fsl_sai_startup(struct snd_pcm_substream *substream, FSL_SAI_CR3_TRCE_MASK, FSL_SAI_CR3_TRCE);
+ /* + * EDMA controller needs period size to be a multiple of + * tx/rx maxburst + */ + if (sai->soc_data->use_edma) + snd_pcm_hw_constraint_step(substream->runtime, 0, + SNDRV_PCM_HW_PARAM_PERIOD_SIZE, + tx ? sai->dma_params_tx.maxburst : + sai->dma_params_rx.maxburst); + ret = snd_pcm_hw_constraint_list(substream->runtime, 0, SNDRV_PCM_HW_PARAM_RATE, &fsl_sai_rate_constraints);
@@ -1026,30 +1036,35 @@ static int fsl_sai_remove(struct platform_device *pdev)
static const struct fsl_sai_soc_data fsl_sai_vf610_data = { .use_imx_pcm = false, + .use_edma = false, .fifo_depth = 32, .reg_offset = 0, };
static const struct fsl_sai_soc_data fsl_sai_imx6sx_data = { .use_imx_pcm = true, + .use_edma = false, .fifo_depth = 32, .reg_offset = 0, };
static const struct fsl_sai_soc_data fsl_sai_imx7ulp_data = { .use_imx_pcm = true, + .use_edma = false, .fifo_depth = 16, .reg_offset = 8, };
static const struct fsl_sai_soc_data fsl_sai_imx8mq_data = { .use_imx_pcm = true, + .use_edma = false, .fifo_depth = 128, .reg_offset = 8, };
static const struct fsl_sai_soc_data fsl_sai_imx8qm_data = { .use_imx_pcm = true, + .use_edma = true, .fifo_depth = 64, .reg_offset = 0, }; diff --git a/sound/soc/fsl/fsl_sai.h b/sound/soc/fsl/fsl_sai.h index b12cb578f6d0..76b15deea80c 100644 --- a/sound/soc/fsl/fsl_sai.h +++ b/sound/soc/fsl/fsl_sai.h @@ -157,6 +157,7 @@
struct fsl_sai_soc_data { bool use_imx_pcm; + bool use_edma; unsigned int fifo_depth; unsigned int reg_offset; };
From: Shengjiu Wang shengjiu.wang@nxp.com
When Tx is synchronous with receiver the RMR should not be changed. When Rx is synchronous with transmitter the TMR should not be changed.
Cc: NXP Linux Team linux-imx@nxp.com Signed-off-by: Shengjiu Wang shengjiu.wang@nxp.com Signed-off-by: Daniel Baluta daniel.baluta@nxp.com --- Changes since v1: * new patch
sound/soc/fsl/fsl_sai.c | 4 ---- 1 file changed, 4 deletions(-)
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c index b517e4bc1b87..6598a1ae0a2d 100644 --- a/sound/soc/fsl/fsl_sai.c +++ b/sound/soc/fsl/fsl_sai.c @@ -482,8 +482,6 @@ static int fsl_sai_hw_params(struct snd_pcm_substream *substream, regmap_update_bits(sai->regmap, FSL_SAI_TCR5(ofs), FSL_SAI_CR5_WNW_MASK | FSL_SAI_CR5_W0W_MASK | FSL_SAI_CR5_FBT_MASK, val_cr5); - regmap_write(sai->regmap, FSL_SAI_TMR, - ~0UL - ((1 << channels) - 1)); } else if (!sai->synchronous[RX] && sai->synchronous[TX] && tx) { regmap_update_bits(sai->regmap, FSL_SAI_RCR4(ofs), FSL_SAI_CR4_SYWD_MASK | FSL_SAI_CR4_FRSZ_MASK, @@ -491,8 +489,6 @@ static int fsl_sai_hw_params(struct snd_pcm_substream *substream, regmap_update_bits(sai->regmap, FSL_SAI_RCR5(ofs), FSL_SAI_CR5_WNW_MASK | FSL_SAI_CR5_W0W_MASK | FSL_SAI_CR5_FBT_MASK, val_cr5); - regmap_write(sai->regmap, FSL_SAI_RMR, - ~0UL - ((1 << channels) - 1)); } }
On Fri, Sep 13, 2019 at 10:28:06PM +0300, Daniel Baluta wrote:
From: Shengjiu Wang shengjiu.wang@nxp.com
When Tx is synchronous with receiver the RMR should not be changed. When Rx is synchronous with transmitter the TMR should not be changed.
Would you please explain why and what bug this patch fixes? We might want to Cc stable kernel too if it's a useful fix.
Thank you.
Cc: NXP Linux Team linux-imx@nxp.com Signed-off-by: Shengjiu Wang shengjiu.wang@nxp.com Signed-off-by: Daniel Baluta daniel.baluta@nxp.com
Changes since v1:
- new patch
sound/soc/fsl/fsl_sai.c | 4 ---- 1 file changed, 4 deletions(-)
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c index b517e4bc1b87..6598a1ae0a2d 100644 --- a/sound/soc/fsl/fsl_sai.c +++ b/sound/soc/fsl/fsl_sai.c @@ -482,8 +482,6 @@ static int fsl_sai_hw_params(struct snd_pcm_substream *substream, regmap_update_bits(sai->regmap, FSL_SAI_TCR5(ofs), FSL_SAI_CR5_WNW_MASK | FSL_SAI_CR5_W0W_MASK | FSL_SAI_CR5_FBT_MASK, val_cr5);
regmap_write(sai->regmap, FSL_SAI_TMR,~0UL - ((1 << channels) - 1));@@ -491,8 +489,6 @@ static int fsl_sai_hw_params(struct snd_pcm_substream *substream, regmap_update_bits(sai->regmap, FSL_SAI_RCR5(ofs), FSL_SAI_CR5_WNW_MASK | FSL_SAI_CR5_W0W_MASK | FSL_SAI_CR5_FBT_MASK, val_cr5);
regmap_write(sai->regmap, FSL_SAI_RMR,~0UL - ((1 << channels) - 1));-- 2.17.1
The SAI transmitter and receiver can be configured to operate with synchronous bit clock and frame sync.
When Tx is synchronous with receiver RCSR.RE should be set in playback to enable the receiver which provides bit clock and frame sync.
When Rx is synchronous with transmitter TCSR.TE should be set in record to enable the transmitter which provides bit clock and frame sync.
Cc: NXP Linux Team linux-imx@nxp.com Signed-off-by: Daniel Baluta daniel.baluta@nxp.com --- Changes since v1: * new patch
sound/soc/fsl/fsl_sai.c | 12 +++++++----- 1 file changed, 7 insertions(+), 5 deletions(-)
diff --git a/sound/soc/fsl/fsl_sai.c b/sound/soc/fsl/fsl_sai.c index 6598a1ae0a2d..a59300e37549 100644 --- a/sound/soc/fsl/fsl_sai.c +++ b/sound/soc/fsl/fsl_sai.c @@ -539,8 +539,8 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd, sai->synchronous[RX] ? FSL_SAI_CR2_SYNC : 0);
/* - * It is recommended that the transmitter is the last enabled - * and the first disabled. + * it is recommended that the asynchronous block to be the last enabled + * and the first disabled */ switch (cmd) { case SNDRV_PCM_TRIGGER_START: @@ -549,9 +549,11 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd, regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx, ofs), FSL_SAI_CSR_FRDE, FSL_SAI_CSR_FRDE);
- regmap_update_bits(sai->regmap, FSL_SAI_RCSR(ofs), - FSL_SAI_CSR_TERE, FSL_SAI_CSR_TERE); - regmap_update_bits(sai->regmap, FSL_SAI_TCSR(ofs), + if (sai->synchronous[tx]) + regmap_update_bits(sai->regmap, FSL_SAI_xCSR(!tx, ofs), + FSL_SAI_CSR_TERE, FSL_SAI_CSR_TERE); + + regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx, ofs), FSL_SAI_CSR_TERE, FSL_SAI_CSR_TERE);
regmap_update_bits(sai->regmap, FSL_SAI_xCSR(tx, ofs),
Hello Daniel,
On Fri, Sep 13, 2019 at 10:28:07PM +0300, Daniel Baluta wrote:
The SAI transmitter and receiver can be configured to operate with synchronous bit clock and frame sync.
When Tx is synchronous with receiver RCSR.RE should be set in playback to enable the receiver which provides bit clock and frame sync.
When Rx is synchronous with transmitter TCSR.TE should be set in record to enable the transmitter which provides bit clock and frame sync.
I don't quite get what this patch fixes....can you explain?
@@ -539,8 +539,8 @@ static int fsl_sai_trigger(struct snd_pcm_substream *substream, int cmd, sai->synchronous[RX] ? FSL_SAI_CR2_SYNC : 0);
/*
* It is recommended that the transmitter is the last enabled* and the first disabled.
This is copied from iMX6SX Reference Manual, IIRC...And I just took a look at iMX8DXP/QXP RM: it has the exact same statement in "16.16.3.3.1 Synchronous mode" section.
* it is recommended that the asynchronous block to be the last enabled* and the first disabled
So... why are we changing to this? Any update/explain?
Thank you
participants (3)
-
Daniel Baluta -
Mark Brown -
Nicolin Chen