[alsa-devel] [PATCH RESEND 0/4] ASoC: es8328: various improvements
This set of patches fixes clock handling in slave mode, enables sampling frequency of 192khz in slave mode and adds support for this frame rate in the driver rk3288_hdmi_analog.c.
Note: Due to an email configuration issue, some of my patches were not received on infradead.org or vger.kernel.org. It is now fixed, so I resend this set of patches for this reason.
Romain Perier (4): ASoC: es8328: Simplify rates definition ASoC: es8328: Let device auto detect ratios in slave mode ASoC: es8328: Enabling support for 192k ASoC: rockchip: Enable 192khz in hw_params operation
sound/soc/codecs/es8328.c | 51 +++++++++++++++++++-------------- sound/soc/rockchip/rk3288_hdmi_analog.c | 3 ++ 2 files changed, 32 insertions(+), 22 deletions(-)
Currently most of the standard rates are supported by this driver. Instead of defining each supported rate one by one, we use the SND macro SNDRV_PCM_RATE_8000_48000. Also adds support for 88.2khz as the codec supports it and the sys clocks are already supported.
Signed-off-by: Romain Perier romain.perier@collabora.com --- sound/soc/codecs/es8328.c | 9 ++------- 1 file changed, 2 insertions(+), 7 deletions(-)
diff --git a/sound/soc/codecs/es8328.c b/sound/soc/codecs/es8328.c index 3f84fbd..5ad7161 100644 --- a/sound/soc/codecs/es8328.c +++ b/sound/soc/codecs/es8328.c @@ -70,13 +70,8 @@ static const char * const supply_names[ES8328_SUPPLY_NUM] = { };
#define ES8328_RATES (SNDRV_PCM_RATE_96000 | \ - SNDRV_PCM_RATE_48000 | \ - SNDRV_PCM_RATE_44100 | \ - SNDRV_PCM_RATE_32000 | \ - SNDRV_PCM_RATE_22050 | \ - SNDRV_PCM_RATE_16000 | \ - SNDRV_PCM_RATE_11025 | \ - SNDRV_PCM_RATE_8000) + SNDRV_PCM_RATE_88200 | \ + SNDRV_PCM_RATE_8000_48000) #define ES8328_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \ SNDRV_PCM_FMTBIT_S18_3LE | \ SNDRV_PCM_FMTBIT_S20_3LE | \
In master mode, SCLK and LRCLK signals are generated by the CODEC when any of the ADC/DAC are enabled. SCLK is derived from MCLK via a programmable division set by BLK_DIV, LRCLK is derived from MCLK via another programmable division set by ADCFsRatio/DACFsRatio.
In slave mode, SCLK and LRCLK signals are received as inputs and supplied externally. LRCLK and SCLK must be synchronously derived from MCLK with specific rates. The device can auto detect MCLK/LRCLK ratio according to a predefined table. LRCLK/SCLK ratio is usually 64 (SCLK = 64 * LRCLK)
This commits adds support to let to device auto detect and decide which ratio to use. The mclkdiv2 and BCLK_DIV ratio and put to zero.
Signed-off-by: Romain Perier romain.perier@collabora.com --- sound/soc/codecs/es8328.c | 39 +++++++++++++++++++++++++-------------- 1 file changed, 25 insertions(+), 14 deletions(-)
diff --git a/sound/soc/codecs/es8328.c b/sound/soc/codecs/es8328.c index 5ad7161..1363a68 100644 --- a/sound/soc/codecs/es8328.c +++ b/sound/soc/codecs/es8328.c @@ -86,6 +86,7 @@ struct es8328_priv { int mclkdiv2; const struct snd_pcm_hw_constraint_list *sysclk_constraints; const int *mclk_ratios; + bool master; struct regulator_bulk_data supplies[ES8328_SUPPLY_NUM]; };
@@ -464,7 +465,7 @@ static int es8328_startup(struct snd_pcm_substream *substream, struct snd_soc_codec *codec = dai->codec; struct es8328_priv *es8328 = snd_soc_codec_get_drvdata(codec);
- if (es8328->sysclk_constraints) + if (es8328->master && es8328->sysclk_constraints) snd_pcm_hw_constraint_list(substream->runtime, 0, SNDRV_PCM_HW_PARAM_RATE, es8328->sysclk_constraints); @@ -483,27 +484,34 @@ static int es8328_hw_params(struct snd_pcm_substream *substream, int wl; int ratio;
- if (!es8328->sysclk_constraints) { - dev_err(codec->dev, "No MCLK configured\n"); - return -EINVAL; - } - if (substream->stream == SNDRV_PCM_STREAM_PLAYBACK) reg = ES8328_DACCONTROL2; else reg = ES8328_ADCCONTROL5;
- for (i = 0; i < es8328->sysclk_constraints->count; i++) - if (es8328->sysclk_constraints->list[i] == params_rate(params)) - break; + if (es8328->master) { + if (!es8328->sysclk_constraints) { + dev_err(codec->dev, "No MCLK configured\n"); + return -EINVAL; + }
- if (i == es8328->sysclk_constraints->count) { - dev_err(codec->dev, "LRCLK %d unsupported with current clock\n", - params_rate(params)); - return -EINVAL; + for (i = 0; i < es8328->sysclk_constraints->count; i++) + if (es8328->sysclk_constraints->list[i] == + params_rate(params)) + break; + + if (i == es8328->sysclk_constraints->count) { + dev_err(codec->dev, + "LRCLK %d unsupported with current clock\n", + params_rate(params)); + return -EINVAL; + } + ratio = es8328->mclk_ratios[i]; + } else { + ratio = 0; + es8328->mclkdiv2 = 0; }
- ratio = es8328->mclk_ratios[i]; snd_soc_update_bits(codec, ES8328_MASTERMODE, ES8328_MASTERMODE_MCLKDIV2, es8328->mclkdiv2 ? ES8328_MASTERMODE_MCLKDIV2 : 0); @@ -581,6 +589,7 @@ static int es8328_set_dai_fmt(struct snd_soc_dai *codec_dai, unsigned int fmt) { struct snd_soc_codec *codec = codec_dai->codec; + struct es8328_priv *es8328 = snd_soc_codec_get_drvdata(codec); u8 dac_mode = 0; u8 adc_mode = 0;
@@ -590,11 +599,13 @@ static int es8328_set_dai_fmt(struct snd_soc_dai *codec_dai, snd_soc_update_bits(codec, ES8328_MASTERMODE, ES8328_MASTERMODE_MSC, ES8328_MASTERMODE_MSC); + es8328->master = true; break; case SND_SOC_DAIFMT_CBS_CFS: /* Slave serial port mode */ snd_soc_update_bits(codec, ES8328_MASTERMODE, ES8328_MASTERMODE_MSC, 0); + es8328->master = false; break; default: return -EINVAL;
The master and slave modes don't share the same table for MCLK/LRCLK ratios. The slaves mode has bigger ratios that allow to use BCLK that matche sampling frequency of 192khz.
This commit enables this rate only for slave mode, i.e it does not declare this frequency in sysclk_contraints, resulting to an error in master mode (not supported CLK).
Signed-off-by: Romain Perier romain.perier@collabora.com --- sound/soc/codecs/es8328.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-)
diff --git a/sound/soc/codecs/es8328.c b/sound/soc/codecs/es8328.c index 1363a68..ed7cc42 100644 --- a/sound/soc/codecs/es8328.c +++ b/sound/soc/codecs/es8328.c @@ -69,7 +69,8 @@ static const char * const supply_names[ES8328_SUPPLY_NUM] = { "HPVDD", };
-#define ES8328_RATES (SNDRV_PCM_RATE_96000 | \ +#define ES8328_RATES (SNDRV_PCM_RATE_192000 | \ + SNDRV_PCM_RATE_96000 | \ SNDRV_PCM_RATE_88200 | \ SNDRV_PCM_RATE_8000_48000) #define ES8328_FORMATS (SNDRV_PCM_FMTBIT_S16_LE | \
As the sampling frequency is supported by es8328 in slave mode, add support for it in the corresponding operation.
Signed-off-by: Romain Perier romain.perier@collabora.com --- sound/soc/rockchip/rk3288_hdmi_analog.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/sound/soc/rockchip/rk3288_hdmi_analog.c b/sound/soc/rockchip/rk3288_hdmi_analog.c index b60abf3..dbc53e4 100644 --- a/sound/soc/rockchip/rk3288_hdmi_analog.c +++ b/sound/soc/rockchip/rk3288_hdmi_analog.c @@ -93,6 +93,9 @@ static int rk_hw_params(struct snd_pcm_substream *substream, case 96000: mclk = 12288000; break; + case 192000: + mclk = 24576000; + break; case 11025: case 22050: case 44100:
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Romain Perier