On Tue, Nov 08, 2011 at 06:03:53PM +0900, Tomoya MORINAGA wrote:

So, I started looking at this but...

struct snd_ml7213i2s_pcm { enum snd_soc_control_type control_type; struct snd_ml7213i2s *ml7213i2s; spinlock_t lock; unsigned int irq_pos; unsigned int buf_pos; struct snd_pcm_substream *substream; struct cbdata cbd; /* i2s callback info */ unsigned int channels; unsigned int rw; unsigned int rate; unsigned int ch; unsigned int setup_flag; unsigned int format; unsigned int bclkfs; struct mutex i2c_mutex; };

...this looks *really* confused, there's things in here which are a mix of DMA controller and CODEC driver things. The CODEC and DMA drivers shouldn't know anything about each other, let alone be referencing the same data structure.

/*

• wm8731 register cache
• We can't read the WM8731 register space when we are
• using 2 wire for device control, so we cache them instead.
• There is no point in caching the reset register

*/ static const u16 wm8731_reg[WM8731_CACHEREGNUM] = { 0x0097, 0x0097, 0x0079, 0x0079, 0x000a, 0x0008, 0x009f, 0x000a, 0x0000, 0x0000 };

This is is just obviously wrong for this driver. I stopped reading the code at this point.