[alsa-devel] [PATCH v4 0/3] ASoC: topology: Improve hw_configs
Hello Mark,
This patch series waits since 20th of February, because it modifies UAPI headers and should be done in sync with ALSA. I see that previously there was no clear understanding, how to do this in sync.
Two days ago I discussed with Takashi, and he suggested the following steps:
Step 1. A person from Intel, who knows the topic (Pierre), adds his "Reviewed-by" or "Acked-by" tags Step 2. I clarify with you to apply the Linux part (this patch series) Step 3. After that, I clarify with Takashi to apply the ALSA part (it is ready, but not sent untill we apply the Linux part)
The step 1 is done. Old patches are reviewed by Pierre, so they have his "Reviewed-by" tag. New patches are suggested by him, and we agreed on the implementation, so they have his "Acked-by" tag.
Now we are on the step 2. If you don't have anything against this patch series, please apply it to Linux.
Best Regards, Kirill
Kirill Marinushkin (3): ASoC: topology: Fix bclk and fsync inversion in set_link_hw_format() ASoC: topology: Add missing clock gating parameter when parsing hw_configs ASoC: topology: Add definitions for mclk_direction values
include/uapi/sound/asoc.h | 29 +++++++++++++++++++++++++---- sound/soc/soc-topology.c | 19 ++++++++++++++----- 2 files changed, 39 insertions(+), 9 deletions(-)
The values of bclk and fsync are inverted WRT the codec. But the existing solution already works for Broadwell, see the alsa-lib config:
`alsa-lib/src/conf/topology/broadwell/broadwell.conf`
This commit provides the backwards-compatible solution to fix this misuse.
Signed-off-by: Kirill Marinushkin k.marinushkin@gmail.com Reviewed-by: Pierre-Louis Bossart pierre-louis.bossart@linux.intel.com Tested-by: Pan Xiuli xiuli.pan@linux.intel.com Tested-by: Pierre-Louis Bossart pierre-louis.bossart@linux.intel.com Cc: Jaroslav Kysela perex@perex.cz Cc: Takashi Iwai tiwai@suse.de Cc: Mark Brown broonie@kernel.org Cc: Liam Girdwood liam.r.girdwood@linux.intel.com Cc: linux-kernel@vger.kernel.org Cc: alsa-devel@alsa-project.org --- include/uapi/sound/asoc.h | 16 ++++++++++++++-- sound/soc/soc-topology.c | 12 +++++++----- 2 files changed, 21 insertions(+), 7 deletions(-)
diff --git a/include/uapi/sound/asoc.h b/include/uapi/sound/asoc.h index 69c37ecbff7e..f0e5e21efa54 100644 --- a/include/uapi/sound/asoc.h +++ b/include/uapi/sound/asoc.h @@ -160,6 +160,18 @@ #define SND_SOC_TPLG_LNK_FLGBIT_SYMMETRIC_SAMPLEBITS (1 << 2) #define SND_SOC_TPLG_LNK_FLGBIT_VOICE_WAKEUP (1 << 3)
+/* DAI topology BCLK parameter + * For the backwards capability, by default codec is bclk master + */ +#define SND_SOC_TPLG_BCLK_CM 0 /* codec is bclk master */ +#define SND_SOC_TPLG_BCLK_CS 1 /* codec is bclk slave */ + +/* DAI topology FSYNC parameter + * For the backwards capability, by default codec is fsync master + */ +#define SND_SOC_TPLG_FSYNC_CM 0 /* codec is fsync master */ +#define SND_SOC_TPLG_FSYNC_CS 1 /* codec is fsync slave */ + /* * Block Header. * This header precedes all object and object arrays below. @@ -315,8 +327,8 @@ struct snd_soc_tplg_hw_config { __u8 clock_gated; /* 1 if clock can be gated to save power */ __u8 invert_bclk; /* 1 for inverted BCLK, 0 for normal */ __u8 invert_fsync; /* 1 for inverted frame clock, 0 for normal */ - __u8 bclk_master; /* 1 for master of BCLK, 0 for slave */ - __u8 fsync_master; /* 1 for master of FSYNC, 0 for slave */ + __u8 bclk_master; /* SND_SOC_TPLG_BCLK_ value */ + __u8 fsync_master; /* SND_SOC_TPLG_FSYNC_ value */ __u8 mclk_direction; /* 0 for input, 1 for output */ __le16 reserved; /* for 32bit alignment */ __le32 mclk_rate; /* MCLK or SYSCLK freqency in Hz */ diff --git a/sound/soc/soc-topology.c b/sound/soc/soc-topology.c index 01a50413c66f..c5bdc673b195 100644 --- a/sound/soc/soc-topology.c +++ b/sound/soc/soc-topology.c @@ -1994,13 +1994,15 @@ static void set_link_hw_format(struct snd_soc_dai_link *link, link->dai_fmt |= SND_SOC_DAIFMT_IB_IF;
/* clock masters */ - bclk_master = hw_config->bclk_master; - fsync_master = hw_config->fsync_master; - if (!bclk_master && !fsync_master) + bclk_master = (hw_config->bclk_master == + SND_SOC_TPLG_BCLK_CM); + fsync_master = (hw_config->fsync_master == + SND_SOC_TPLG_FSYNC_CM); + if (bclk_master && fsync_master) link->dai_fmt |= SND_SOC_DAIFMT_CBM_CFM; - else if (bclk_master && !fsync_master) - link->dai_fmt |= SND_SOC_DAIFMT_CBS_CFM; else if (!bclk_master && fsync_master) + link->dai_fmt |= SND_SOC_DAIFMT_CBS_CFM; + else if (bclk_master && !fsync_master) link->dai_fmt |= SND_SOC_DAIFMT_CBM_CFS; else link->dai_fmt |= SND_SOC_DAIFMT_CBS_CFS;
Clock gating parameter is a part of `dai_fmt`. It is supported by `alsa-lib` when creating a topology binary file, but ignored by kernel when loading this topology file.
After applying this commit, the clock gating parameter is not ignored any more. This solution is backwards compatible. The existing behaviour is not broken, because by default the parameter value is 0 and is ignored.
snd_soc_tplg_hw_config.clock_gated = 0 => no effect snd_soc_tplg_hw_config.clock_gated = 1 => SND_SOC_DAIFMT_GATED snd_soc_tplg_hw_config.clock_gated = 2 => SND_SOC_DAIFMT_CONT
For example, the following config, based on alsa-lib/src/conf/topology/broadwell/broadwell.conf, is now supported:
~~~~ SectionHWConfig."CodecHWConfig" { id "1" format "I2S" # physical audio format. pm_gate_clocks "true" # clock can be gated }
SectionLink."Codec" {
# used for binding to the physical link id "0"
hw_configs [ "CodecHWConfig" ]
default_hw_conf_id "1" } ~~~~
Signed-off-by: Kirill Marinushkin k.marinushkin@gmail.com Reviewed-by: Pierre-Louis Bossart pierre-louis.bossart@linux.intel.com Cc: Jaroslav Kysela perex@perex.cz Cc: Takashi Iwai tiwai@suse.de Cc: Mark Brown broonie@kernel.org Cc: Pan Xiuli xiuli.pan@linux.intel.com Cc: Liam Girdwood liam.r.girdwood@linux.intel.com Cc: linux-kernel@vger.kernel.org Cc: alsa-devel@alsa-project.org --- include/uapi/sound/asoc.h | 7 ++++++- sound/soc/soc-topology.c | 7 +++++++ 2 files changed, 13 insertions(+), 1 deletion(-)
diff --git a/include/uapi/sound/asoc.h b/include/uapi/sound/asoc.h index f0e5e21efa54..f3c4b46e39d8 100644 --- a/include/uapi/sound/asoc.h +++ b/include/uapi/sound/asoc.h @@ -139,6 +139,11 @@ #define SND_SOC_TPLG_DAI_FLGBIT_SYMMETRIC_CHANNELS (1 << 1) #define SND_SOC_TPLG_DAI_FLGBIT_SYMMETRIC_SAMPLEBITS (1 << 2)
+/* DAI clock gating */ +#define SND_SOC_TPLG_DAI_CLK_GATE_UNDEFINED 0 +#define SND_SOC_TPLG_DAI_CLK_GATE_GATED 1 +#define SND_SOC_TPLG_DAI_CLK_GATE_CONT 2 + /* DAI physical PCM data formats. * Add new formats to the end of the list. */ @@ -324,7 +329,7 @@ struct snd_soc_tplg_hw_config { __le32 size; /* in bytes of this structure */ __le32 id; /* unique ID - - used to match */ __le32 fmt; /* SND_SOC_DAI_FORMAT_ format value */ - __u8 clock_gated; /* 1 if clock can be gated to save power */ + __u8 clock_gated; /* SND_SOC_TPLG_DAI_CLK_GATE_ value */ __u8 invert_bclk; /* 1 for inverted BCLK, 0 for normal */ __u8 invert_fsync; /* 1 for inverted frame clock, 0 for normal */ __u8 bclk_master; /* SND_SOC_TPLG_BCLK_ value */ diff --git a/sound/soc/soc-topology.c b/sound/soc/soc-topology.c index c5bdc673b195..04f834e6a6b5 100644 --- a/sound/soc/soc-topology.c +++ b/sound/soc/soc-topology.c @@ -1981,6 +1981,13 @@ static void set_link_hw_format(struct snd_soc_dai_link *link,
link->dai_fmt = hw_config->fmt & SND_SOC_DAIFMT_FORMAT_MASK;
+ /* clock gating */ + if (hw_config->clock_gated == SND_SOC_TPLG_DAI_CLK_GATE_GATED) + link->dai_fmt |= SND_SOC_DAIFMT_GATED; + else if (hw_config->clock_gated == + SND_SOC_TPLG_DAI_CLK_GATE_CONT) + link->dai_fmt |= SND_SOC_DAIFMT_CONT; + /* clock signal polarity */ invert_bclk = hw_config->invert_bclk; invert_fsync = hw_config->invert_fsync;
On Wed, Apr 04, 2018 at 06:19:38AM +0200, Kirill Marinushkin wrote:
/* clock gating */
if (hw_config->clock_gated == SND_SOC_TPLG_DAI_CLK_GATE_GATED)
link->dai_fmt |= SND_SOC_DAIFMT_GATED;
else if (hw_config->clock_gated ==
SND_SOC_TPLG_DAI_CLK_GATE_CONT)
link->dai_fmt |= SND_SOC_DAIFMT_CONT;
I'll apply this but the above would be better written as a switch statement - could you please send an incremental patch changing it?
This improves the coding style of this piece of code.
Signed-off-by: Kirill Marinushkin k.marinushkin@gmail.com Cc: Mark Brown broonie@kernel.org Cc: Pierre-Louis Bossart pierre-louis.bossart@linux.intel.com Cc: Jaroslav Kysela perex@perex.cz Cc: Takashi Iwai tiwai@suse.de Cc: Pan Xiuli xiuli.pan@linux.intel.com Cc: Liam Girdwood liam.r.girdwood@linux.intel.com Cc: linux-kernel@vger.kernel.org Cc: alsa-devel@alsa-project.org --- sound/soc/soc-topology.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/sound/soc/soc-topology.c b/sound/soc/soc-topology.c index 04f834e6a6b5..802bad7ddcb4 100644 --- a/sound/soc/soc-topology.c +++ b/sound/soc/soc-topology.c @@ -1982,11 +1982,19 @@ static void set_link_hw_format(struct snd_soc_dai_link *link, link->dai_fmt = hw_config->fmt & SND_SOC_DAIFMT_FORMAT_MASK;
/* clock gating */ - if (hw_config->clock_gated == SND_SOC_TPLG_DAI_CLK_GATE_GATED) + switch (hw_config->clock_gated) { + case SND_SOC_TPLG_DAI_CLK_GATE_GATED: link->dai_fmt |= SND_SOC_DAIFMT_GATED; - else if (hw_config->clock_gated == - SND_SOC_TPLG_DAI_CLK_GATE_CONT) + break; + + case SND_SOC_TPLG_DAI_CLK_GATE_CONT: link->dai_fmt |= SND_SOC_DAIFMT_CONT; + break; + + default: + /* ignore the value */ + break; + }
/* clock signal polarity */ invert_bclk = hw_config->invert_bclk;
The patch
ASoC: topology: Modify clock gating parameter parsing to switch
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying to this mail.
Thanks, Mark
From fbeabd09236664f34ea3e4a9f7dcf5a0cdb7fc47 Mon Sep 17 00:00:00 2001
From: Kirill Marinushkin k.marinushkin@gmail.com Date: Mon, 16 Apr 2018 19:56:44 +0200 Subject: [PATCH] ASoC: topology: Modify clock gating parameter parsing to switch
This improves the coding style of this piece of code.
Signed-off-by: Kirill Marinushkin k.marinushkin@gmail.com Cc: Mark Brown broonie@kernel.org Cc: Pierre-Louis Bossart pierre-louis.bossart@linux.intel.com Cc: Jaroslav Kysela perex@perex.cz Cc: Takashi Iwai tiwai@suse.de Cc: Pan Xiuli xiuli.pan@linux.intel.com Cc: Liam Girdwood liam.r.girdwood@linux.intel.com Cc: linux-kernel@vger.kernel.org Cc: alsa-devel@alsa-project.org Signed-off-by: Mark Brown broonie@kernel.org --- sound/soc/soc-topology.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/sound/soc/soc-topology.c b/sound/soc/soc-topology.c index aab31144f683..ec2ef7629dbb 100644 --- a/sound/soc/soc-topology.c +++ b/sound/soc/soc-topology.c @@ -2007,11 +2007,19 @@ static void set_link_hw_format(struct snd_soc_dai_link *link, link->dai_fmt = hw_config->fmt & SND_SOC_DAIFMT_FORMAT_MASK;
/* clock gating */ - if (hw_config->clock_gated == SND_SOC_TPLG_DAI_CLK_GATE_GATED) + switch (hw_config->clock_gated) { + case SND_SOC_TPLG_DAI_CLK_GATE_GATED: link->dai_fmt |= SND_SOC_DAIFMT_GATED; - else if (hw_config->clock_gated == - SND_SOC_TPLG_DAI_CLK_GATE_CONT) + break; + + case SND_SOC_TPLG_DAI_CLK_GATE_CONT: link->dai_fmt |= SND_SOC_DAIFMT_CONT; + break; + + default: + /* ignore the value */ + break; + }
/* clock signal polarity */ invert_bclk = hw_config->invert_bclk;
Current comment makes not clear the direction of mclk. Previously, similar description caused a misunderstanding for bclk_master and fsync_master.
This commit solves the potential confusion the same way it is solved for bclk_master and fsync_master.
Signed-off-by: Kirill Marinushkin k.marinushkin@gmail.com Acked-by: Pierre-Louis Bossart pierre-louis.bossart@linux.intel.com Cc: Jaroslav Kysela perex@perex.cz Cc: Takashi Iwai tiwai@suse.de Cc: Mark Brown broonie@kernel.org Cc: Pan Xiuli xiuli.pan@linux.intel.com Cc: Liam Girdwood liam.r.girdwood@linux.intel.com Cc: linux-kernel@vger.kernel.org Cc: alsa-devel@alsa-project.org --- include/uapi/sound/asoc.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/include/uapi/sound/asoc.h b/include/uapi/sound/asoc.h index f3c4b46e39d8..b901cdbe532a 100644 --- a/include/uapi/sound/asoc.h +++ b/include/uapi/sound/asoc.h @@ -144,6 +144,10 @@ #define SND_SOC_TPLG_DAI_CLK_GATE_GATED 1 #define SND_SOC_TPLG_DAI_CLK_GATE_CONT 2
+/* DAI mclk_direction */ +#define SND_SOC_TPLG_MCLK_CO 0 /* for codec, mclk is output */ +#define SND_SOC_TPLG_MCLK_CI 1 /* for codec, mclk is input */ + /* DAI physical PCM data formats. * Add new formats to the end of the list. */ @@ -334,7 +338,7 @@ struct snd_soc_tplg_hw_config { __u8 invert_fsync; /* 1 for inverted frame clock, 0 for normal */ __u8 bclk_master; /* SND_SOC_TPLG_BCLK_ value */ __u8 fsync_master; /* SND_SOC_TPLG_FSYNC_ value */ - __u8 mclk_direction; /* 0 for input, 1 for output */ + __u8 mclk_direction; /* SND_SOC_TPLG_MCLK_ value */ __le16 reserved; /* for 32bit alignment */ __le32 mclk_rate; /* MCLK or SYSCLK freqency in Hz */ __le32 bclk_rate; /* BCLK freqency in Hz */
The patch
ASoC: topology: Add definitions for mclk_direction values
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying to this mail.
Thanks, Mark
From e590522a06adce8ca2eb47e77d80616cd1542d91 Mon Sep 17 00:00:00 2001
From: Kirill Marinushkin k.marinushkin@gmail.com Date: Wed, 4 Apr 2018 06:19:39 +0200 Subject: [PATCH] ASoC: topology: Add definitions for mclk_direction values
Current comment makes not clear the direction of mclk. Previously, similar description caused a misunderstanding for bclk_master and fsync_master.
This commit solves the potential confusion the same way it is solved for bclk_master and fsync_master.
Signed-off-by: Kirill Marinushkin k.marinushkin@gmail.com Acked-by: Pierre-Louis Bossart pierre-louis.bossart@linux.intel.com Cc: Jaroslav Kysela perex@perex.cz Cc: Takashi Iwai tiwai@suse.de Cc: Mark Brown broonie@kernel.org Cc: Pan Xiuli xiuli.pan@linux.intel.com Cc: Liam Girdwood liam.r.girdwood@linux.intel.com Cc: linux-kernel@vger.kernel.org Cc: alsa-devel@alsa-project.org Signed-off-by: Mark Brown broonie@kernel.org --- include/uapi/sound/asoc.h | 6 +++++- 1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/include/uapi/sound/asoc.h b/include/uapi/sound/asoc.h index f3c4b46e39d8..b901cdbe532a 100644 --- a/include/uapi/sound/asoc.h +++ b/include/uapi/sound/asoc.h @@ -144,6 +144,10 @@ #define SND_SOC_TPLG_DAI_CLK_GATE_GATED 1 #define SND_SOC_TPLG_DAI_CLK_GATE_CONT 2
+/* DAI mclk_direction */ +#define SND_SOC_TPLG_MCLK_CO 0 /* for codec, mclk is output */ +#define SND_SOC_TPLG_MCLK_CI 1 /* for codec, mclk is input */ + /* DAI physical PCM data formats. * Add new formats to the end of the list. */ @@ -334,7 +338,7 @@ struct snd_soc_tplg_hw_config { __u8 invert_fsync; /* 1 for inverted frame clock, 0 for normal */ __u8 bclk_master; /* SND_SOC_TPLG_BCLK_ value */ __u8 fsync_master; /* SND_SOC_TPLG_FSYNC_ value */ - __u8 mclk_direction; /* 0 for input, 1 for output */ + __u8 mclk_direction; /* SND_SOC_TPLG_MCLK_ value */ __le16 reserved; /* for 32bit alignment */ __le32 mclk_rate; /* MCLK or SYSCLK freqency in Hz */ __le32 bclk_rate; /* BCLK freqency in Hz */
On 4/3/18 11:19 PM, Kirill Marinushkin wrote:
Hello Mark,
This patch series waits since 20th of February, because it modifies UAPI headers and should be done in sync with ALSA. I see that previously there was no clear understanding, how to do this in sync.
Two days ago I discussed with Takashi, and he suggested the following steps:
Step 1. A person from Intel, who knows the topic (Pierre), adds his "Reviewed-by" or "Acked-by" tags Step 2. I clarify with you to apply the Linux part (this patch series) Step 3. After that, I clarify with Takashi to apply the ALSA part (it is ready, but not sent untill we apply the Linux part)
The step 1 is done. Old patches are reviewed by Pierre, so they have his "Reviewed-by" tag. New patches are suggested by him, and we agreed on the implementation, so they have his "Acked-by" tag.
I just checked all the patches one more time and I am indeed good with the changes Thanks Kirill for clarifying those misleading settings in backwards-compatible ways and indirectly helping on our SOF work.
Now we are on the step 2. If you don't have anything against this patch series, please apply it to Linux.
Best Regards, Kirill
Kirill Marinushkin (3): ASoC: topology: Fix bclk and fsync inversion in set_link_hw_format() ASoC: topology: Add missing clock gating parameter when parsing hw_configs ASoC: topology: Add definitions for mclk_direction values
include/uapi/sound/asoc.h | 29 +++++++++++++++++++++++++---- sound/soc/soc-topology.c | 19 ++++++++++++++----- 2 files changed, 39 insertions(+), 9 deletions(-)
participants (3)
-
Kirill Marinushkin
-
Mark Brown
-
Pierre-Louis Bossart