[alsa-devel] [PATCH 1/3] ASoC: rt5659: fix wrong bit define for ADC L2 power.
RT5659_PWR_ADC_L2_BIT should be 2.
Signed-off-by: Zhong An zhongan@pinecone.net Signed-off-by: Bard Liao bardliao@realtek.com --- sound/soc/codecs/rt5659.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sound/soc/codecs/rt5659.h b/sound/soc/codecs/rt5659.h index 73969ef..3b51c8a 100644 --- a/sound/soc/codecs/rt5659.h +++ b/sound/soc/codecs/rt5659.h @@ -1008,7 +1008,7 @@ #define RT5659_PWR_ADC_R1 (0x1 << 3) #define RT5659_PWR_ADC_R1_BIT 3 #define RT5659_PWR_ADC_L2 (0x1 << 2) -#define RT5659_PWR_ADC_L2_BIT 4 +#define RT5659_PWR_ADC_L2_BIT 2 #define RT5659_PWR_ADC_R2 (0x1 << 1) #define RT5659_PWR_ADC_R2_BIT 1 #define RT5659_PWR_CLS_D (0x1)
The control register for ADC L2 and R2 is RT5659_PWR_DIG_1 not RT5659_PWR_DIG_2.
Signed-off-by: Zhong An zhongan@pinecone.net Signed-off-by: Bard Liao bardliao@realtek.com --- sound/soc/codecs/rt5659.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/sound/soc/codecs/rt5659.c b/sound/soc/codecs/rt5659.c index b772194..a81e248 100644 --- a/sound/soc/codecs/rt5659.c +++ b/sound/soc/codecs/rt5659.c @@ -2555,9 +2555,9 @@ static const struct snd_soc_dapm_widget rt5659_dapm_widgets[] = { RT5659_PWR_ADC_L1_BIT, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("ADC1 R Power", RT5659_PWR_DIG_1, RT5659_PWR_ADC_R1_BIT, 0, NULL, 0), - SND_SOC_DAPM_SUPPLY("ADC2 L Power", RT5659_PWR_DIG_2, + SND_SOC_DAPM_SUPPLY("ADC2 L Power", RT5659_PWR_DIG_1, RT5659_PWR_ADC_L2_BIT, 0, NULL, 0), - SND_SOC_DAPM_SUPPLY("ADC2 R Power", RT5659_PWR_DIG_2, + SND_SOC_DAPM_SUPPLY("ADC2 R Power", RT5659_PWR_DIG_1, RT5659_PWR_ADC_R2_BIT, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("ADC1 clock", SND_SOC_NOPM, 0, 0, set_adc_clk, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
The patch
ASoC: rt5659: fix wrong control register for ADC2 power
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying to this mail.
Thanks, Mark
From 3795e0c7d5c8b81d4ae32129b860aaa169945ce3 Mon Sep 17 00:00:00 2001
From: Bard Liao bardliao@realtek.com Date: Mon, 12 Mar 2018 19:50:08 +0800 Subject: [PATCH] ASoC: rt5659: fix wrong control register for ADC2 power
The control register for ADC L2 and R2 is RT5659_PWR_DIG_1 not RT5659_PWR_DIG_2.
Signed-off-by: Zhong An zhongan@pinecone.net Signed-off-by: Bard Liao bardliao@realtek.com Signed-off-by: Mark Brown broonie@kernel.org --- sound/soc/codecs/rt5659.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/sound/soc/codecs/rt5659.c b/sound/soc/codecs/rt5659.c index 07e7757417bc..ebadc3da0aaf 100644 --- a/sound/soc/codecs/rt5659.c +++ b/sound/soc/codecs/rt5659.c @@ -2500,9 +2500,9 @@ static const struct snd_soc_dapm_widget rt5659_dapm_widgets[] = { RT5659_PWR_ADC_L1_BIT, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("ADC1 R Power", RT5659_PWR_DIG_1, RT5659_PWR_ADC_R1_BIT, 0, NULL, 0), - SND_SOC_DAPM_SUPPLY("ADC2 L Power", RT5659_PWR_DIG_2, + SND_SOC_DAPM_SUPPLY("ADC2 L Power", RT5659_PWR_DIG_1, RT5659_PWR_ADC_L2_BIT, 0, NULL, 0), - SND_SOC_DAPM_SUPPLY("ADC2 R Power", RT5659_PWR_DIG_2, + SND_SOC_DAPM_SUPPLY("ADC2 R Power", RT5659_PWR_DIG_1, RT5659_PWR_ADC_R2_BIT, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("ADC1 clock", SND_SOC_NOPM, 0, 0, set_adc_clk, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
The control bits of ADC 1 and 2 clock are different. We have to separate it.
Signed-off-by: Zhong An zhongan@pinecone.net Signed-off-by: Bard Liao bardliao@realtek.com --- sound/soc/codecs/rt5659.c | 38 ++++++++++++++++++++++++++++++++------ sound/soc/codecs/rt5659.h | 12 ++++++++---- 2 files changed, 40 insertions(+), 10 deletions(-)
diff --git a/sound/soc/codecs/rt5659.c b/sound/soc/codecs/rt5659.c index a81e248..1c1a521 100644 --- a/sound/soc/codecs/rt5659.c +++ b/sound/soc/codecs/rt5659.c @@ -1622,7 +1622,7 @@ static int set_dmic_clk(struct snd_soc_dapm_widget *w, return idx; }
-static int set_adc_clk(struct snd_soc_dapm_widget *w, +static int set_adc1_clk(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); @@ -1630,13 +1630,39 @@ static int set_adc_clk(struct snd_soc_dapm_widget *w, switch (event) { case SND_SOC_DAPM_POST_PMU: snd_soc_component_update_bits(component, RT5659_CHOP_ADC, - RT5659_CKXEN_ADCC_MASK | RT5659_CKGEN_ADCC_MASK, - RT5659_CKXEN_ADCC_MASK | RT5659_CKGEN_ADCC_MASK); + RT5659_CKXEN_ADC1_MASK | RT5659_CKGEN_ADC1_MASK, + RT5659_CKXEN_ADC1_MASK | RT5659_CKGEN_ADC1_MASK); break;
case SND_SOC_DAPM_PRE_PMD: snd_soc_component_update_bits(component, RT5659_CHOP_ADC, - RT5659_CKXEN_ADCC_MASK | RT5659_CKGEN_ADCC_MASK, 0); + RT5659_CKXEN_ADC1_MASK | RT5659_CKGEN_ADC1_MASK, 0); + break; + + default: + return 0; + } + + return 0; + +} + +static int set_adc2_clk(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_component *component = + snd_soc_dapm_to_component(w->dapm); + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + snd_soc_component_update_bits(component, RT5659_CHOP_ADC, + RT5659_CKXEN_ADC2_MASK | RT5659_CKGEN_ADC2_MASK, + RT5659_CKXEN_ADC2_MASK | RT5659_CKGEN_ADC2_MASK); + break; + + case SND_SOC_DAPM_PRE_PMD: + snd_soc_component_update_bits(component, RT5659_CHOP_ADC, + RT5659_CKXEN_ADC2_MASK | RT5659_CKGEN_ADC2_MASK, 0); break;
default: @@ -2559,9 +2585,9 @@ static const struct snd_soc_dapm_widget rt5659_dapm_widgets[] = { RT5659_PWR_ADC_L2_BIT, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("ADC2 R Power", RT5659_PWR_DIG_1, RT5659_PWR_ADC_R2_BIT, 0, NULL, 0), - SND_SOC_DAPM_SUPPLY("ADC1 clock", SND_SOC_NOPM, 0, 0, set_adc_clk, + SND_SOC_DAPM_SUPPLY("ADC1 clock", SND_SOC_NOPM, 0, 0, set_adc1_clk, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), - SND_SOC_DAPM_SUPPLY("ADC2 clock", SND_SOC_NOPM, 0, 0, set_adc_clk, + SND_SOC_DAPM_SUPPLY("ADC2 clock", SND_SOC_NOPM, 0, 0, set_adc2_clk, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
/* ADC Mux */ diff --git a/sound/soc/codecs/rt5659.h b/sound/soc/codecs/rt5659.h index 3b51c8a..8b576d7 100644 --- a/sound/soc/codecs/rt5659.h +++ b/sound/soc/codecs/rt5659.h @@ -1743,10 +1743,14 @@ #define RT5659_CKGEN_DAC2_SFT 4
/* Chopper and Clock control for ADC (0x013b)*/ -#define RT5659_CKXEN_ADCC_MASK (0x1 << 13) -#define RT5659_CKXEN_ADCC_SFT 13 -#define RT5659_CKGEN_ADCC_MASK (0x1 << 12) -#define RT5659_CKGEN_ADCC_SFT 12 +#define RT5659_CKXEN_ADC1_MASK (0x1 << 13) +#define RT5659_CKXEN_ADC1_SFT 13 +#define RT5659_CKGEN_ADC1_MASK (0x1 << 12) +#define RT5659_CKGEN_ADC1_SFT 12 +#define RT5659_CKXEN_ADC2_MASK (0x1 << 5) +#define RT5659_CKXEN_ADC2_SFT 5 +#define RT5659_CKGEN_ADC2_MASK (0x1 << 4) +#define RT5659_CKGEN_ADC2_SFT 4
/* Test Mode Control 1 (0x0145) */ #define RT5659_AD2DA_LB_MASK (0x1 << 9)
The patch
ASoC: rt5659: Separate adc 1/2 clock control
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying to this mail.
Thanks, Mark
From ce571b80e2b2411d5cdfa78888a6865f918621c6 Mon Sep 17 00:00:00 2001
From: Bard Liao bardliao@realtek.com Date: Mon, 12 Mar 2018 19:50:09 +0800 Subject: [PATCH] ASoC: rt5659: Separate adc 1/2 clock control
The control bits of ADC 1 and 2 clock are different. We have to separate it.
Signed-off-by: Zhong An zhongan@pinecone.net Signed-off-by: Bard Liao bardliao@realtek.com Signed-off-by: Mark Brown broonie@kernel.org --- sound/soc/codecs/rt5659.c | 38 ++++++++++++++++++++++++++++++++------ sound/soc/codecs/rt5659.h | 12 ++++++++---- 2 files changed, 40 insertions(+), 10 deletions(-)
diff --git a/sound/soc/codecs/rt5659.c b/sound/soc/codecs/rt5659.c index a81e248dfdcd..1c1a521c73cb 100644 --- a/sound/soc/codecs/rt5659.c +++ b/sound/soc/codecs/rt5659.c @@ -1622,7 +1622,7 @@ static int set_dmic_clk(struct snd_soc_dapm_widget *w, return idx; }
-static int set_adc_clk(struct snd_soc_dapm_widget *w, +static int set_adc1_clk(struct snd_soc_dapm_widget *w, struct snd_kcontrol *kcontrol, int event) { struct snd_soc_component *component = snd_soc_dapm_to_component(w->dapm); @@ -1630,13 +1630,39 @@ static int set_adc_clk(struct snd_soc_dapm_widget *w, switch (event) { case SND_SOC_DAPM_POST_PMU: snd_soc_component_update_bits(component, RT5659_CHOP_ADC, - RT5659_CKXEN_ADCC_MASK | RT5659_CKGEN_ADCC_MASK, - RT5659_CKXEN_ADCC_MASK | RT5659_CKGEN_ADCC_MASK); + RT5659_CKXEN_ADC1_MASK | RT5659_CKGEN_ADC1_MASK, + RT5659_CKXEN_ADC1_MASK | RT5659_CKGEN_ADC1_MASK); break;
case SND_SOC_DAPM_PRE_PMD: snd_soc_component_update_bits(component, RT5659_CHOP_ADC, - RT5659_CKXEN_ADCC_MASK | RT5659_CKGEN_ADCC_MASK, 0); + RT5659_CKXEN_ADC1_MASK | RT5659_CKGEN_ADC1_MASK, 0); + break; + + default: + return 0; + } + + return 0; + +} + +static int set_adc2_clk(struct snd_soc_dapm_widget *w, + struct snd_kcontrol *kcontrol, int event) +{ + struct snd_soc_component *component = + snd_soc_dapm_to_component(w->dapm); + + switch (event) { + case SND_SOC_DAPM_POST_PMU: + snd_soc_component_update_bits(component, RT5659_CHOP_ADC, + RT5659_CKXEN_ADC2_MASK | RT5659_CKGEN_ADC2_MASK, + RT5659_CKXEN_ADC2_MASK | RT5659_CKGEN_ADC2_MASK); + break; + + case SND_SOC_DAPM_PRE_PMD: + snd_soc_component_update_bits(component, RT5659_CHOP_ADC, + RT5659_CKXEN_ADC2_MASK | RT5659_CKGEN_ADC2_MASK, 0); break;
default: @@ -2559,9 +2585,9 @@ static const struct snd_soc_dapm_widget rt5659_dapm_widgets[] = { RT5659_PWR_ADC_L2_BIT, 0, NULL, 0), SND_SOC_DAPM_SUPPLY("ADC2 R Power", RT5659_PWR_DIG_1, RT5659_PWR_ADC_R2_BIT, 0, NULL, 0), - SND_SOC_DAPM_SUPPLY("ADC1 clock", SND_SOC_NOPM, 0, 0, set_adc_clk, + SND_SOC_DAPM_SUPPLY("ADC1 clock", SND_SOC_NOPM, 0, 0, set_adc1_clk, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD), - SND_SOC_DAPM_SUPPLY("ADC2 clock", SND_SOC_NOPM, 0, 0, set_adc_clk, + SND_SOC_DAPM_SUPPLY("ADC2 clock", SND_SOC_NOPM, 0, 0, set_adc2_clk, SND_SOC_DAPM_POST_PMU | SND_SOC_DAPM_PRE_PMD),
/* ADC Mux */ diff --git a/sound/soc/codecs/rt5659.h b/sound/soc/codecs/rt5659.h index 3b51c8a46e6e..8b576d768744 100644 --- a/sound/soc/codecs/rt5659.h +++ b/sound/soc/codecs/rt5659.h @@ -1743,10 +1743,14 @@ #define RT5659_CKGEN_DAC2_SFT 4
/* Chopper and Clock control for ADC (0x013b)*/ -#define RT5659_CKXEN_ADCC_MASK (0x1 << 13) -#define RT5659_CKXEN_ADCC_SFT 13 -#define RT5659_CKGEN_ADCC_MASK (0x1 << 12) -#define RT5659_CKGEN_ADCC_SFT 12 +#define RT5659_CKXEN_ADC1_MASK (0x1 << 13) +#define RT5659_CKXEN_ADC1_SFT 13 +#define RT5659_CKGEN_ADC1_MASK (0x1 << 12) +#define RT5659_CKGEN_ADC1_SFT 12 +#define RT5659_CKXEN_ADC2_MASK (0x1 << 5) +#define RT5659_CKXEN_ADC2_SFT 5 +#define RT5659_CKGEN_ADC2_MASK (0x1 << 4) +#define RT5659_CKGEN_ADC2_SFT 4
/* Test Mode Control 1 (0x0145) */ #define RT5659_AD2DA_LB_MASK (0x1 << 9)
The patch
ASoC: rt5659: fix wrong bit define for ADC L2 power.
has been applied to the asoc tree at
https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying to this mail.
Thanks, Mark
From 9849ef555c7212f4ae93d752cfa1232488ec7c83 Mon Sep 17 00:00:00 2001
From: Bard Liao bardliao@realtek.com Date: Mon, 12 Mar 2018 19:50:07 +0800 Subject: [PATCH] ASoC: rt5659: fix wrong bit define for ADC L2 power.
RT5659_PWR_ADC_L2_BIT should be 2.
Signed-off-by: Zhong An zhongan@pinecone.net Signed-off-by: Bard Liao bardliao@realtek.com Signed-off-by: Mark Brown broonie@kernel.org --- sound/soc/codecs/rt5659.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/sound/soc/codecs/rt5659.h b/sound/soc/codecs/rt5659.h index 8f1aeef08489..3ae2d74861ef 100644 --- a/sound/soc/codecs/rt5659.h +++ b/sound/soc/codecs/rt5659.h @@ -1008,7 +1008,7 @@ #define RT5659_PWR_ADC_R1 (0x1 << 3) #define RT5659_PWR_ADC_R1_BIT 3 #define RT5659_PWR_ADC_L2 (0x1 << 2) -#define RT5659_PWR_ADC_L2_BIT 4 +#define RT5659_PWR_ADC_L2_BIT 2 #define RT5659_PWR_ADC_R2 (0x1 << 1) #define RT5659_PWR_ADC_R2_BIT 1 #define RT5659_PWR_CLS_D (0x1)
participants (2)
-
Bard Liao -
Mark Brown