[alsa-devel] [PATCH] ASoC: OMAP: Fix DSP DAI format in McBSP DAI driver
Fix word clock length which must equal to one bit clock cycle in DSP mode. Surprisingly McBSP is able synchronize into wrong length when it's slave but e.g. TLV320AIC33 codec in slave configuration is outputting some amount of noise if word clock length is longer than one bit clock cycle.
Fix also bit clock and frame sync polarities in DSP mode since they are opposite from I2S.
Signed-off-by: Jarkko Nikula jarkko.nikula@nokia.com Cc: Arun KS arunks@mistralsolutions.com
Signed-off-by: Jarkko Nikula jarkko.nikula@nokia.com --- sound/soc/omap/omap-mcbsp.c | 24 ++++++++++++++++++++---- 1 files changed, 20 insertions(+), 4 deletions(-)
diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c index 0a063a9..853b33a 100644 --- a/sound/soc/omap/omap-mcbsp.c +++ b/sound/soc/omap/omap-mcbsp.c @@ -43,6 +43,7 @@ struct omap_mcbsp_data { unsigned int bus_id; struct omap_mcbsp_reg_cfg regs; + unsigned int fmt; /* * Flags indicating is the bus already activated and configured by * another substream @@ -200,6 +201,7 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, struct omap_mcbsp_data *mcbsp_data = to_mcbsp(cpu_dai->private_data); struct omap_mcbsp_reg_cfg *regs = &mcbsp_data->regs; int dma, bus_id = mcbsp_data->bus_id, id = cpu_dai->id; + int wlen; unsigned long port;
if (cpu_class_is_omap1()) { @@ -244,19 +246,29 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, switch (params_format(params)) { case SNDRV_PCM_FORMAT_S16_LE: /* Set word lengths */ + wlen = 16; regs->rcr2 |= RWDLEN2(OMAP_MCBSP_WORD_16); regs->rcr1 |= RWDLEN1(OMAP_MCBSP_WORD_16); regs->xcr2 |= XWDLEN2(OMAP_MCBSP_WORD_16); regs->xcr1 |= XWDLEN1(OMAP_MCBSP_WORD_16); - /* Set FS period and length in terms of bit clock periods */ - regs->srgr2 |= FPER(16 * 2 - 1); - regs->srgr1 |= FWID(16 - 1); break; default: /* Unsupported PCM format */ return -EINVAL; }
+ /* Set FS period and length in terms of bit clock periods */ + switch (mcbsp_data->fmt & SND_SOC_DAIFMT_FORMAT_MASK) { + case SND_SOC_DAIFMT_I2S: + regs->srgr2 |= FPER(wlen * 2 - 1); + regs->srgr1 |= FWID(wlen - 1); + break; + case SND_SOC_DAIFMT_DSP_A: + regs->srgr2 |= FPER(wlen * 2 - 1); + regs->srgr1 |= FWID(0); + break; + } + omap_mcbsp_config(bus_id, &mcbsp_data->regs); mcbsp_data->configured = 1;
@@ -272,10 +284,12 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai, { struct omap_mcbsp_data *mcbsp_data = to_mcbsp(cpu_dai->private_data); struct omap_mcbsp_reg_cfg *regs = &mcbsp_data->regs; + unsigned int temp_fmt = fmt;
if (mcbsp_data->configured) return 0;
+ mcbsp_data->fmt = fmt; memset(regs, 0, sizeof(*regs)); /* Generic McBSP register settings */ regs->spcr2 |= XINTM(3) | FREE; @@ -293,6 +307,8 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai, /* 0-bit data delay */ regs->rcr2 |= RDATDLY(0); regs->xcr2 |= XDATDLY(0); + /* Invert bit clock and FS polarity configuration for DSP_A */ + temp_fmt ^= SND_SOC_DAIFMT_IB_IF; break; default: /* Unsupported data format */ @@ -316,7 +332,7 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai, }
/* Set bit clock (CLKX/CLKR) and FS polarities */ - switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + switch (temp_fmt & SND_SOC_DAIFMT_INV_MASK) { case SND_SOC_DAIFMT_NB_NF: /* * Normal BCLK + FS.
At Mon, 20 Oct 2008 15:29:59 +0300, Jarkko Nikula wrote:
Fix word clock length which must equal to one bit clock cycle in DSP mode. Surprisingly McBSP is able synchronize into wrong length when it's slave but e.g. TLV320AIC33 codec in slave configuration is outputting some amount of noise if word clock length is longer than one bit clock cycle.
Fix also bit clock and frame sync polarities in DSP mode since they are opposite from I2S.
Signed-off-by: Jarkko Nikula jarkko.nikula@nokia.com Cc: Arun KS arunks@mistralsolutions.com
Signed-off-by: Jarkko Nikula jarkko.nikula@nokia.com
Thanks, applied and put in the pull request for 2.6.28.
Takashi
sound/soc/omap/omap-mcbsp.c | 24 ++++++++++++++++++++---- 1 files changed, 20 insertions(+), 4 deletions(-)
diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c index 0a063a9..853b33a 100644 --- a/sound/soc/omap/omap-mcbsp.c +++ b/sound/soc/omap/omap-mcbsp.c @@ -43,6 +43,7 @@ struct omap_mcbsp_data { unsigned int bus_id; struct omap_mcbsp_reg_cfg regs;
- unsigned int fmt; /*
- Flags indicating is the bus already activated and configured by
- another substream
@@ -200,6 +201,7 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, struct omap_mcbsp_data *mcbsp_data = to_mcbsp(cpu_dai->private_data); struct omap_mcbsp_reg_cfg *regs = &mcbsp_data->regs; int dma, bus_id = mcbsp_data->bus_id, id = cpu_dai->id;
int wlen; unsigned long port;
if (cpu_class_is_omap1()) {
@@ -244,19 +246,29 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, switch (params_format(params)) { case SNDRV_PCM_FORMAT_S16_LE: /* Set word lengths */
wlen = 16;
/* Set FS period and length in terms of bit clock periods */regs->srgr2 |= FPER(16 * 2 - 1);regs->srgr1 |= FWID(16 - 1);
- /* Set FS period and length in terms of bit clock periods */
- switch (mcbsp_data->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {
- case SND_SOC_DAIFMT_I2S:
regs->srgr2 |= FPER(wlen * 2 - 1);regs->srgr1 |= FWID(wlen - 1);break;- case SND_SOC_DAIFMT_DSP_A:
regs->srgr2 |= FPER(wlen * 2 - 1);regs->srgr1 |= FWID(0);break;- }
- omap_mcbsp_config(bus_id, &mcbsp_data->regs); mcbsp_data->configured = 1;
@@ -272,10 +284,12 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai, { struct omap_mcbsp_data *mcbsp_data = to_mcbsp(cpu_dai->private_data); struct omap_mcbsp_reg_cfg *regs = &mcbsp_data->regs;
unsigned int temp_fmt = fmt;
if (mcbsp_data->configured) return 0;
mcbsp_data->fmt = fmt; memset(regs, 0, sizeof(*regs)); /* Generic McBSP register settings */ regs->spcr2 |= XINTM(3) | FREE;
@@ -293,6 +307,8 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai, /* 0-bit data delay */ regs->rcr2 |= RDATDLY(0); regs->xcr2 |= XDATDLY(0);
/* Invert bit clock and FS polarity configuration for DSP_A */temp_fmt ^= SND_SOC_DAIFMT_IB_IF;@@ -316,7 +332,7 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai, }
/* Set bit clock (CLKX/CLKR) and FS polarities */
- switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
- switch (temp_fmt & SND_SOC_DAIFMT_INV_MASK) { case SND_SOC_DAIFMT_NB_NF: /*
- Normal BCLK + FS.
-- 1.5.6.5
Alsa-devel mailing list Alsa-devel@alsa-project.org http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
On Mon, Oct 20, 2008 at 5:59 PM, Jarkko Nikula jarkko.nikula@nokia.com wrote:
Fix word clock length which must equal to one bit clock cycle in DSP mode. Surprisingly McBSP is able synchronize into wrong length when it's slave but e.g. TLV320AIC33 codec in slave configuration is outputting some amount of noise if word clock length is longer than one bit clock cycle.
Fix also bit clock and frame sync polarities in DSP mode since they are opposite from I2S.
Signed-off-by: Jarkko Nikula jarkko.nikula@nokia.com Cc: Arun KS arunks@mistralsolutions.com
Signed-off-by: Jarkko Nikula jarkko.nikula@nokia.com
sound/soc/omap/omap-mcbsp.c | 24 ++++++++++++++++++++---- 1 files changed, 20 insertions(+), 4 deletions(-)
diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c index 0a063a9..853b33a 100644 --- a/sound/soc/omap/omap-mcbsp.c +++ b/sound/soc/omap/omap-mcbsp.c @@ -43,6 +43,7 @@ struct omap_mcbsp_data { unsigned int bus_id; struct omap_mcbsp_reg_cfg regs;
unsigned int fmt; /* * Flags indicating is the bus already activated and configured by * another substream@@ -200,6 +201,7 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, struct omap_mcbsp_data *mcbsp_data = to_mcbsp(cpu_dai->private_data); struct omap_mcbsp_reg_cfg *regs = &mcbsp_data->regs; int dma, bus_id = mcbsp_data->bus_id, id = cpu_dai->id;
int wlen; unsigned long port; if (cpu_class_is_omap1()) {@@ -244,19 +246,29 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, switch (params_format(params)) { case SNDRV_PCM_FORMAT_S16_LE: /* Set word lengths */
wlen = 16; regs->rcr2 |= RWDLEN2(OMAP_MCBSP_WORD_16); regs->rcr1 |= RWDLEN1(OMAP_MCBSP_WORD_16); regs->xcr2 |= XWDLEN2(OMAP_MCBSP_WORD_16); regs->xcr1 |= XWDLEN1(OMAP_MCBSP_WORD_16);
/* Set FS period and length in terms of bit clock periods */regs->srgr2 |= FPER(16 * 2 - 1);regs->srgr1 |= FWID(16 - 1); break; default: /* Unsupported PCM format */ return -EINVAL; }
/* Set FS period and length in terms of bit clock periods */switch (mcbsp_data->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {case SND_SOC_DAIFMT_I2S:regs->srgr2 |= FPER(wlen * 2 - 1);regs->srgr1 |= FWID(wlen - 1);break;case SND_SOC_DAIFMT_DSP_A:regs->srgr2 |= FPER(wlen * 2 - 1);regs->srgr1 |= FWID(0);break;}omap_mcbsp_config(bus_id, &mcbsp_data->regs); mcbsp_data->configured = 1;@@ -272,10 +284,12 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai, { struct omap_mcbsp_data *mcbsp_data = to_mcbsp(cpu_dai->private_data); struct omap_mcbsp_reg_cfg *regs = &mcbsp_data->regs;
unsigned int temp_fmt = fmt; if (mcbsp_data->configured) return 0;mcbsp_data->fmt = fmt; memset(regs, 0, sizeof(*regs)); /* Generic McBSP register settings */ regs->spcr2 |= XINTM(3) | FREE;@@ -293,6 +307,8 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai, /* 0-bit data delay */ regs->rcr2 |= RDATDLY(0); regs->xcr2 |= XDATDLY(0);
/* Invert bit clock and FS polarity configuration for DSP_A */temp_fmt ^= SND_SOC_DAIFMT_IB_IF; break; default: /* Unsupported data format */@@ -316,7 +332,7 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai, }
/* Set bit clock (CLKX/CLKR) and FS polarities */
switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
switch (temp_fmt & SND_SOC_DAIFMT_INV_MASK) { case SND_SOC_DAIFMT_NB_NF: /* * Normal BCLK + FS.-- 1.5.6.5
Alsa-devel mailing list Alsa-devel@alsa-project.org http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
Hi Jarkko,
I can get the audio playback working by applying this patch on tlvaic23 and osk5912. But capture is having a lot of noise.
diff --git a/sound/soc/codecs/tlv320aic23.c b/sound/soc/codecs/tlv320aic23.c index 05138d1..327c55a 100644 --- a/sound/soc/codecs/tlv320aic23.c +++ b/sound/soc/codecs/tlv320aic23.c @@ -413,6 +413,23 @@ static int tlv320aic23_set_dai_fmt(struct snd_soc_dai *codec_dai,
}
+ /* clock inversion */ + switch (fmt & SND_SOC_DAIFMT_INV_MASK) { + case SND_SOC_DAIFMT_NB_NF: + break; + case SND_SOC_DAIFMT_IB_IF: + iface_reg |= 0x0010; + break; + case SND_SOC_DAIFMT_IB_NF: + break; + case SND_SOC_DAIFMT_NB_IF: + iface_reg |= 0x0010; + break; + default: + return -EINVAL; + } + + tlv320aic23_write(codec, TLV320AIC23_DIGT_FMT, iface_reg);
return 0;
Regards Arun
On Wed, 22 Oct 2008 11:32:35 +0530 "ext Arun KS" getarunks@gmail.com wrote:
Hi Jarkko,
I can get the audio playback working by applying this patch on tlvaic23 and osk5912. But capture is having a lot of noise.
Thanks for testing!
Very interesting, the DSP modes in aic23 and aic33 are not compatible and my patch was tuned according to aic33. In aic23 the falling edge of FS starts the transfer in DSP mode where in aic33 it's opposite.
AIC23: " A falling edge on LRCIN or LRCOUT starts the data transfer. The left-channel data consists of the first data word, which is immediately followed by the right channel data word (see Figure 3-8). Input word length is defined by the IWL register. Figure 3– 8 shows LRP = 1 (default LRP = 0). "
AIC33: " In DSP mode, the rising edge of the word clock starts the data transfer with the left channel data first and immediately followed by the right channel data. Each data bit is valid on the falling edge of the bit clock. "
Wolfson's spec for WM9713 made it much more clear. The DSP_A there is the same format what AIC23 is using and DSP_B is almost what AIC33 is using but bit clock polarity is different.
http://www.wolfsonmicro.com/uploads/documents/en/WM9713.pdf
I'll fix omap-mcbsp.c so that DSP_A is the format what AIC23 and WM9713 are using and think later what to do with AIC33 and DSP_B :-)
Jarkko
On Mon, Oct 20, 2008 at 5:59 PM, Jarkko Nikula jarkko.nikula@nokia.com wrote:
Fix word clock length which must equal to one bit clock cycle in DSP mode. Surprisingly McBSP is able synchronize into wrong length when it's slave but e.g. TLV320AIC33 codec in slave configuration is outputting some amount of noise if word clock length is longer than one bit clock cycle.
Fix also bit clock and frame sync polarities in DSP mode since they are opposite from I2S.
Signed-off-by: Jarkko Nikula jarkko.nikula@nokia.com Cc: Arun KS arunks@mistralsolutions.com
Signed-off-by: Jarkko Nikula jarkko.nikula@nokia.com
sound/soc/omap/omap-mcbsp.c | 24 ++++++++++++++++++++---- 1 files changed, 20 insertions(+), 4 deletions(-)
diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c index 0a063a9..853b33a 100644 --- a/sound/soc/omap/omap-mcbsp.c +++ b/sound/soc/omap/omap-mcbsp.c @@ -43,6 +43,7 @@ struct omap_mcbsp_data { unsigned int bus_id; struct omap_mcbsp_reg_cfg regs;
unsigned int fmt; /* * Flags indicating is the bus already activated and configured by * another substream@@ -200,6 +201,7 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, struct omap_mcbsp_data *mcbsp_data = to_mcbsp(cpu_dai->private_data); struct omap_mcbsp_reg_cfg *regs = &mcbsp_data->regs; int dma, bus_id = mcbsp_data->bus_id, id = cpu_dai->id;
int wlen; unsigned long port; if (cpu_class_is_omap1()) {@@ -244,19 +246,29 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, switch (params_format(params)) { case SNDRV_PCM_FORMAT_S16_LE: /* Set word lengths */
wlen = 16; regs->rcr2 |= RWDLEN2(OMAP_MCBSP_WORD_16); regs->rcr1 |= RWDLEN1(OMAP_MCBSP_WORD_16); regs->xcr2 |= XWDLEN2(OMAP_MCBSP_WORD_16); regs->xcr1 |= XWDLEN1(OMAP_MCBSP_WORD_16);
/* Set FS period and length in terms of bit clock periods */regs->srgr2 |= FPER(16 * 2 - 1);regs->srgr1 |= FWID(16 - 1); break; default: /* Unsupported PCM format */ return -EINVAL; }
/* Set FS period and length in terms of bit clock periods */switch (mcbsp_data->fmt & SND_SOC_DAIFMT_FORMAT_MASK) {case SND_SOC_DAIFMT_I2S:regs->srgr2 |= FPER(wlen * 2 - 1);regs->srgr1 |= FWID(wlen - 1);break;case SND_SOC_DAIFMT_DSP_A:regs->srgr2 |= FPER(wlen * 2 - 1);regs->srgr1 |= FWID(0);break;}omap_mcbsp_config(bus_id, &mcbsp_data->regs); mcbsp_data->configured = 1;@@ -272,10 +284,12 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai, { struct omap_mcbsp_data *mcbsp_data = to_mcbsp(cpu_dai->private_data); struct omap_mcbsp_reg_cfg *regs = &mcbsp_data->regs;
unsigned int temp_fmt = fmt; if (mcbsp_data->configured) return 0;mcbsp_data->fmt = fmt; memset(regs, 0, sizeof(*regs)); /* Generic McBSP register settings */ regs->spcr2 |= XINTM(3) | FREE;@@ -293,6 +307,8 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai, /* 0-bit data delay */ regs->rcr2 |= RDATDLY(0); regs->xcr2 |= XDATDLY(0);
/* Invert bit clock and FS polarity configuration for DSP_A */temp_fmt ^= SND_SOC_DAIFMT_IB_IF;
Can you tell me why this is done here? This is modifying what machine driver has chosen. AM I missing something?
break; default: /* Unsupported data format */@@ -316,7 +332,7 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai, }
/* Set bit clock (CLKX/CLKR) and FS polarities */
switch (fmt & SND_SOC_DAIFMT_INV_MASK) {
switch (temp_fmt & SND_SOC_DAIFMT_INV_MASK) { case SND_SOC_DAIFMT_NB_NF: /* * Normal BCLK + FS.-- 1.5.6.5
Alsa-devel mailing list Alsa-devel@alsa-project.org http://mailman.alsa-project.org/mailman/listinfo/alsa-devel
On Wed, 22 Oct 2008 15:26:36 +0530 "ext Arun KS" getarunks@gmail.com wrote:
/* Generic McBSP register settings */ regs->spcr2 |= XINTM(3) | FREE;@@ -293,6 +307,8 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai, /* 0-bit data delay */ regs->rcr2 |= RDATDLY(0); regs->xcr2 |= XDATDLY(0);
/* Invert bit clock and FS polarity configuration for DSP_A */temp_fmt ^= SND_SOC_DAIFMT_IB_IF;Can you tell me why this is done here? This is modifying what machine driver has chosen. AM I missing something?
Since as a McBSP sense, the normal polarities in DSP format (or according to AIC33 DSP mode...) were different than in I2S. Idea is to keep codec and cpu configuration in sync in the machine driver, i.e. same bit clock and frame sync polarity configuration
/* Set codec DAI configuration */ err = snd_soc_dai_set_fmt(codec_dai, SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBM_CFM);
/* Set cpu DAI configuration */ err = snd_soc_dai_set_fmt(cpu_dai, SND_SOC_DAIFMT_I2S | SND_SOC_DAIFMT_NB_NF | SND_SOC_DAIFMT_CBM_CFM);
Jarkko
On Wed, Oct 22, 2008 at 01:12:25PM +0300, Jarkko Nikula wrote:
This is modifying what machine driver has chosen. AM I missing something?
Since as a McBSP sense, the normal polarities in DSP format (or according to AIC33 DSP mode...) were different than in I2S. Idea is to keep codec and cpu configuration in sync in the machine driver, i.e. same bit clock and frame sync polarity configuration
Hrm - this suggests that one or more of your codec drivers may be getting this wrong. I would expect that the inversion of bit and frame clocks should be with respect to the normal behaviour of the mode, not with respect to I2S mode.
On Wed, 22 Oct 2008 11:29:36 +0100 "ext Mark Brown" broonie@sirena.org.uk wrote:
On Wed, Oct 22, 2008 at 01:12:25PM +0300, Jarkko Nikula wrote:
This is modifying what machine driver has chosen. AM I missing something?
Since as a McBSP sense, the normal polarities in DSP format (or according to AIC33 DSP mode...) were different than in I2S. Idea is to keep codec and cpu configuration in sync in the machine driver, i.e. same bit clock and frame sync polarity configuration
Hrm - this suggests that one or more of your codec drivers may be getting this wrong. I would expect that the inversion of bit and frame clocks should be with respect to the normal behaviour of the mode, not with respect to I2S mode.
Yep, that was the idea. As I told before I made this patch according to DSP mode of AIC33 which seems to be somewhat near DSP_B but not the the same e.g. what WM9713 is using. So at least have to do some changes into AIC33 driver to not claim to support DSP_A.
Can you Arun test does the following fix on top of my original patch work on OSK? My codec is Tektronix TDS2024 connected into Beagle so cannot hear is it playing correctly :-)
Jarkko
diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c index 853b33a..4e86d52 100644 --- a/sound/soc/omap/omap-mcbsp.c +++ b/sound/soc/omap/omap-mcbsp.c @@ -265,7 +265,7 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, break; case SND_SOC_DAIFMT_DSP_A: regs->srgr2 |= FPER(wlen * 2 - 1); - regs->srgr1 |= FWID(0); + regs->srgr1 |= FWID(wlen * 2 - 2); break; }
@@ -307,8 +307,6 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai, /* 0-bit data delay */ regs->rcr2 |= RDATDLY(0); regs->xcr2 |= XDATDLY(0); - /* Invert bit clock and FS polarity configuration for DSP_A */ - temp_fmt ^= SND_SOC_DAIFMT_IB_IF; break; default: /* Unsupported data format */
On Wed, Oct 22, 2008 at 4:29 PM, Jarkko Nikula jarkko.nikula@nokia.com wrote:
On Wed, 22 Oct 2008 11:29:36 +0100 "ext Mark Brown" broonie@sirena.org.uk wrote:
On Wed, Oct 22, 2008 at 01:12:25PM +0300, Jarkko Nikula wrote:
This is modifying what machine driver has chosen. AM I missing something?
Since as a McBSP sense, the normal polarities in DSP format (or according to AIC33 DSP mode...) were different than in I2S. Idea is to keep codec and cpu configuration in sync in the machine driver, i.e. same bit clock and frame sync polarity configuration
Hrm - this suggests that one or more of your codec drivers may be getting this wrong. I would expect that the inversion of bit and frame clocks should be with respect to the normal behaviour of the mode, not with respect to I2S mode.
Yep, that was the idea. As I told before I made this patch according to DSP mode of AIC33 which seems to be somewhat near DSP_B but not the the same e.g. what WM9713 is using. So at least have to do some changes into AIC33 driver to not claim to support DSP_A.
Can you Arun test does the following fix on top of my original patch work on OSK? My codec is Tektronix TDS2024 connected into Beagle so cannot hear is it playing correctly :-)
This patch works fine on osk5912.
Thanks, Arun
Jarkko
diff --git a/sound/soc/omap/omap-mcbsp.c b/sound/soc/omap/omap-mcbsp.c index 853b33a..4e86d52 100644 --- a/sound/soc/omap/omap-mcbsp.c +++ b/sound/soc/omap/omap-mcbsp.c @@ -265,7 +265,7 @@ static int omap_mcbsp_dai_hw_params(struct snd_pcm_substream *substream, break; case SND_SOC_DAIFMT_DSP_A: regs->srgr2 |= FPER(wlen * 2 - 1);
regs->srgr1 |= FWID(0);
regs->srgr1 |= FWID(wlen * 2 - 2); break; }@@ -307,8 +307,6 @@ static int omap_mcbsp_dai_set_dai_fmt(struct snd_soc_dai *cpu_dai, /* 0-bit data delay */ regs->rcr2 |= RDATDLY(0); regs->xcr2 |= XDATDLY(0);
/* Invert bit clock and FS polarity configuration for DSP_A */temp_fmt ^= SND_SOC_DAIFMT_IB_IF; break; default: /* Unsupported data format */
participants (4)
-
Arun KS -
Jarkko Nikula -
Mark Brown -
Takashi Iwai