[alsa-devel] [PATCH 1/2] dt-bindings: sound: Convert Samsung I2S controller to dt-schema
Convert Samsung I2S controller to newer dt-schema format
Signed-off-by: Maciej Falkowski m.falkowski@samsung.com --- .../devicetree/bindings/sound/samsung-i2s.txt | 84 ------------- .../bindings/sound/samsung-i2s.yaml | 119 ++++++++++++++++++ 2 files changed, 119 insertions(+), 84 deletions(-) delete mode 100644 Documentation/devicetree/bindings/sound/samsung-i2s.txt create mode 100644 Documentation/devicetree/bindings/sound/samsung-i2s.yaml
diff --git a/Documentation/devicetree/bindings/sound/samsung-i2s.txt b/Documentation/devicetree/bindings/sound/samsung-i2s.txt deleted file mode 100644 index a88cb00fa096..000000000000 --- a/Documentation/devicetree/bindings/sound/samsung-i2s.txt +++ /dev/null @@ -1,84 +0,0 @@ -* Samsung I2S controller - -Required SoC Specific Properties: - -- compatible : should be one of the following. - - samsung,s3c6410-i2s: for 8/16/24bit stereo I2S. - - samsung,s5pv210-i2s: for 8/16/24bit multichannel(5.1) I2S with - secondary fifo, s/w reset control and internal mux for root clk src. - - samsung,exynos5420-i2s: for 8/16/24bit multichannel(5.1) I2S for - playback, stereo channel capture, secondary fifo using internal - or external dma, s/w reset control, internal mux for root clk src - and 7.1 channel TDM support for playback. TDM (Time division multiplexing) - is to allow transfer of multiple channel audio data on single data line. - - samsung,exynos7-i2s: with all the available features of exynos5 i2s, - exynos7 I2S has 7.1 channel TDM support for capture, secondary fifo - with only external dma and more no.of root clk sampling frequencies. - - samsung,exynos7-i2s1: I2S1 on previous samsung platforms supports - stereo channels. exynos7 i2s1 upgraded to 5.1 multichannel with - slightly modified bit offsets. - -- reg: physical base address of the controller and length of memory mapped - region. -- dmas: list of DMA controller phandle and DMA request line ordered pairs. -- dma-names: identifier string for each DMA request line in the dmas property. - These strings correspond 1:1 with the ordered pairs in dmas. -- clocks: Handle to iis clock and RCLK source clk. -- clock-names: - i2s0 uses some base clocks from CMU and some are from audio subsystem internal - clock controller. The clock names for i2s0 should be "iis", "i2s_opclk0" and - "i2s_opclk1" as shown in the example below. - i2s1 and i2s2 uses clocks from CMU. The clock names for i2s1 and i2s2 should - be "iis" and "i2s_opclk0". - "iis" is the i2s bus clock and i2s_opclk0, i2s_opclk1 are sources of the root - clk. i2s0 has internal mux to select the source of root clk and i2s1 and i2s2 - doesn't have any such mux. -- #clock-cells: should be 1, this property must be present if the I2S device - is a clock provider in terms of the common clock bindings, described in - ../clock/clock-bindings.txt. -- clock-output-names (deprecated): from the common clock bindings, names of - the CDCLK I2S output clocks, suggested values are "i2s_cdclk0", "i2s_cdclk1", - "i2s_cdclk3" for the I2S0, I2S1, I2S2 devices respectively. - -There are following clocks available at the I2S device nodes: - CLK_I2S_CDCLK - the CDCLK (CODECLKO) gate clock, - CLK_I2S_RCLK_PSR - the RCLK prescaler divider clock (corresponding to the - IISPSR register), - CLK_I2S_RCLK_SRC - the RCLKSRC mux clock (corresponding to RCLKSRC bit in - IISMOD register). - -Refer to the SoC datasheet for availability of the above clocks. -The CLK_I2S_RCLK_PSR and CLK_I2S_RCLK_SRC clocks are usually only available -in the IIS Multi Audio Interface. - -Note: Old DTs may not have the #clock-cells property and then not use the I2S -node as a clock supplier. - -Optional SoC Specific Properties: - -- samsung,idma-addr: Internal DMA register base address of the audio - sub system(used in secondary sound source). -- pinctrl-0: Should specify pin control groups used for this controller. -- pinctrl-names: Should contain only one value - "default". -- #sound-dai-cells: should be 1. - - -Example: - -i2s0: i2s@3830000 { - compatible = "samsung,s5pv210-i2s"; - reg = <0x03830000 0x100>; - dmas = <&pdma0 10 - &pdma0 9 - &pdma0 8>; - dma-names = "tx", "rx", "tx-sec"; - clocks = <&clock_audss EXYNOS_I2S_BUS>, - <&clock_audss EXYNOS_I2S_BUS>, - <&clock_audss EXYNOS_SCLK_I2S>; - clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; - #clock-cells = <1>; - samsung,idma-addr = <0x03000000>; - pinctrl-names = "default"; - pinctrl-0 = <&i2s0_bus>; - #sound-dai-cells = <1>; -}; diff --git a/Documentation/devicetree/bindings/sound/samsung-i2s.yaml b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml new file mode 100644 index 000000000000..59dc76035cb4 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml @@ -0,0 +1,119 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/samsung-i2s.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung SoC I2S controller + +maintainers: + - Krzysztof Kozlowski krzk@kernel.org + - Sangbeom Kim sbkim73@samsung.com + - Sylwester Nawrocki s.nawrocki@samsung.com + +properties: + compatible: + description: | + samsung,s3c6410-i2s: for 8/16/24bit stereo I2S. + + samsung,s5pv210-i2s: for 8/16/24bit multichannel(5.1) I2S with + secondary fifo, s/w reset control and internal mux for root clk src. + + samsung,exynos5420-i2s: for 8/16/24bit multichannel(5.1) I2S for + playback, stereo channel capture, secondary fifo using internal + or external dma, s/w reset control, internal mux for root clk src + and 7.1 channel TDM support for playback. TDM (Time division multiplexing) + is to allow transfer of multiple channel audio data on single data line. + + samsung,exynos7-i2s: with all the available features of exynos5 i2s. + + exynos7 I2S has 7.1 channel TDM support for capture, secondary fifo + with only external dma and more no.of root clk sampling frequencies. + + samsung,exynos7-i2s1: I2S1 on previous samsung platforms supports + stereo channels. exynos7 i2s1 upgraded to 5.1 multichannel with + slightly modified bit offsets. + enum: + - "samsung,s3c6410-i2s" + - "samsung,s5pv210-i2s" + - "samsung,exynos5420-i2s" + - "samsung,exynos7-i2s" + - "samsung,exynos7-i2s1" + + reg: + maxItems: 1 + + dmas: + description: list of DMA controller phandle and DMA request line ordered pairs. + + dma-names: + description: | + identifier string for each DMA request line in the dmas property. + These strings correspond 1:1 with the ordered pairs in dmas. + + clocks: + minItems: 1 + maxItems: 3 + + clock-names: + oneOf: + - items: + - const: iis + - items: + - const: iis + - const: i2s_opclk0 + - items: + - const: iis + - const: i2s_opclk0 + - const: i2s_opclk1 + description: | + "iis" is the i2s bus clock. + For i2s1 and i2s2 - "iis", "i2s_opclk0" + For i2s0 - "iis", "i2s_opclk0", "i2s_opclk1" + + "#clock-cells": + const: 1 + + samsung,idma-addr: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Internal DMA register base address of the audio + sub system(used in secondary sound source). + + pinctrl-0: + description: Should specify pin control groups used for this controller. + + pinctrl-names: + const: default + + "#sound-dai-cells": + const: 1 + +required: + - compatible + - reg + - dmas + - dma-names + - clocks + - clock-names + +examples: + - | + i2s0: i2s@3830000 { + compatible = "samsung,s5pv210-i2s"; + reg = <0x03830000 0x100>; + dmas = <&pdma0 10 + &pdma0 9 + &pdma0 8>; + dma-names = "tx", "rx", "tx-sec"; + clocks = <&clock_audss 0>, // EXYNOS_I2S_BUS + <&clock_audss 0>, // EXYNOS_I2S_BUS + <&clock_audss 0>; // EXYNOS_SCLK_I2S + clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; + #clock-cells = <1>; + samsung,idma-addr = <0x03000000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s0_bus>; + #sound-dai-cells = <1>; + }; +
Convert Samsung SMDK audio complex to newer dt-schema format.
Signed-off-by: Maciej Falkowski m.falkowski@samsung.com --- .../bindings/sound/samsung,smdk-wm8994.txt | 14 ------- .../bindings/sound/samsung,smdk-wm8994.yaml | 38 +++++++++++++++++++ 2 files changed, 38 insertions(+), 14 deletions(-) delete mode 100644 Documentation/devicetree/bindings/sound/samsung,smdk-wm8994.txt create mode 100644 Documentation/devicetree/bindings/sound/samsung,smdk-wm8994.yaml
diff --git a/Documentation/devicetree/bindings/sound/samsung,smdk-wm8994.txt b/Documentation/devicetree/bindings/sound/samsung,smdk-wm8994.txt deleted file mode 100644 index 4686646fb122..000000000000 --- a/Documentation/devicetree/bindings/sound/samsung,smdk-wm8994.txt +++ /dev/null @@ -1,14 +0,0 @@ -Samsung SMDK audio complex - -Required properties: -- compatible : "samsung,smdk-wm8994" -- samsung,i2s-controller: The phandle of the Samsung I2S0 controller -- samsung,audio-codec: The phandle of the WM8994 audio codec -Example: - -sound { - compatible = "samsung,smdk-wm8994"; - - samsung,i2s-controller = <&i2s0>; - samsung,audio-codec = <&wm8994>; -}; diff --git a/Documentation/devicetree/bindings/sound/samsung,smdk-wm8994.yaml b/Documentation/devicetree/bindings/sound/samsung,smdk-wm8994.yaml new file mode 100644 index 000000000000..a66c0dfdeb57 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/samsung,smdk-wm8994.yaml @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/samsung,smdk-wm8994.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung SoC SMDK audio complex + +maintainers: + - Krzysztof Kozlowski krzk@kernel.org + - Sangbeom Kim sbkim73@samsung.com + - Sylwester Nawrocki s.nawrocki@samsung.com + +properties: + compatible: + const: "samsung,smdk-wm8994" + + samsung,i2s-controller: + $ref: /schemas/types.yaml#/definitions/phandle + description: The phandle of the Samsung I2S0 controller + + samsung,audio-codec: + $ref: /schemas/types.yaml#/definitions/phandle + description: The phandle of the WM8994 audio codec + +required: + - compatible + - samsung,i2s-controller + - samsung,audio-codec + +examples: + - | + sound { + compatible = "samsung,smdk-wm8994"; + samsung,i2s-controller = <&i2s0>; + samsung,audio-codec = <&wm8994>; + }; +
Convert Samsung I2S controller to newer dt-schema format.
Signed-off-by: Maciej Falkowski m.falkowski@samsung.com Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com --- v2: - Added missing Signed-off-by certificate --- .../devicetree/bindings/sound/samsung-i2s.txt | 84 ------------- .../bindings/sound/samsung-i2s.yaml | 119 ++++++++++++++++++ 2 files changed, 119 insertions(+), 84 deletions(-) delete mode 100644 Documentation/devicetree/bindings/sound/samsung-i2s.txt create mode 100644 Documentation/devicetree/bindings/sound/samsung-i2s.yaml
diff --git a/Documentation/devicetree/bindings/sound/samsung-i2s.txt b/Documentation/devicetree/bindings/sound/samsung-i2s.txt deleted file mode 100644 index a88cb00fa096..000000000000 --- a/Documentation/devicetree/bindings/sound/samsung-i2s.txt +++ /dev/null @@ -1,84 +0,0 @@ -* Samsung I2S controller - -Required SoC Specific Properties: - -- compatible : should be one of the following. - - samsung,s3c6410-i2s: for 8/16/24bit stereo I2S. - - samsung,s5pv210-i2s: for 8/16/24bit multichannel(5.1) I2S with - secondary fifo, s/w reset control and internal mux for root clk src. - - samsung,exynos5420-i2s: for 8/16/24bit multichannel(5.1) I2S for - playback, stereo channel capture, secondary fifo using internal - or external dma, s/w reset control, internal mux for root clk src - and 7.1 channel TDM support for playback. TDM (Time division multiplexing) - is to allow transfer of multiple channel audio data on single data line. - - samsung,exynos7-i2s: with all the available features of exynos5 i2s, - exynos7 I2S has 7.1 channel TDM support for capture, secondary fifo - with only external dma and more no.of root clk sampling frequencies. - - samsung,exynos7-i2s1: I2S1 on previous samsung platforms supports - stereo channels. exynos7 i2s1 upgraded to 5.1 multichannel with - slightly modified bit offsets. - -- reg: physical base address of the controller and length of memory mapped - region. -- dmas: list of DMA controller phandle and DMA request line ordered pairs. -- dma-names: identifier string for each DMA request line in the dmas property. - These strings correspond 1:1 with the ordered pairs in dmas. -- clocks: Handle to iis clock and RCLK source clk. -- clock-names: - i2s0 uses some base clocks from CMU and some are from audio subsystem internal - clock controller. The clock names for i2s0 should be "iis", "i2s_opclk0" and - "i2s_opclk1" as shown in the example below. - i2s1 and i2s2 uses clocks from CMU. The clock names for i2s1 and i2s2 should - be "iis" and "i2s_opclk0". - "iis" is the i2s bus clock and i2s_opclk0, i2s_opclk1 are sources of the root - clk. i2s0 has internal mux to select the source of root clk and i2s1 and i2s2 - doesn't have any such mux. -- #clock-cells: should be 1, this property must be present if the I2S device - is a clock provider in terms of the common clock bindings, described in - ../clock/clock-bindings.txt. -- clock-output-names (deprecated): from the common clock bindings, names of - the CDCLK I2S output clocks, suggested values are "i2s_cdclk0", "i2s_cdclk1", - "i2s_cdclk3" for the I2S0, I2S1, I2S2 devices respectively. - -There are following clocks available at the I2S device nodes: - CLK_I2S_CDCLK - the CDCLK (CODECLKO) gate clock, - CLK_I2S_RCLK_PSR - the RCLK prescaler divider clock (corresponding to the - IISPSR register), - CLK_I2S_RCLK_SRC - the RCLKSRC mux clock (corresponding to RCLKSRC bit in - IISMOD register). - -Refer to the SoC datasheet for availability of the above clocks. -The CLK_I2S_RCLK_PSR and CLK_I2S_RCLK_SRC clocks are usually only available -in the IIS Multi Audio Interface. - -Note: Old DTs may not have the #clock-cells property and then not use the I2S -node as a clock supplier. - -Optional SoC Specific Properties: - -- samsung,idma-addr: Internal DMA register base address of the audio - sub system(used in secondary sound source). -- pinctrl-0: Should specify pin control groups used for this controller. -- pinctrl-names: Should contain only one value - "default". -- #sound-dai-cells: should be 1. - - -Example: - -i2s0: i2s@3830000 { - compatible = "samsung,s5pv210-i2s"; - reg = <0x03830000 0x100>; - dmas = <&pdma0 10 - &pdma0 9 - &pdma0 8>; - dma-names = "tx", "rx", "tx-sec"; - clocks = <&clock_audss EXYNOS_I2S_BUS>, - <&clock_audss EXYNOS_I2S_BUS>, - <&clock_audss EXYNOS_SCLK_I2S>; - clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; - #clock-cells = <1>; - samsung,idma-addr = <0x03000000>; - pinctrl-names = "default"; - pinctrl-0 = <&i2s0_bus>; - #sound-dai-cells = <1>; -}; diff --git a/Documentation/devicetree/bindings/sound/samsung-i2s.yaml b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml new file mode 100644 index 000000000000..59dc76035cb4 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml @@ -0,0 +1,119 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/samsung-i2s.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung SoC I2S controller + +maintainers: + - Krzysztof Kozlowski krzk@kernel.org + - Sangbeom Kim sbkim73@samsung.com + - Sylwester Nawrocki s.nawrocki@samsung.com + +properties: + compatible: + description: | + samsung,s3c6410-i2s: for 8/16/24bit stereo I2S. + + samsung,s5pv210-i2s: for 8/16/24bit multichannel(5.1) I2S with + secondary fifo, s/w reset control and internal mux for root clk src. + + samsung,exynos5420-i2s: for 8/16/24bit multichannel(5.1) I2S for + playback, stereo channel capture, secondary fifo using internal + or external dma, s/w reset control, internal mux for root clk src + and 7.1 channel TDM support for playback. TDM (Time division multiplexing) + is to allow transfer of multiple channel audio data on single data line. + + samsung,exynos7-i2s: with all the available features of exynos5 i2s. + + exynos7 I2S has 7.1 channel TDM support for capture, secondary fifo + with only external dma and more no.of root clk sampling frequencies. + + samsung,exynos7-i2s1: I2S1 on previous samsung platforms supports + stereo channels. exynos7 i2s1 upgraded to 5.1 multichannel with + slightly modified bit offsets. + enum: + - "samsung,s3c6410-i2s" + - "samsung,s5pv210-i2s" + - "samsung,exynos5420-i2s" + - "samsung,exynos7-i2s" + - "samsung,exynos7-i2s1" + + reg: + maxItems: 1 + + dmas: + description: list of DMA controller phandle and DMA request line ordered pairs. + + dma-names: + description: | + identifier string for each DMA request line in the dmas property. + These strings correspond 1:1 with the ordered pairs in dmas. + + clocks: + minItems: 1 + maxItems: 3 + + clock-names: + oneOf: + - items: + - const: iis + - items: + - const: iis + - const: i2s_opclk0 + - items: + - const: iis + - const: i2s_opclk0 + - const: i2s_opclk1 + description: | + "iis" is the i2s bus clock. + For i2s1 and i2s2 - "iis", "i2s_opclk0" + For i2s0 - "iis", "i2s_opclk0", "i2s_opclk1" + + "#clock-cells": + const: 1 + + samsung,idma-addr: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Internal DMA register base address of the audio + sub system(used in secondary sound source). + + pinctrl-0: + description: Should specify pin control groups used for this controller. + + pinctrl-names: + const: default + + "#sound-dai-cells": + const: 1 + +required: + - compatible + - reg + - dmas + - dma-names + - clocks + - clock-names + +examples: + - | + i2s0: i2s@3830000 { + compatible = "samsung,s5pv210-i2s"; + reg = <0x03830000 0x100>; + dmas = <&pdma0 10 + &pdma0 9 + &pdma0 8>; + dma-names = "tx", "rx", "tx-sec"; + clocks = <&clock_audss 0>, // EXYNOS_I2S_BUS + <&clock_audss 0>, // EXYNOS_I2S_BUS + <&clock_audss 0>; // EXYNOS_SCLK_I2S + clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; + #clock-cells = <1>; + samsung,idma-addr = <0x03000000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s0_bus>; + #sound-dai-cells = <1>; + }; +
On 9/17/19 14:04, Maciej Falkowski wrote:
Convert Samsung I2S controller to newer dt-schema format.
Signed-off-by: Maciej Falkowski m.falkowski@samsung.com Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com
--- a/Documentation/devicetree/bindings/sound/samsung-i2s.txt +++ /dev/null @@ -1,84 +0,0 @@ -* Samsung I2S controller
-- clocks: Handle to iis clock and RCLK source clk. -- clock-names:
- i2s0 uses some base clocks from CMU and some are from audio subsystem internal
- clock controller. The clock names for i2s0 should be "iis", "i2s_opclk0" and
- "i2s_opclk1" as shown in the example below.
- i2s1 and i2s2 uses clocks from CMU. The clock names for i2s1 and i2s2 should
- be "iis" and "i2s_opclk0".
- "iis" is the i2s bus clock and i2s_opclk0, i2s_opclk1 are sources of the root
- clk. i2s0 has internal mux to select the source of root clk and i2s1 and i2s2
- doesn't have any such mux.
-There are following clocks available at the I2S device nodes:
- CLK_I2S_CDCLK - the CDCLK (CODECLKO) gate clock,
- CLK_I2S_RCLK_PSR - the RCLK prescaler divider clock (corresponding to the
IISPSR register),- CLK_I2S_RCLK_SRC - the RCLKSRC mux clock (corresponding to RCLKSRC bit in
IISMOD register).-Refer to the SoC datasheet for availability of the above clocks. -The CLK_I2S_RCLK_PSR and CLK_I2S_RCLK_SRC clocks are usually only available -in the IIS Multi Audio Interface.
-Note: Old DTs may not have the #clock-cells property and then not use the I2S -node as a clock supplier.
-Example:
-i2s0: i2s@3830000 {
- clocks = <&clock_audss EXYNOS_I2S_BUS>,
<&clock_audss EXYNOS_I2S_BUS>,<&clock_audss EXYNOS_SCLK_I2S>;
-}; diff --git a/Documentation/devicetree/bindings/sound/samsung-i2s.yaml b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml new file mode 100644 index 000000000000..59dc76035cb4 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml @@ -0,0 +1,119 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +---
+properties:
- clocks:
- minItems: 1
- maxItems: 3
- clock-names:
- oneOf:
- items:- const: iis- items:- const: iis- const: i2s_opclk0- items:- const: iis- const: i2s_opclk0- const: i2s_opclk1- description: |
"iis" is the i2s bus clock.For i2s1 and i2s2 - "iis", "i2s_opclk0"For i2s0 - "iis", "i2s_opclk0", "i2s_opclk1"
My impression is that there is a significant information loss in conversion of: clocks, clock-names properties. Can't we describe the meaning of CLK_I2S_CDCLK, CLK_I2S_RCLK_PSR, CLK_I2S_RCLK_SRC supplier clocks similarly as it was in txt version?
+examples:
- |
- i2s0: i2s@3830000 {
compatible = "samsung,s5pv210-i2s";reg = <0x03830000 0x100>;dmas = <&pdma0 10&pdma0 9&pdma0 8>;dma-names = "tx", "rx", "tx-sec";clocks = <&clock_audss 0>, // EXYNOS_I2S_BUS<&clock_audss 0>, // EXYNOS_I2S_BUS<&clock_audss 0>; // EXYNOS_SCLK_I2S
It should not be <&clock_audss 0> for each clock, each clock has different index as indicated by the commented out macro definitions.
clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
On Tue, Sep 17, 2019 at 7:05 AM Maciej Falkowski m.falkowski@samsung.com wrote:
Convert Samsung I2S controller to newer dt-schema format.
Signed-off-by: Maciej Falkowski m.falkowski@samsung.com Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com
v2:
- Added missing Signed-off-by certificate
.../devicetree/bindings/sound/samsung-i2s.txt | 84 ------------- .../bindings/sound/samsung-i2s.yaml | 119 ++++++++++++++++++ 2 files changed, 119 insertions(+), 84 deletions(-) delete mode 100644 Documentation/devicetree/bindings/sound/samsung-i2s.txt create mode 100644 Documentation/devicetree/bindings/sound/samsung-i2s.yaml
diff --git a/Documentation/devicetree/bindings/sound/samsung-i2s.yaml b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml new file mode 100644 index 000000000000..59dc76035cb4 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml @@ -0,0 +1,119 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/samsung-i2s.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml#
+title: Samsung SoC I2S controller
+maintainers:
- Krzysztof Kozlowski krzk@kernel.org
- Sangbeom Kim sbkim73@samsung.com
- Sylwester Nawrocki s.nawrocki@samsung.com
+properties:
- compatible:
- description: |
samsung,s3c6410-i2s: for 8/16/24bit stereo I2S.samsung,s5pv210-i2s: for 8/16/24bit multichannel(5.1) I2S withsecondary fifo, s/w reset control and internal mux for root clk src.samsung,exynos5420-i2s: for 8/16/24bit multichannel(5.1) I2S forplayback, stereo channel capture, secondary fifo using internalor external dma, s/w reset control, internal mux for root clk srcand 7.1 channel TDM support for playback. TDM (Time division multiplexing)is to allow transfer of multiple channel audio data on single data line.samsung,exynos7-i2s: with all the available features of exynos5 i2s.exynos7 I2S has 7.1 channel TDM support for capture, secondary fifowith only external dma and more no.of root clk sampling frequencies.samsung,exynos7-i2s1: I2S1 on previous samsung platforms supportsstereo channels. exynos7 i2s1 upgraded to 5.1 multichannel withslightly modified bit offsets.- enum:
- "samsung,s3c6410-i2s"- "samsung,s5pv210-i2s"- "samsung,exynos5420-i2s"- "samsung,exynos7-i2s"- "samsung,exynos7-i2s1"
No need for quotes here.
- reg:
- maxItems: 1
- dmas:
- description: list of DMA controller phandle and DMA request line ordered pairs.
How many?
- dma-names:
- description: |
identifier string for each DMA request line in the dmas property.These strings correspond 1:1 with the ordered pairs in dmas.- clocks:
- minItems: 1
- maxItems: 3
- clock-names:
- oneOf:
- items:- const: iis- items:- const: iis- const: i2s_opclk0- items:- const: iis- const: i2s_opclk0- const: i2s_opclk1- description: |
"iis" is the i2s bus clock.For i2s1 and i2s2 - "iis", "i2s_opclk0"For i2s0 - "iis", "i2s_opclk0", "i2s_opclk1"- "#clock-cells":
- const: 1
- samsung,idma-addr:
- $ref: /schemas/types.yaml#/definitions/uint32
- description: |
Internal DMA register base address of the audiosub system(used in secondary sound source).- pinctrl-0:
- description: Should specify pin control groups used for this controller.
- pinctrl-names:
- const: default
- "#sound-dai-cells":
- const: 1
+required:
- compatible
- reg
- dmas
- dma-names
- clocks
- clock-names
+examples:
- |
- i2s0: i2s@3830000 {
compatible = "samsung,s5pv210-i2s";reg = <0x03830000 0x100>;dmas = <&pdma0 10&pdma0 9&pdma0 8>;dma-names = "tx", "rx", "tx-sec";clocks = <&clock_audss 0>, // EXYNOS_I2S_BUS<&clock_audss 0>, // EXYNOS_I2S_BUS<&clock_audss 0>; // EXYNOS_SCLK_I2Sclock-names = "iis", "i2s_opclk0", "i2s_opclk1";#clock-cells = <1>;samsung,idma-addr = <0x03000000>;pinctrl-names = "default";pinctrl-0 = <&i2s0_bus>;#sound-dai-cells = <1>;- };
-- 2.17.1
On 9/17/19 3:05 PM, Rob Herring wrote:
On Tue, Sep 17, 2019 at 7:05 AM Maciej Falkowski m.falkowski@samsung.com wrote:
Convert Samsung I2S controller to newer dt-schema format.
Signed-off-by: Maciej Falkowski m.falkowski@samsung.com Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com
v2:
- Added missing Signed-off-by certificate
.../devicetree/bindings/sound/samsung-i2s.txt | 84 ------------- .../bindings/sound/samsung-i2s.yaml | 119 ++++++++++++++++++ 2 files changed, 119 insertions(+), 84 deletions(-) delete mode 100644 Documentation/devicetree/bindings/sound/samsung-i2s.txt create mode 100644 Documentation/devicetree/bindings/sound/samsung-i2s.yaml diff --git a/Documentation/devicetree/bindings/sound/samsung-i2s.yaml b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml new file mode 100644 index 000000000000..59dc76035cb4 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml @@ -0,0 +1,119 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/samsung-i2s.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml#
+title: Samsung SoC I2S controller
+maintainers:
- Krzysztof Kozlowski krzk@kernel.org
- Sangbeom Kim sbkim73@samsung.com
- Sylwester Nawrocki s.nawrocki@samsung.com
+properties:
- compatible:
- description: |
samsung,s3c6410-i2s: for 8/16/24bit stereo I2S.samsung,s5pv210-i2s: for 8/16/24bit multichannel(5.1) I2S withsecondary fifo, s/w reset control and internal mux for root clk src.samsung,exynos5420-i2s: for 8/16/24bit multichannel(5.1) I2S forplayback, stereo channel capture, secondary fifo using internalor external dma, s/w reset control, internal mux for root clk srcand 7.1 channel TDM support for playback. TDM (Time division multiplexing)is to allow transfer of multiple channel audio data on single data line.samsung,exynos7-i2s: with all the available features of exynos5 i2s.exynos7 I2S has 7.1 channel TDM support for capture, secondary fifowith only external dma and more no.of root clk sampling frequencies.samsung,exynos7-i2s1: I2S1 on previous samsung platforms supportsstereo channels. exynos7 i2s1 upgraded to 5.1 multichannel withslightly modified bit offsets.- enum:
- "samsung,s3c6410-i2s"- "samsung,s5pv210-i2s"- "samsung,exynos5420-i2s"- "samsung,exynos7-i2s"- "samsung,exynos7-i2s1"No need for quotes here.
- reg:
- maxItems: 1
- dmas:
- description: list of DMA controller phandle and DMA request line ordered pairs.
How many?
Hi Rob,
I have one problem with determining size of dmas.
It seems that there are only two options for dmas: tx, rx or tx, rx, tx-sec.
It looks like minItems should be two and maxItems should be three.
However, some of bindings have different definition of dmas.
When there is:
dmas = <&pdma0 10 Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â &pdma0 9 Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â &pdma0 8>;
the number of Items for dmas is one,
when there is:
dmas = <&pdma0 10>, Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â <&pdma0 9>, Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â Â <&pdma0 8>;
the number of Items is three.
Both of these are equal from perspective of dtc,
however from schema point of view, they have different size.
What is a proper solution to this kind of problem?
Best regards,
Maciej Falkowski
- dma-names:
- description: |
identifier string for each DMA request line in the dmas property.These strings correspond 1:1 with the ordered pairs in dmas.- clocks:
- minItems: 1
- maxItems: 3
- clock-names:
- oneOf:
- items:- const: iis- items:- const: iis- const: i2s_opclk0- items:- const: iis- const: i2s_opclk0- const: i2s_opclk1- description: |
"iis" is the i2s bus clock.For i2s1 and i2s2 - "iis", "i2s_opclk0"For i2s0 - "iis", "i2s_opclk0", "i2s_opclk1"- "#clock-cells":
- const: 1
- samsung,idma-addr:
- $ref: /schemas/types.yaml#/definitions/uint32
- description: |
Internal DMA register base address of the audiosub system(used in secondary sound source).- pinctrl-0:
- description: Should specify pin control groups used for this controller.
- pinctrl-names:
- const: default
- "#sound-dai-cells":
- const: 1
+required:
- compatible
- reg
- dmas
- dma-names
- clocks
- clock-names
+examples:
- |
- i2s0: i2s@3830000 {
compatible = "samsung,s5pv210-i2s";reg = <0x03830000 0x100>;dmas = <&pdma0 10&pdma0 9&pdma0 8>;dma-names = "tx", "rx", "tx-sec";clocks = <&clock_audss 0>, // EXYNOS_I2S_BUS<&clock_audss 0>, // EXYNOS_I2S_BUS<&clock_audss 0>; // EXYNOS_SCLK_I2Sclock-names = "iis", "i2s_opclk0", "i2s_opclk1";#clock-cells = <1>;samsung,idma-addr = <0x03000000>;pinctrl-names = "default";pinctrl-0 = <&i2s0_bus>;#sound-dai-cells = <1>;- };
-- 2.17.1
On Wed, Sep 18, 2019 at 5:08 AM Maciej Falkowski m.falkowski@samsung.com wrote:
On 9/17/19 3:05 PM, Rob Herring wrote:
On Tue, Sep 17, 2019 at 7:05 AM Maciej Falkowski m.falkowski@samsung.com wrote:
Convert Samsung I2S controller to newer dt-schema format.
Signed-off-by: Maciej Falkowski m.falkowski@samsung.com Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com
v2:
- Added missing Signed-off-by certificate
.../devicetree/bindings/sound/samsung-i2s.txt | 84 ------------- .../bindings/sound/samsung-i2s.yaml | 119 ++++++++++++++++++ 2 files changed, 119 insertions(+), 84 deletions(-) delete mode 100644 Documentation/devicetree/bindings/sound/samsung-i2s.txt create mode 100644 Documentation/devicetree/bindings/sound/samsung-i2s.yaml diff --git a/Documentation/devicetree/bindings/sound/samsung-i2s.yaml b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml new file mode 100644 index 000000000000..59dc76035cb4 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml @@ -0,0 +1,119 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/samsung-i2s.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml#
+title: Samsung SoC I2S controller
+maintainers:
- Krzysztof Kozlowski krzk@kernel.org
- Sangbeom Kim sbkim73@samsung.com
- Sylwester Nawrocki s.nawrocki@samsung.com
+properties:
- compatible:
- description: |
samsung,s3c6410-i2s: for 8/16/24bit stereo I2S.samsung,s5pv210-i2s: for 8/16/24bit multichannel(5.1) I2S withsecondary fifo, s/w reset control and internal mux for root clk src.samsung,exynos5420-i2s: for 8/16/24bit multichannel(5.1) I2S forplayback, stereo channel capture, secondary fifo using internalor external dma, s/w reset control, internal mux for root clk srcand 7.1 channel TDM support for playback. TDM (Time division multiplexing)is to allow transfer of multiple channel audio data on single data line.samsung,exynos7-i2s: with all the available features of exynos5 i2s.exynos7 I2S has 7.1 channel TDM support for capture, secondary fifowith only external dma and more no.of root clk sampling frequencies.samsung,exynos7-i2s1: I2S1 on previous samsung platforms supportsstereo channels. exynos7 i2s1 upgraded to 5.1 multichannel withslightly modified bit offsets.- enum:
- "samsung,s3c6410-i2s"- "samsung,s5pv210-i2s"- "samsung,exynos5420-i2s"- "samsung,exynos7-i2s"- "samsung,exynos7-i2s1"No need for quotes here.
- reg:
- maxItems: 1
- dmas:
- description: list of DMA controller phandle and DMA request line ordered pairs.
How many?
Hi Rob,
I have one problem with determining size of dmas.
It seems that there are only two options for dmas: tx, rx or tx, rx, tx-sec.
It looks like minItems should be two and maxItems should be three.
However, some of bindings have different definition of dmas.
When there is:
dmas = <&pdma0 10 &pdma0 9 &pdma0 8>;the number of Items for dmas is one,
when there is:
dmas = <&pdma0 10>, <&pdma0 9>, <&pdma0 8>;the number of Items is three.
Both of these are equal from perspective of dtc,
however from schema point of view, they have different size.
What is a proper solution to this kind of problem?
The solution is writing things in the latter form. I have a script to convert a bunch of these. I need to coordinate doing that at the end of a merge window.
Rob
From: Maciej Falkowski m.falkowski@samsung.com
Convert Samsung I2S controller to newer dt-schema format.
Signed-off-by: Maciej Falkowski m.falkowski@samsung.com Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com --- v3: - Removed quotation marks from strings in compatible property - Added min/max items to dmas property - Removed unneeded description from dma-names property - Added specific dma-names - Added clock description - Added include directive to examples to use clock macros directly --- .../devicetree/bindings/sound/samsung-i2s.txt | 84 ----------- .../bindings/sound/samsung-i2s.yaml | 135 ++++++++++++++++++ 2 files changed, 135 insertions(+), 84 deletions(-) delete mode 100644 Documentation/devicetree/bindings/sound/samsung-i2s.txt create mode 100644 Documentation/devicetree/bindings/sound/samsung-i2s.yaml
diff --git a/Documentation/devicetree/bindings/sound/samsung-i2s.txt b/Documentation/devicetree/bindings/sound/samsung-i2s.txt deleted file mode 100644 index a88cb00fa096..000000000000 --- a/Documentation/devicetree/bindings/sound/samsung-i2s.txt +++ /dev/null @@ -1,84 +0,0 @@ -* Samsung I2S controller - -Required SoC Specific Properties: - -- compatible : should be one of the following. - - samsung,s3c6410-i2s: for 8/16/24bit stereo I2S. - - samsung,s5pv210-i2s: for 8/16/24bit multichannel(5.1) I2S with - secondary fifo, s/w reset control and internal mux for root clk src. - - samsung,exynos5420-i2s: for 8/16/24bit multichannel(5.1) I2S for - playback, stereo channel capture, secondary fifo using internal - or external dma, s/w reset control, internal mux for root clk src - and 7.1 channel TDM support for playback. TDM (Time division multiplexing) - is to allow transfer of multiple channel audio data on single data line. - - samsung,exynos7-i2s: with all the available features of exynos5 i2s, - exynos7 I2S has 7.1 channel TDM support for capture, secondary fifo - with only external dma and more no.of root clk sampling frequencies. - - samsung,exynos7-i2s1: I2S1 on previous samsung platforms supports - stereo channels. exynos7 i2s1 upgraded to 5.1 multichannel with - slightly modified bit offsets. - -- reg: physical base address of the controller and length of memory mapped - region. -- dmas: list of DMA controller phandle and DMA request line ordered pairs. -- dma-names: identifier string for each DMA request line in the dmas property. - These strings correspond 1:1 with the ordered pairs in dmas. -- clocks: Handle to iis clock and RCLK source clk. -- clock-names: - i2s0 uses some base clocks from CMU and some are from audio subsystem internal - clock controller. The clock names for i2s0 should be "iis", "i2s_opclk0" and - "i2s_opclk1" as shown in the example below. - i2s1 and i2s2 uses clocks from CMU. The clock names for i2s1 and i2s2 should - be "iis" and "i2s_opclk0". - "iis" is the i2s bus clock and i2s_opclk0, i2s_opclk1 are sources of the root - clk. i2s0 has internal mux to select the source of root clk and i2s1 and i2s2 - doesn't have any such mux. -- #clock-cells: should be 1, this property must be present if the I2S device - is a clock provider in terms of the common clock bindings, described in - ../clock/clock-bindings.txt. -- clock-output-names (deprecated): from the common clock bindings, names of - the CDCLK I2S output clocks, suggested values are "i2s_cdclk0", "i2s_cdclk1", - "i2s_cdclk3" for the I2S0, I2S1, I2S2 devices respectively. - -There are following clocks available at the I2S device nodes: - CLK_I2S_CDCLK - the CDCLK (CODECLKO) gate clock, - CLK_I2S_RCLK_PSR - the RCLK prescaler divider clock (corresponding to the - IISPSR register), - CLK_I2S_RCLK_SRC - the RCLKSRC mux clock (corresponding to RCLKSRC bit in - IISMOD register). - -Refer to the SoC datasheet for availability of the above clocks. -The CLK_I2S_RCLK_PSR and CLK_I2S_RCLK_SRC clocks are usually only available -in the IIS Multi Audio Interface. - -Note: Old DTs may not have the #clock-cells property and then not use the I2S -node as a clock supplier. - -Optional SoC Specific Properties: - -- samsung,idma-addr: Internal DMA register base address of the audio - sub system(used in secondary sound source). -- pinctrl-0: Should specify pin control groups used for this controller. -- pinctrl-names: Should contain only one value - "default". -- #sound-dai-cells: should be 1. - - -Example: - -i2s0: i2s@3830000 { - compatible = "samsung,s5pv210-i2s"; - reg = <0x03830000 0x100>; - dmas = <&pdma0 10 - &pdma0 9 - &pdma0 8>; - dma-names = "tx", "rx", "tx-sec"; - clocks = <&clock_audss EXYNOS_I2S_BUS>, - <&clock_audss EXYNOS_I2S_BUS>, - <&clock_audss EXYNOS_SCLK_I2S>; - clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; - #clock-cells = <1>; - samsung,idma-addr = <0x03000000>; - pinctrl-names = "default"; - pinctrl-0 = <&i2s0_bus>; - #sound-dai-cells = <1>; -}; diff --git a/Documentation/devicetree/bindings/sound/samsung-i2s.yaml b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml new file mode 100644 index 000000000000..20ae5da7f798 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml @@ -0,0 +1,135 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/samsung-i2s.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung SoC I2S controller + +maintainers: + - Krzysztof Kozlowski krzk@kernel.org + - Sylwester Nawrocki s.nawrocki@samsung.com + +properties: + compatible: + description: | + samsung,s3c6410-i2s: for 8/16/24bit stereo I2S. + + samsung,s5pv210-i2s: for 8/16/24bit multichannel(5.1) I2S with + secondary fifo, s/w reset control and internal mux for root clk src. + + samsung,exynos5420-i2s: for 8/16/24bit multichannel(5.1) I2S for + playback, stereo channel capture, secondary fifo using internal + or external dma, s/w reset control, internal mux for root clk src + and 7.1 channel TDM support for playback. TDM (Time division multiplexing) + is to allow transfer of multiple channel audio data on single data line. + + samsung,exynos7-i2s: with all the available features of exynos5 i2s. + exynos7 I2S has 7.1 channel TDM support for capture, secondary fifo + with only external dma and more no.of root clk sampling frequencies. + + samsung,exynos7-i2s1: I2S1 on previous samsung platforms supports + stereo channels. exynos7 i2s1 upgraded to 5.1 multichannel with + slightly modified bit offsets. + enum: + - samsung,s3c6410-i2s + - samsung,s5pv210-i2s + - samsung,exynos5420-i2s + - samsung,exynos7-i2s + - samsung,exynos7-i2s1 + + reg: + maxItems: 1 + + dmas: + minItems: 2 + maxItems: 3 + + dma-names: + oneOf: + - items: + - const: tx + - const: rx + - items: + - const: tx + - const: rx + - const: tx-sec + + clocks: + minItems: 1 + maxItems: 3 + description: | + There are following clocks available at the I2S device nodes: + CLK_I2S_CDCLK: + the CDCLK (CODECLKO) gate clock. + + CLK_I2S_RCLK_PSR: + RCLK prescaler divider clock corresponding to the IISPSR register. + + CLK_I2S_RCLK_SRC: + RCLKSRC mux clock corresponding to RCLKSRC bit in IISMOD register. + + clock-names: + oneOf: + - items: + - const: iis + - items: + - const: iis + - const: i2s_opclk0 + - items: + - const: iis + - const: i2s_opclk0 + - const: i2s_opclk1 + description: | + "iis" is the i2s bus clock. + For i2s1 and i2s2 - "iis", "i2s_opclk0" + For i2s0 - "iis", "i2s_opclk0", "i2s_opclk1" + + "#clock-cells": + const: 1 + + samsung,idma-addr: + $ref: /schemas/types.yaml#/definitions/uint32 + description: | + Internal DMA register base address of the audio + sub system(used in secondary sound source). + + pinctrl-0: + description: Should specify pin control groups used for this controller. + + pinctrl-names: + const: default + + "#sound-dai-cells": + const: 1 + +required: + - compatible + - reg + - dmas + - dma-names + - clocks + - clock-names + +examples: + - | + #include <dt-bindings/clock/exynos-audss-clk.h> + + i2s0: i2s@3830000 { + compatible = "samsung,s5pv210-i2s"; + reg = <0x03830000 0x100>; + dmas = <&pdma0 10>, + <&pdma0 9>, + <&pdma0 8>; + dma-names = "tx", "rx", "tx-sec"; + clocks = <&clock_audss EXYNOS_I2S_BUS>, + <&clock_audss EXYNOS_I2S_BUS>, + <&clock_audss EXYNOS_SCLK_I2S>; + clock-names = "iis", "i2s_opclk0", "i2s_opclk1"; + #clock-cells = <1>; + samsung,idma-addr = <0x03000000>; + pinctrl-names = "default"; + pinctrl-0 = <&i2s0_bus>; + #sound-dai-cells = <1>; + }; +
On Fri, Sep 20, 2019 at 01:35:40PM +0200, Marek Szyprowski wrote:
From: Maciej Falkowski m.falkowski@samsung.com
Convert Samsung I2S controller to newer dt-schema format.
Signed-off-by: Maciej Falkowski m.falkowski@samsung.com Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com
v3:
- Removed quotation marks from strings in compatible property
- Added min/max items to dmas property
- Removed unneeded description from dma-names property
- Added specific dma-names
- Added clock description
- Added include directive to examples to use clock macros directly
Guys, please stop attaching new versions of entire patchset to existing discussions with in-reply-to. Entire V2 was attached to V1. V3 is attached here. On some mail clients (GMail) this does not mark entire thread unread at it looks like someone just commented about something. Some other clients, e.g. mbsynsc with GMail, do not sync entire thread so new version looks like reply-to but attached to nothing (missing context). Not mentioning that you need additional effort on your side to copy+paste the in-reply-to ID.
.../devicetree/bindings/sound/samsung-i2s.txt | 84 ----------- .../bindings/sound/samsung-i2s.yaml | 135 ++++++++++++++++++ 2 files changed, 135 insertions(+), 84 deletions(-) delete mode 100644 Documentation/devicetree/bindings/sound/samsung-i2s.txt create mode 100644 Documentation/devicetree/bindings/sound/samsung-i2s.yaml
diff --git a/Documentation/devicetree/bindings/sound/samsung-i2s.txt b/Documentation/devicetree/bindings/sound/samsung-i2s.txt deleted file mode 100644 index a88cb00fa096..000000000000 --- a/Documentation/devicetree/bindings/sound/samsung-i2s.txt +++ /dev/null @@ -1,84 +0,0 @@ -* Samsung I2S controller
-Required SoC Specific Properties:
-- compatible : should be one of the following.
- samsung,s3c6410-i2s: for 8/16/24bit stereo I2S.
- samsung,s5pv210-i2s: for 8/16/24bit multichannel(5.1) I2S with
secondary fifo, s/w reset control and internal mux for root clk src.
- samsung,exynos5420-i2s: for 8/16/24bit multichannel(5.1) I2S for
playback, stereo channel capture, secondary fifo using internalor external dma, s/w reset control, internal mux for root clk srcand 7.1 channel TDM support for playback. TDM (Time division multiplexing)is to allow transfer of multiple channel audio data on single data line.
- samsung,exynos7-i2s: with all the available features of exynos5 i2s,
exynos7 I2S has 7.1 channel TDM support for capture, secondary fifowith only external dma and more no.of root clk sampling frequencies.
- samsung,exynos7-i2s1: I2S1 on previous samsung platforms supports
stereo channels. exynos7 i2s1 upgraded to 5.1 multichannel withslightly modified bit offsets.-- reg: physical base address of the controller and length of memory mapped
- region.
-- dmas: list of DMA controller phandle and DMA request line ordered pairs. -- dma-names: identifier string for each DMA request line in the dmas property.
- These strings correspond 1:1 with the ordered pairs in dmas.
-- clocks: Handle to iis clock and RCLK source clk. -- clock-names:
- i2s0 uses some base clocks from CMU and some are from audio subsystem internal
- clock controller. The clock names for i2s0 should be "iis", "i2s_opclk0" and
- "i2s_opclk1" as shown in the example below.
- i2s1 and i2s2 uses clocks from CMU. The clock names for i2s1 and i2s2 should
- be "iis" and "i2s_opclk0".
- "iis" is the i2s bus clock and i2s_opclk0, i2s_opclk1 are sources of the root
- clk. i2s0 has internal mux to select the source of root clk and i2s1 and i2s2
- doesn't have any such mux.
I think you still miss this description of clocks and Sylwester asked for it.
-- #clock-cells: should be 1, this property must be present if the I2S device
- is a clock provider in terms of the common clock bindings, described in
- ../clock/clock-bindings.txt.
-- clock-output-names (deprecated): from the common clock bindings, names of
- the CDCLK I2S output clocks, suggested values are "i2s_cdclk0", "i2s_cdclk1",
- "i2s_cdclk3" for the I2S0, I2S1, I2S2 devices respectively.
You missed this. If you decide to remove deprecated properties, then make it in separate patach. You described this patch as pure conversion so I expect no logical/functional changes.
-There are following clocks available at the I2S device nodes:
- CLK_I2S_CDCLK - the CDCLK (CODECLKO) gate clock,
- CLK_I2S_RCLK_PSR - the RCLK prescaler divider clock (corresponding to the
IISPSR register),- CLK_I2S_RCLK_SRC - the RCLKSRC mux clock (corresponding to RCLKSRC bit in
IISMOD register).-Refer to the SoC datasheet for availability of the above clocks. -The CLK_I2S_RCLK_PSR and CLK_I2S_RCLK_SRC clocks are usually only available -in the IIS Multi Audio Interface.
-Note: Old DTs may not have the #clock-cells property and then not use the I2S -node as a clock supplier.
-Optional SoC Specific Properties:
-- samsung,idma-addr: Internal DMA register base address of the audio
- sub system(used in secondary sound source).
-- pinctrl-0: Should specify pin control groups used for this controller. -- pinctrl-names: Should contain only one value - "default". -- #sound-dai-cells: should be 1.
-Example:
-i2s0: i2s@3830000 {
- compatible = "samsung,s5pv210-i2s";
- reg = <0x03830000 0x100>;
- dmas = <&pdma0 10
&pdma0 9&pdma0 8>;- dma-names = "tx", "rx", "tx-sec";
- clocks = <&clock_audss EXYNOS_I2S_BUS>,
<&clock_audss EXYNOS_I2S_BUS>,<&clock_audss EXYNOS_SCLK_I2S>;- clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
- #clock-cells = <1>;
- samsung,idma-addr = <0x03000000>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2s0_bus>;
- #sound-dai-cells = <1>;
-}; diff --git a/Documentation/devicetree/bindings/sound/samsung-i2s.yaml b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml new file mode 100644 index 000000000000..20ae5da7f798 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml @@ -0,0 +1,135 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/samsung-i2s.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml#
+title: Samsung SoC I2S controller
+maintainers:
- Krzysztof Kozlowski krzk@kernel.org
- Sylwester Nawrocki s.nawrocki@samsung.com
+properties:
- compatible:
- description: |
samsung,s3c6410-i2s: for 8/16/24bit stereo I2S.samsung,s5pv210-i2s: for 8/16/24bit multichannel(5.1) I2S withsecondary fifo, s/w reset control and internal mux for root clk src.samsung,exynos5420-i2s: for 8/16/24bit multichannel(5.1) I2S forplayback, stereo channel capture, secondary fifo using internalor external dma, s/w reset control, internal mux for root clk srcand 7.1 channel TDM support for playback. TDM (Time division multiplexing)is to allow transfer of multiple channel audio data on single data line.samsung,exynos7-i2s: with all the available features of exynos5 i2s.exynos7 I2S has 7.1 channel TDM support for capture, secondary fifowith only external dma and more no.of root clk sampling frequencies.samsung,exynos7-i2s1: I2S1 on previous samsung platforms supportsstereo channels. exynos7 i2s1 upgraded to 5.1 multichannel withslightly modified bit offsets.- enum:
- samsung,s3c6410-i2s- samsung,s5pv210-i2s- samsung,exynos5420-i2s- samsung,exynos7-i2s- samsung,exynos7-i2s1- reg:
- maxItems: 1
- dmas:
- minItems: 2
- maxItems: 3
- dma-names:
- oneOf:
- items:- const: tx- const: rx- items:- const: tx- const: rx- const: tx-sec- clocks:
- minItems: 1
- maxItems: 3
- description: |
There are following clocks available at the I2S device nodes:CLK_I2S_CDCLK:the CDCLK (CODECLKO) gate clock.CLK_I2S_RCLK_PSR:RCLK prescaler divider clock corresponding to the IISPSR register.CLK_I2S_RCLK_SRC:RCLKSRC mux clock corresponding to RCLKSRC bit in IISMOD register.- clock-names:
- oneOf:
- items:- const: iis- items:- const: iis- const: i2s_opclk0- items:- const: iis- const: i2s_opclk0- const: i2s_opclk1- description: |
"iis" is the i2s bus clock.For i2s1 and i2s2 - "iis", "i2s_opclk0"For i2s0 - "iis", "i2s_opclk0", "i2s_opclk1"- "#clock-cells":
- const: 1
- samsung,idma-addr:
- $ref: /schemas/types.yaml#/definitions/uint32
- description: |
Internal DMA register base address of the audiosub system(used in secondary sound source).- pinctrl-0:
- description: Should specify pin control groups used for this controller.
- pinctrl-names:
- const: default
- "#sound-dai-cells":
- const: 1
+required:
- compatible
- reg
- dmas
- dma-names
- clocks
- clock-names
+examples:
- |
- #include <dt-bindings/clock/exynos-audss-clk.h>
Does it really work? When I tried, it was failing... If you look up at resulting DTS example it is wrong.
Best regards, Krzysztof
- i2s0: i2s@3830000 {
compatible = "samsung,s5pv210-i2s";reg = <0x03830000 0x100>;dmas = <&pdma0 10>,<&pdma0 9>,<&pdma0 8>;dma-names = "tx", "rx", "tx-sec";clocks = <&clock_audss EXYNOS_I2S_BUS>,<&clock_audss EXYNOS_I2S_BUS>,<&clock_audss EXYNOS_SCLK_I2S>;clock-names = "iis", "i2s_opclk0", "i2s_opclk1";#clock-cells = <1>;samsung,idma-addr = <0x03000000>;pinctrl-names = "default";pinctrl-0 = <&i2s0_bus>;#sound-dai-cells = <1>;- };
-- 2.17.1
Hi Krzysztof,
On 20.09.2019 14:26, Krzysztof Kozlowski wrote:
On Fri, Sep 20, 2019 at 01:35:40PM +0200, Marek Szyprowski wrote:
From: Maciej Falkowski m.falkowski@samsung.com
Convert Samsung I2S controller to newer dt-schema format.
Signed-off-by: Maciej Falkowski m.falkowski@samsung.com Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com
v3:
- Removed quotation marks from strings in compatible property
- Added min/max items to dmas property
- Removed unneeded description from dma-names property
- Added specific dma-names
- Added clock description
- Added include directive to examples to use clock macros directly
Guys, please stop attaching new versions of entire patchset to existing discussions with in-reply-to. Entire V2 was attached to V1. V3 is attached here. On some mail clients (GMail) this does not mark entire thread unread at it looks like someone just commented about something. Some other clients, e.g. mbsynsc with GMail, do not sync entire thread so new version looks like reply-to but attached to nothing (missing context). Not mentioning that you need additional effort on your side to copy+paste the in-reply-to ID.
.../devicetree/bindings/sound/samsung-i2s.txt | 84 ----------- .../bindings/sound/samsung-i2s.yaml | 135 ++++++++++++++++++ 2 files changed, 135 insertions(+), 84 deletions(-) delete mode 100644 Documentation/devicetree/bindings/sound/samsung-i2s.txt create mode 100644 Documentation/devicetree/bindings/sound/samsung-i2s.yaml
diff --git a/Documentation/devicetree/bindings/sound/samsung-i2s.txt b/Documentation/devicetree/bindings/sound/samsung-i2s.txt deleted file mode 100644 index a88cb00fa096..000000000000 --- a/Documentation/devicetree/bindings/sound/samsung-i2s.txt +++ /dev/null @@ -1,84 +0,0 @@ -* Samsung I2S controller
-Required SoC Specific Properties:
-- compatible : should be one of the following.
- samsung,s3c6410-i2s: for 8/16/24bit stereo I2S.
- samsung,s5pv210-i2s: for 8/16/24bit multichannel(5.1) I2S with
secondary fifo, s/w reset control and internal mux for root clk src.
- samsung,exynos5420-i2s: for 8/16/24bit multichannel(5.1) I2S for
playback, stereo channel capture, secondary fifo using internalor external dma, s/w reset control, internal mux for root clk srcand 7.1 channel TDM support for playback. TDM (Time division multiplexing)is to allow transfer of multiple channel audio data on single data line.
- samsung,exynos7-i2s: with all the available features of exynos5 i2s,
exynos7 I2S has 7.1 channel TDM support for capture, secondary fifowith only external dma and more no.of root clk sampling frequencies.
- samsung,exynos7-i2s1: I2S1 on previous samsung platforms supports
stereo channels. exynos7 i2s1 upgraded to 5.1 multichannel withslightly modified bit offsets.-- reg: physical base address of the controller and length of memory mapped
- region.
-- dmas: list of DMA controller phandle and DMA request line ordered pairs. -- dma-names: identifier string for each DMA request line in the dmas property.
- These strings correspond 1:1 with the ordered pairs in dmas.
-- clocks: Handle to iis clock and RCLK source clk. -- clock-names:
- i2s0 uses some base clocks from CMU and some are from audio subsystem internal
- clock controller. The clock names for i2s0 should be "iis", "i2s_opclk0" and
- "i2s_opclk1" as shown in the example below.
- i2s1 and i2s2 uses clocks from CMU. The clock names for i2s1 and i2s2 should
- be "iis" and "i2s_opclk0".
- "iis" is the i2s bus clock and i2s_opclk0, i2s_opclk1 are sources of the root
- clk. i2s0 has internal mux to select the source of root clk and i2s1 and i2s2
- doesn't have any such mux.
I think you still miss this description of clocks and Sylwester asked for it.
-- #clock-cells: should be 1, this property must be present if the I2S device
- is a clock provider in terms of the common clock bindings, described in
- ../clock/clock-bindings.txt.
-- clock-output-names (deprecated): from the common clock bindings, names of
- the CDCLK I2S output clocks, suggested values are "i2s_cdclk0", "i2s_cdclk1",
- "i2s_cdclk3" for the I2S0, I2S1, I2S2 devices respectively.
You missed this. If you decide to remove deprecated properties, then make it in separate patach. You described this patch as pure conversion so I expect no logical/functional changes.
-There are following clocks available at the I2S device nodes:
- CLK_I2S_CDCLK - the CDCLK (CODECLKO) gate clock,
- CLK_I2S_RCLK_PSR - the RCLK prescaler divider clock (corresponding to the
IISPSR register),- CLK_I2S_RCLK_SRC - the RCLKSRC mux clock (corresponding to RCLKSRC bit in
IISMOD register).-Refer to the SoC datasheet for availability of the above clocks. -The CLK_I2S_RCLK_PSR and CLK_I2S_RCLK_SRC clocks are usually only available -in the IIS Multi Audio Interface.
-Note: Old DTs may not have the #clock-cells property and then not use the I2S -node as a clock supplier.
-Optional SoC Specific Properties:
-- samsung,idma-addr: Internal DMA register base address of the audio
- sub system(used in secondary sound source).
-- pinctrl-0: Should specify pin control groups used for this controller. -- pinctrl-names: Should contain only one value - "default". -- #sound-dai-cells: should be 1.
-Example:
-i2s0: i2s@3830000 {
- compatible = "samsung,s5pv210-i2s";
- reg = <0x03830000 0x100>;
- dmas = <&pdma0 10
&pdma0 9&pdma0 8>;- dma-names = "tx", "rx", "tx-sec";
- clocks = <&clock_audss EXYNOS_I2S_BUS>,
<&clock_audss EXYNOS_I2S_BUS>,<&clock_audss EXYNOS_SCLK_I2S>;- clock-names = "iis", "i2s_opclk0", "i2s_opclk1";
- #clock-cells = <1>;
- samsung,idma-addr = <0x03000000>;
- pinctrl-names = "default";
- pinctrl-0 = <&i2s0_bus>;
- #sound-dai-cells = <1>;
-}; diff --git a/Documentation/devicetree/bindings/sound/samsung-i2s.yaml b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml new file mode 100644 index 000000000000..20ae5da7f798 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml @@ -0,0 +1,135 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/samsung-i2s.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml#
+title: Samsung SoC I2S controller
+maintainers:
- Krzysztof Kozlowski krzk@kernel.org
- Sylwester Nawrocki s.nawrocki@samsung.com
+properties:
- compatible:
- description: |
samsung,s3c6410-i2s: for 8/16/24bit stereo I2S.samsung,s5pv210-i2s: for 8/16/24bit multichannel(5.1) I2S withsecondary fifo, s/w reset control and internal mux for root clk src.samsung,exynos5420-i2s: for 8/16/24bit multichannel(5.1) I2S forplayback, stereo channel capture, secondary fifo using internalor external dma, s/w reset control, internal mux for root clk srcand 7.1 channel TDM support for playback. TDM (Time division multiplexing)is to allow transfer of multiple channel audio data on single data line.samsung,exynos7-i2s: with all the available features of exynos5 i2s.exynos7 I2S has 7.1 channel TDM support for capture, secondary fifowith only external dma and more no.of root clk sampling frequencies.samsung,exynos7-i2s1: I2S1 on previous samsung platforms supportsstereo channels. exynos7 i2s1 upgraded to 5.1 multichannel withslightly modified bit offsets.- enum:
- samsung,s3c6410-i2s- samsung,s5pv210-i2s- samsung,exynos5420-i2s- samsung,exynos7-i2s- samsung,exynos7-i2s1- reg:
- maxItems: 1
- dmas:
- minItems: 2
- maxItems: 3
- dma-names:
- oneOf:
- items:- const: tx- const: rx- items:- const: tx- const: rx- const: tx-sec- clocks:
- minItems: 1
- maxItems: 3
- description: |
There are following clocks available at the I2S device nodes:CLK_I2S_CDCLK:the CDCLK (CODECLKO) gate clock.CLK_I2S_RCLK_PSR:RCLK prescaler divider clock corresponding to the IISPSR register.CLK_I2S_RCLK_SRC:RCLKSRC mux clock corresponding to RCLKSRC bit in IISMOD register.- clock-names:
- oneOf:
- items:- const: iis- items:- const: iis- const: i2s_opclk0- items:- const: iis- const: i2s_opclk0- const: i2s_opclk1- description: |
"iis" is the i2s bus clock.For i2s1 and i2s2 - "iis", "i2s_opclk0"For i2s0 - "iis", "i2s_opclk0", "i2s_opclk1"- "#clock-cells":
- const: 1
- samsung,idma-addr:
- $ref: /schemas/types.yaml#/definitions/uint32
- description: |
Internal DMA register base address of the audiosub system(used in secondary sound source).- pinctrl-0:
- description: Should specify pin control groups used for this controller.
- pinctrl-names:
- const: default
- "#sound-dai-cells":
- const: 1
+required:
- compatible
- reg
- dmas
- dma-names
- clocks
- clock-names
+examples:
- |
- #include <dt-bindings/clock/exynos-audss-clk.h>
Does it really work? When I tried, it was failing... If you look up at resulting DTS example it is wrong.
In which way it was wrong? We checked and it was correctly propagated to the example dts. It also compiled fine without errors. The only minor issue was that the include was generated inside the root node, but for the clock definitions this doesn't matter, but it makes the example easier to understand.
...
Best regards
On Fri, Sep 20, 2019 at 02:33:13PM +0200, Marek Szyprowski wrote:
Hi Krzysztof,
+examples:
- |
- #include <dt-bindings/clock/exynos-audss-clk.h>
Does it really work? When I tried, it was failing... If you look up at resulting DTS example it is wrong.
In which way it was wrong? We checked and it was correctly propagated to the example dts. It also compiled fine without errors. The only minor issue was that the include was generated inside the root node, but for the clock definitions this doesn't matter, but it makes the example easier to understand.
Hmmm.... indeed this works. The output DTS is weird as include goes to example node (not even root) but it compiles. Somehow my previous tries with it were failing, I need to check why. In general I am all in for this include.
Best regards, Krzysztof
On 9/20/19 13:35, Marek Szyprowski wrote:
From: Maciej Falkowski m.falkowski@samsung.com
Convert Samsung I2S controller to newer dt-schema format.
.../devicetree/bindings/sound/samsung-i2s.txt | 84 ----------- .../bindings/sound/samsung-i2s.yaml | 135 ++++++++++++++++++ 2 files changed, 135 insertions(+), 84 deletions(-) delete mode 100644 Documentation/devicetree/bindings/sound/samsung-i2s.txt create mode 100644 Documentation/devicetree/bindings/sound/samsung-i2s.yaml
diff --git a/Documentation/devicetree/bindings/sound/samsung-i2s.yaml b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml new file mode 100644 index 000000000000..20ae5da7f798 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/samsung-i2s.yaml
- clocks:
- minItems: 1
- maxItems: 3
- description: |
There are following clocks available at the I2S device nodes:CLK_I2S_CDCLK:the CDCLK (CODECLKO) gate clock.CLK_I2S_RCLK_PSR:RCLK prescaler divider clock corresponding to the IISPSR register.CLK_I2S_RCLK_SRC:RCLKSRC mux clock corresponding to RCLKSRC bit in IISMOD register.
Sorry for the confusion, this description refers to the supplier clocks but the clocks property refers to the consumer clocks. The I2C controller is both clock consumer and provider. I'm not sure where this description should be moved to, "#clock-cells" property might be better but is likely not the right place either.
- clock-names:
- oneOf:
- items:- const: iis- items:- const: iis- const: i2s_opclk0- items:- const: iis- const: i2s_opclk0- const: i2s_opclk1- description: |
"iis" is the i2s bus clock.For i2s1 and i2s2 - "iis", "i2s_opclk0"For i2s0 - "iis", "i2s_opclk0", "i2s_opclk1"- "#clock-cells":
- const: 1
-- Thanks, Sylwester
From: Maciej Falkowski m.falkowski@samsung.com
Change representation of phandle array as then dt-schema counts number of its items properly.
Signed-off-by: Maciej Falkowski m.falkowski@samsung.com Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com --- arch/arm/boot/dts/exynos5250.dtsi | 14 +++++++------- arch/arm/boot/dts/exynos5410.dtsi | 6 +++--- arch/arm/boot/dts/exynos5420.dtsi | 14 +++++++------- 3 files changed, 17 insertions(+), 17 deletions(-)
diff --git a/arch/arm/boot/dts/exynos5250.dtsi b/arch/arm/boot/dts/exynos5250.dtsi index fc966c10cf49..44fdaad68f7c 100644 --- a/arch/arm/boot/dts/exynos5250.dtsi +++ b/arch/arm/boot/dts/exynos5250.dtsi @@ -586,9 +586,9 @@ compatible = "samsung,s5pv210-i2s"; status = "disabled"; reg = <0x03830000 0x100>; - dmas = <&pdma0 10 - &pdma0 9 - &pdma0 8>; + dmas = <&pdma0 10>, + <&pdma0 9>, + <&pdma0 8>; dma-names = "tx", "rx", "tx-sec"; clocks = <&clock_audss EXYNOS_I2S_BUS>, <&clock_audss EXYNOS_I2S_BUS>, @@ -606,8 +606,8 @@ compatible = "samsung,s3c6410-i2s"; status = "disabled"; reg = <0x12D60000 0x100>; - dmas = <&pdma1 12 - &pdma1 11>; + dmas = <&pdma1 12>, + <&pdma1 11>; dma-names = "tx", "rx"; clocks = <&clock CLK_I2S1>, <&clock CLK_DIV_I2S1>; clock-names = "iis", "i2s_opclk0"; @@ -621,8 +621,8 @@ compatible = "samsung,s3c6410-i2s"; status = "disabled"; reg = <0x12D70000 0x100>; - dmas = <&pdma0 12 - &pdma0 11>; + dmas = <&pdma0 12>, + <&pdma0 11>; dma-names = "tx", "rx"; clocks = <&clock CLK_I2S2>, <&clock CLK_DIV_I2S2>; clock-names = "iis", "i2s_opclk0"; diff --git a/arch/arm/boot/dts/exynos5410.dtsi b/arch/arm/boot/dts/exynos5410.dtsi index e6f78b1cee7c..a4b03d4c3de5 100644 --- a/arch/arm/boot/dts/exynos5410.dtsi +++ b/arch/arm/boot/dts/exynos5410.dtsi @@ -222,9 +222,9 @@ audi2s0: i2s@3830000 { compatible = "samsung,exynos5420-i2s"; reg = <0x03830000 0x100>; - dmas = <&pdma0 10 - &pdma0 9 - &pdma0 8>; + dmas = <&pdma0 10>, + <&pdma0 9>, + <&pdma0 8>; dma-names = "tx", "rx", "tx-sec"; clocks = <&clock_audss EXYNOS_I2S_BUS>, <&clock_audss EXYNOS_I2S_BUS>, diff --git a/arch/arm/boot/dts/exynos5420.dtsi b/arch/arm/boot/dts/exynos5420.dtsi index 7d51e0f4ab79..2c131ad78c09 100644 --- a/arch/arm/boot/dts/exynos5420.dtsi +++ b/arch/arm/boot/dts/exynos5420.dtsi @@ -434,9 +434,9 @@ i2s0: i2s@3830000 { compatible = "samsung,exynos5420-i2s"; reg = <0x03830000 0x100>; - dmas = <&adma 0 - &adma 2 - &adma 1>; + dmas = <&adma 0>, + <&adma 2>, + <&adma 1>; dma-names = "tx", "rx", "tx-sec"; clocks = <&clock_audss EXYNOS_I2S_BUS>, <&clock_audss EXYNOS_I2S_BUS>, @@ -455,8 +455,8 @@ i2s1: i2s@12d60000 { compatible = "samsung,exynos5420-i2s"; reg = <0x12D60000 0x100>; - dmas = <&pdma1 12 - &pdma1 11>; + dmas = <&pdma1 12>, + <&pdma1 11>; dma-names = "tx", "rx"; clocks = <&clock CLK_I2S1>, <&clock CLK_SCLK_I2S1>; clock-names = "iis", "i2s_opclk0"; @@ -471,8 +471,8 @@ i2s2: i2s@12d70000 { compatible = "samsung,exynos5420-i2s"; reg = <0x12D70000 0x100>; - dmas = <&pdma0 12 - &pdma0 11>; + dmas = <&pdma0 12>, + <&pdma0 11>; dma-names = "tx", "rx"; clocks = <&clock CLK_I2S2>, <&clock CLK_SCLK_I2S2>; clock-names = "iis", "i2s_opclk0";
From: Maciej Falkowski m.falkowski@samsung.com
Change representation of phandle array as then dt-schema counts number of its items properly.
Signed-off-by: Maciej Falkowski m.falkowski@samsung.com Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com --- arch/arm64/boot/dts/exynos/exynos5433.dtsi | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/arch/arm64/boot/dts/exynos/exynos5433.dtsi b/arch/arm64/boot/dts/exynos/exynos5433.dtsi index ba66ea906f60..ba1800c6aaf1 100644 --- a/arch/arm64/boot/dts/exynos/exynos5433.dtsi +++ b/arch/arm64/boot/dts/exynos/exynos5433.dtsi @@ -1452,7 +1452,7 @@ i2s1: i2s@14d60000 { compatible = "samsung,exynos7-i2s"; reg = <0x14d60000 0x100>; - dmas = <&pdma0 31 &pdma0 30>; + dmas = <&pdma0 31>, <&pdma0 30>; dma-names = "tx", "rx"; interrupts = <GIC_SPI 435 IRQ_TYPE_LEVEL_HIGH>; clocks = <&cmu_peric CLK_PCLK_I2S1>, @@ -1811,7 +1811,7 @@ i2s0: i2s@11440000 { compatible = "samsung,exynos7-i2s"; reg = <0x11440000 0x100>; - dmas = <&adma 0 &adma 2>; + dmas = <&adma 0>, <&adma 2>; dma-names = "tx", "rx"; interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>; #address-cells = <1>;
On Fri, Sep 20, 2019 at 02:14:31PM +0200, Marek Szyprowski wrote:
From: Maciej Falkowski m.falkowski@samsung.com
Change representation of phandle array as then dt-schema counts number of its items properly.
Thanks, applied. Please split the commit msg according to Coding Style (submitting patches, chapter 2 and 14).
Best regards, Krzysztof
On Fri, Sep 20, 2019 at 02:14:30PM +0200, Marek Szyprowski wrote:
From: Maciej Falkowski m.falkowski@samsung.com
Change representation of phandle array as then dt-schema counts number of its items properly.
Signed-off-by: Maciej Falkowski m.falkowski@samsung.com Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com
arch/arm/boot/dts/exynos5250.dtsi | 14 +++++++------- arch/arm/boot/dts/exynos5410.dtsi | 6 +++--- arch/arm/boot/dts/exynos5420.dtsi | 14 +++++++------- 3 files changed, 17 insertions(+), 17 deletions(-)
Looks good, I'll take it after merge window but why this is in-reply-to (inside thread) of completely different patchset?
Best regards, Krzysztof
On Fri, Sep 20, 2019 at 02:14:30PM +0200, Marek Szyprowski wrote:
From: Maciej Falkowski m.falkowski@samsung.com
Change representation of phandle array as then dt-schema counts number of its items properly.
Signed-off-by: Maciej Falkowski m.falkowski@samsung.com Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com
arch/arm/boot/dts/exynos5250.dtsi | 14 +++++++------- arch/arm/boot/dts/exynos5410.dtsi | 6 +++--- arch/arm/boot/dts/exynos5420.dtsi | 14 +++++++-------
Thanks, applied.
Best regards, Krzysztof
Convert Samsung SMDK audio complex to newer dt-schema format.
Signed-off-by: Maciej Falkowski m.falkowski@samsung.com Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com --- v2: - Added missing Signed-off-by certificate --- .../bindings/sound/samsung,smdk-wm8994.txt | 14 ------- .../bindings/sound/samsung,smdk-wm8994.yaml | 38 +++++++++++++++++++ 2 files changed, 38 insertions(+), 14 deletions(-) delete mode 100644 Documentation/devicetree/bindings/sound/samsung,smdk-wm8994.txt create mode 100644 Documentation/devicetree/bindings/sound/samsung,smdk-wm8994.yaml
diff --git a/Documentation/devicetree/bindings/sound/samsung,smdk-wm8994.txt b/Documentation/devicetree/bindings/sound/samsung,smdk-wm8994.txt deleted file mode 100644 index 4686646fb122..000000000000 --- a/Documentation/devicetree/bindings/sound/samsung,smdk-wm8994.txt +++ /dev/null @@ -1,14 +0,0 @@ -Samsung SMDK audio complex - -Required properties: -- compatible : "samsung,smdk-wm8994" -- samsung,i2s-controller: The phandle of the Samsung I2S0 controller -- samsung,audio-codec: The phandle of the WM8994 audio codec -Example: - -sound { - compatible = "samsung,smdk-wm8994"; - - samsung,i2s-controller = <&i2s0>; - samsung,audio-codec = <&wm8994>; -}; diff --git a/Documentation/devicetree/bindings/sound/samsung,smdk-wm8994.yaml b/Documentation/devicetree/bindings/sound/samsung,smdk-wm8994.yaml new file mode 100644 index 000000000000..a66c0dfdeb57 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/samsung,smdk-wm8994.yaml @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/samsung,smdk-wm8994.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Samsung SoC SMDK audio complex + +maintainers: + - Krzysztof Kozlowski krzk@kernel.org + - Sangbeom Kim sbkim73@samsung.com + - Sylwester Nawrocki s.nawrocki@samsung.com + +properties: + compatible: + const: "samsung,smdk-wm8994" + + samsung,i2s-controller: + $ref: /schemas/types.yaml#/definitions/phandle + description: The phandle of the Samsung I2S0 controller + + samsung,audio-codec: + $ref: /schemas/types.yaml#/definitions/phandle + description: The phandle of the WM8994 audio codec + +required: + - compatible + - samsung,i2s-controller + - samsung,audio-codec + +examples: + - | + sound { + compatible = "samsung,smdk-wm8994"; + samsung,i2s-controller = <&i2s0>; + samsung,audio-codec = <&wm8994>; + }; +
On Tue, Sep 17, 2019 at 7:06 AM Maciej Falkowski m.falkowski@samsung.com wrote:
Convert Samsung SMDK audio complex to newer dt-schema format.
Signed-off-by: Maciej Falkowski m.falkowski@samsung.com Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com
v2:
- Added missing Signed-off-by certificate
.../bindings/sound/samsung,smdk-wm8994.txt | 14 ------- .../bindings/sound/samsung,smdk-wm8994.yaml | 38 +++++++++++++++++++ 2 files changed, 38 insertions(+), 14 deletions(-) delete mode 100644 Documentation/devicetree/bindings/sound/samsung,smdk-wm8994.txt create mode 100644 Documentation/devicetree/bindings/sound/samsung,smdk-wm8994.yaml
Reviewed-by: Rob Herring robh@kernel.org
On Tue, 17 Sep 2019 at 14:06, Maciej Falkowski m.falkowski@samsung.com wrote:
Convert Samsung SMDK audio complex to newer dt-schema format.
Signed-off-by: Maciej Falkowski m.falkowski@samsung.com Signed-off-by: Marek Szyprowski m.szyprowski@samsung.com
v2:
- Added missing Signed-off-by certificate
I understood you cannot certify that you have the rights to send the patch. Adding someone's else Signed-off-by does not solve the problem of lack of such permission. Marek could certify that but you cannot certify for him. Otherwise it really makes the process bogus - anyone can add Linus' SoB and say that Linus certified the rights to include this contribution.
In my understanding of Developer's Certificate of Origin 1.1, these patches do not meet the criteria and therefore should not be included from that point of view.
One minor comment further.
.../bindings/sound/samsung,smdk-wm8994.txt | 14 ------- .../bindings/sound/samsung,smdk-wm8994.yaml | 38 +++++++++++++++++++ 2 files changed, 38 insertions(+), 14 deletions(-) delete mode 100644 Documentation/devicetree/bindings/sound/samsung,smdk-wm8994.txt create mode 100644 Documentation/devicetree/bindings/sound/samsung,smdk-wm8994.yaml
diff --git a/Documentation/devicetree/bindings/sound/samsung,smdk-wm8994.txt b/Documentation/devicetree/bindings/sound/samsung,smdk-wm8994.txt deleted file mode 100644 index 4686646fb122..000000000000 --- a/Documentation/devicetree/bindings/sound/samsung,smdk-wm8994.txt +++ /dev/null @@ -1,14 +0,0 @@ -Samsung SMDK audio complex
-Required properties: -- compatible : "samsung,smdk-wm8994" -- samsung,i2s-controller: The phandle of the Samsung I2S0 controller -- samsung,audio-codec: The phandle of the WM8994 audio codec -Example:
-sound {
compatible = "samsung,smdk-wm8994";samsung,i2s-controller = <&i2s0>;samsung,audio-codec = <&wm8994>;-}; diff --git a/Documentation/devicetree/bindings/sound/samsung,smdk-wm8994.yaml b/Documentation/devicetree/bindings/sound/samsung,smdk-wm8994.yaml new file mode 100644 index 000000000000..a66c0dfdeb57 --- /dev/null +++ b/Documentation/devicetree/bindings/sound/samsung,smdk-wm8994.yaml @@ -0,0 +1,38 @@ +# SPDX-License-Identifier: GPL-2.0 +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/sound/samsung,smdk-wm8994.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml#
+title: Samsung SoC SMDK audio complex
+maintainers:
- Krzysztof Kozlowski krzk@kernel.org
- Sangbeom Kim sbkim73@samsung.com
Unfortunately there was no mails coming from Sangbeom Kim so I think he is not active in maintaining these pieces. Let's skip this entry.
Best regards, Krzysztof
- Sylwester Nawrocki s.nawrocki@samsung.com
+properties:
- compatible:
- const: "samsung,smdk-wm8994"
- samsung,i2s-controller:
- $ref: /schemas/types.yaml#/definitions/phandle
- description: The phandle of the Samsung I2S0 controller
- samsung,audio-codec:
- $ref: /schemas/types.yaml#/definitions/phandle
- description: The phandle of the WM8994 audio codec
+required:
- compatible
- samsung,i2s-controller
- samsung,audio-codec
+examples:
- |
- sound {
compatible = "samsung,smdk-wm8994";samsung,i2s-controller = <&i2s0>;samsung,audio-codec = <&wm8994>;- };
-- 2.17.1
participants (5)
-
Krzysztof Kozlowski -
Maciej Falkowski -
Marek Szyprowski -
Rob Herring -
Sylwester Nawrocki