[alsa-devel] [PATCH 1/1] Add DSP features to CA0132 HDA codec
Please find attached a patch to update the CA0132 HDA ALSA codec. We would appreciate any feedback or comments.
Thanks very much, Ian
---
ALSA: Update Creative CA0132 HDA codec to introduce DSP features.
patch_ca0132.c: * Add DSP support to codec. * 3 capture subdevices supported: Analog Mic1/Digital Mic, Analog Mic2 and What U Hear.
Makefile: * Move CA0132 to subdirectory to collect source files together.
hda_intel.c: * Add CTHDA chip support * in azx_pcm_trigger(), change spin_lock()/spin_unlock() pair to spin_lock_irqsave()/spin_unlock_irqrestore(). Reason is that if interrupt occurs after azx_stream_start() and before spin_unlock(), it will cause deadlock as azx_interrupt() also acquires chip->reg_lock.
hda_codec.c: * in snd_hda_calc_stream_format(), change max channels to 16 to facilitate DSP download.
Developed and maintained by Creative Labs, Inc.
Signed-off-by: Ian Minett ian_minett@creativelabs.com
diff --git a/sound/pci/hda/Makefile b/sound/pci/hda/Makefile index ace157c..ed91188 100644 --- a/sound/pci/hda/Makefile +++ b/sound/pci/hda/Makefile @@ -16,7 +16,6 @@ snd-hda-codec-idt-objs := patch_sigmatel.o snd-hda-codec-si3054-objs := patch_si3054.o snd-hda-codec-cirrus-objs := patch_cirrus.o snd-hda-codec-ca0110-objs := patch_ca0110.o -snd-hda-codec-ca0132-objs := patch_ca0132.o snd-hda-codec-conexant-objs := patch_conexant.o snd-hda-codec-via-objs := patch_via.o snd-hda-codec-hdmi-objs := patch_hdmi.o hda_eld.o @@ -47,7 +46,7 @@ ifdef CONFIG_SND_HDA_CODEC_CA0110 obj-$(CONFIG_SND_HDA_INTEL) += snd-hda-codec-ca0110.o endif ifdef CONFIG_SND_HDA_CODEC_CA0132 -obj-$(CONFIG_SND_HDA_INTEL) += snd-hda-codec-ca0132.o +obj-$(CONFIG_SND_HDA_INTEL) += patch_ca0132/ endif ifdef CONFIG_SND_HDA_CODEC_CONEXANT obj-$(CONFIG_SND_HDA_INTEL) += snd-hda-codec-conexant.o diff --git a/sound/pci/hda/hda_codec.c b/sound/pci/hda/hda_codec.c index 0c0ac0e..5db9988 100644 --- a/sound/pci/hda/hda_codec.c +++ b/sound/pci/hda/hda_codec.c @@ -3525,7 +3525,7 @@ unsigned int snd_hda_calc_stream_format(unsigned int rate, return 0; }
- if (channels == 0 || channels > 8) { + if (channels == 0 || channels > 16) { snd_printdd("invalid channels %d\n", channels); return 0; } diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index c19e71a..44bd409 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c @@ -497,6 +497,7 @@ enum { AZX_DRIVER_NVIDIA, AZX_DRIVER_TERA, AZX_DRIVER_CTX, + AZX_DRIVER_CTHDA, AZX_DRIVER_GENERIC, AZX_NUM_DRIVERS, /* keep this as last entry */ }; @@ -533,6 +534,10 @@ enum { (AZX_DCAPS_NVIDIA_SNOOP | AZX_DCAPS_RIRB_DELAY | AZX_DCAPS_NO_MSI |\ AZX_DCAPS_ALIGN_BUFSIZE)
+/* quirks for Creative CTHDA */ +#define AZX_DCAPS_PRESET_CTHDA \ + (AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_ALIGN_BUFSIZE) + static char *driver_short_names[] __devinitdata = { [AZX_DRIVER_ICH] = "HDA Intel", [AZX_DRIVER_PCH] = "HDA Intel PCH", @@ -546,6 +551,7 @@ static char *driver_short_names[] __devinitdata = { [AZX_DRIVER_NVIDIA] = "HDA NVidia", [AZX_DRIVER_TERA] = "HDA Teradici", [AZX_DRIVER_CTX] = "HDA Creative", + [AZX_DRIVER_CTHDA] = "HDA Creative", [AZX_DRIVER_GENERIC] = "HD-Audio Generic", };
@@ -1283,7 +1289,7 @@ static irqreturn_t azx_interrupt(int irq, void *dev_id) /* * set up a BDL entry */ -static int setup_bdle(struct snd_pcm_substream *substream, +static int setup_bdle(struct azx *chip, struct snd_pcm_substream *substream, struct azx_dev *azx_dev, u32 **bdlp, int ofs, int size, int with_ioc) { @@ -1302,6 +1308,12 @@ static int setup_bdle(struct snd_pcm_substream *substream, bdl[1] = cpu_to_le32(upper_32_bits(addr)); /* program the size field of the BDL entry */ chunk = snd_pcm_sgbuf_get_chunk_size(substream, ofs, size); + /* one BDLE cannot cross 4K boundary on CTHDA chips */ + if (chip->driver_type == AZX_DRIVER_CTHDA) { + u32 remain = 0x1000 - (ofs & 0xfff); + if (chunk > remain) + chunk = remain; + } bdl[2] = cpu_to_le32(chunk); /* program the IOC to enable interrupt * only when the whole fragment is processed @@ -1354,7 +1366,7 @@ static int azx_setup_periods(struct azx *chip, bdl_pos_adj[chip->dev_index]); pos_adj = 0; } else { - ofs = setup_bdle(substream, azx_dev, + ofs = setup_bdle(chip, substream, azx_dev, &bdl, ofs, pos_adj, !substream->runtime->no_period_wakeup); if (ofs < 0) @@ -1364,10 +1376,10 @@ static int azx_setup_periods(struct azx *chip, pos_adj = 0; for (i = 0; i < periods; i++) { if (i == periods - 1 && pos_adj) - ofs = setup_bdle(substream, azx_dev, &bdl, ofs, + ofs = setup_bdle(chip, substream, azx_dev, &bdl, ofs, period_bytes - pos_adj, 0); else - ofs = setup_bdle(substream, azx_dev, &bdl, ofs, + ofs = setup_bdle(chip, substream, azx_dev, &bdl, ofs, period_bytes, !substream->runtime->no_period_wakeup); if (ofs < 0) @@ -1877,6 +1889,7 @@ static int azx_pcm_trigger(struct snd_pcm_substream *substream, int cmd) struct snd_pcm_substream *s; int rstart = 0, start, nsync = 0, sbits = 0; int nwait, timeout; + unsigned long flags;
switch (cmd) { case SNDRV_PCM_TRIGGER_START: @@ -1903,7 +1916,7 @@ static int azx_pcm_trigger(struct snd_pcm_substream *substream, int cmd) snd_pcm_trigger_done(s, substream); }
- spin_lock(&chip->reg_lock); + spin_lock_irqsave(&chip->reg_lock, flags); if (nsync > 1) { /* first, set SYNC bits of corresponding streams */ if (chip->driver_caps & AZX_DCAPS_OLD_SSYNC) @@ -1927,7 +1940,7 @@ static int azx_pcm_trigger(struct snd_pcm_substream *substream, int cmd) } azx_dev->running = start; } - spin_unlock(&chip->reg_lock); + spin_unlock_irqrestore(&chip->reg_lock, flags); if (start) { if (nsync == 1) return 0; @@ -2611,7 +2624,7 @@ static void __devinit check_msi(struct azx *chip) return; }
- /* NVidia chipsets seem to cause troubles with MSI */ + /* NVidia and CTHDA chipsets seem to cause troubles with MSI */ if (chip->driver_caps & AZX_DCAPS_NO_MSI) { printk(KERN_INFO "hda_intel: Disabling MSI\n"); chip->msi = 0; @@ -3116,6 +3129,11 @@ static DEFINE_PCI_DEVICE_TABLE(azx_ids) = { .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND | AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_POSFIX_LPIB }, #endif + /* CTHDA chips */ + { PCI_DEVICE(0x1102, 0x0010), + .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA }, + { PCI_DEVICE(0x1102, 0x0012), + .driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA }, /* Vortex86MX */ { PCI_DEVICE(0x17f3, 0x3010), .driver_data = AZX_DRIVER_GENERIC }, /* VMware HDAudio */ diff --git a/sound/pci/hda/patch_ca0132.c b/sound/pci/hda/patch_ca0132.c deleted file mode 100644 index 21d91d5..0000000 --- a/sound/pci/hda/patch_ca0132.c +++ /dev/null @@ -1,1103 +0,0 @@ -/* - * HD audio interface patch for Creative CA0132 chip - * - * Copyright (c) 2011, Creative Technology Ltd. - * - * Based on patch_ca0110.c - * Copyright (c) 2008 Takashi Iwai tiwai@suse.de - * - * This driver is free software; you can redistribute it and/or modify - * it under the terms of the GNU General Public License as published by - * the Free Software Foundation; either version 2 of the License, or - * (at your option) any later version. - * - * This driver is distributed in the hope that it will be useful, - * but WITHOUT ANY WARRANTY; without even the implied warranty of - * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the - * GNU General Public License for more details. - * - * You should have received a copy of the GNU General Public License - * along with this program; if not, write to the Free Software - * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA - */ - -#include <linux/init.h> -#include <linux/delay.h> -#include <linux/slab.h> -#include <linux/pci.h> -#include <linux/mutex.h> -#include <linux/module.h> -#include <sound/core.h> -#include "hda_codec.h" -#include "hda_local.h" - -#define WIDGET_CHIP_CTRL 0x15 -#define WIDGET_DSP_CTRL 0x16 - -#define WUH_MEM_CONNID 10 -#define DSP_MEM_CONNID 16 - -enum hda_cmd_vendor_io { - /* for DspIO node */ - VENDOR_DSPIO_SCP_WRITE_DATA_LOW = 0x000, - VENDOR_DSPIO_SCP_WRITE_DATA_HIGH = 0x100, - - VENDOR_DSPIO_STATUS = 0xF01, - VENDOR_DSPIO_SCP_POST_READ_DATA = 0x702, - VENDOR_DSPIO_SCP_READ_DATA = 0xF02, - VENDOR_DSPIO_DSP_INIT = 0x703, - VENDOR_DSPIO_SCP_POST_COUNT_QUERY = 0x704, - VENDOR_DSPIO_SCP_READ_COUNT = 0xF04, - - /* for ChipIO node */ - VENDOR_CHIPIO_ADDRESS_LOW = 0x000, - VENDOR_CHIPIO_ADDRESS_HIGH = 0x100, - VENDOR_CHIPIO_STREAM_FORMAT = 0x200, - VENDOR_CHIPIO_DATA_LOW = 0x300, - VENDOR_CHIPIO_DATA_HIGH = 0x400, - - VENDOR_CHIPIO_GET_PARAMETER = 0xF00, - VENDOR_CHIPIO_STATUS = 0xF01, - VENDOR_CHIPIO_HIC_POST_READ = 0x702, - VENDOR_CHIPIO_HIC_READ_DATA = 0xF03, - - VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE = 0x70A, - - VENDOR_CHIPIO_PLL_PMU_WRITE = 0x70C, - VENDOR_CHIPIO_PLL_PMU_READ = 0xF0C, - VENDOR_CHIPIO_8051_ADDRESS_LOW = 0x70D, - VENDOR_CHIPIO_8051_ADDRESS_HIGH = 0x70E, - VENDOR_CHIPIO_FLAG_SET = 0x70F, - VENDOR_CHIPIO_FLAGS_GET = 0xF0F, - VENDOR_CHIPIO_PARAMETER_SET = 0x710, - VENDOR_CHIPIO_PARAMETER_GET = 0xF10, - - VENDOR_CHIPIO_PORT_ALLOC_CONFIG_SET = 0x711, - VENDOR_CHIPIO_PORT_ALLOC_SET = 0x712, - VENDOR_CHIPIO_PORT_ALLOC_GET = 0xF12, - VENDOR_CHIPIO_PORT_FREE_SET = 0x713, - - VENDOR_CHIPIO_PARAMETER_EX_ID_GET = 0xF17, - VENDOR_CHIPIO_PARAMETER_EX_ID_SET = 0x717, - VENDOR_CHIPIO_PARAMETER_EX_VALUE_GET = 0xF18, - VENDOR_CHIPIO_PARAMETER_EX_VALUE_SET = 0x718 -}; - -/* - * Control flag IDs - */ -enum control_flag_id { - /* Connection manager stream setup is bypassed/enabled */ - CONTROL_FLAG_C_MGR = 0, - /* DSP DMA is bypassed/enabled */ - CONTROL_FLAG_DMA = 1, - /* 8051 'idle' mode is disabled/enabled */ - CONTROL_FLAG_IDLE_ENABLE = 2, - /* Tracker for the SPDIF-in path is bypassed/enabled */ - CONTROL_FLAG_TRACKER = 3, - /* DigitalOut to Spdif2Out connection is disabled/enabled */ - CONTROL_FLAG_SPDIF2OUT = 4, - /* Digital Microphone is disabled/enabled */ - CONTROL_FLAG_DMIC = 5, - /* ADC_B rate is 48 kHz/96 kHz */ - CONTROL_FLAG_ADC_B_96KHZ = 6, - /* ADC_C rate is 48 kHz/96 kHz */ - CONTROL_FLAG_ADC_C_96KHZ = 7, - /* DAC rate is 48 kHz/96 kHz (affects all DACs) */ - CONTROL_FLAG_DAC_96KHZ = 8, - /* DSP rate is 48 kHz/96 kHz */ - CONTROL_FLAG_DSP_96KHZ = 9, - /* SRC clock is 98 MHz/196 MHz (196 MHz forces rate to 96 KHz) */ - CONTROL_FLAG_SRC_CLOCK_196MHZ = 10, - /* SRC rate is 48 kHz/96 kHz (48 kHz disabled when clock is 196 MHz) */ - CONTROL_FLAG_SRC_RATE_96KHZ = 11, - /* Decode Loop (DSP->SRC->DSP) is disabled/enabled */ - CONTROL_FLAG_DECODE_LOOP = 12, - /* De-emphasis filter on DAC-1 disabled/enabled */ - CONTROL_FLAG_DAC1_DEEMPHASIS = 13, - /* De-emphasis filter on DAC-2 disabled/enabled */ - CONTROL_FLAG_DAC2_DEEMPHASIS = 14, - /* De-emphasis filter on DAC-3 disabled/enabled */ - CONTROL_FLAG_DAC3_DEEMPHASIS = 15, - /* High-pass filter on ADC_B disabled/enabled */ - CONTROL_FLAG_ADC_B_HIGH_PASS = 16, - /* High-pass filter on ADC_C disabled/enabled */ - CONTROL_FLAG_ADC_C_HIGH_PASS = 17, - /* Common mode on Port_A disabled/enabled */ - CONTROL_FLAG_PORT_A_COMMON_MODE = 18, - /* Common mode on Port_D disabled/enabled */ - CONTROL_FLAG_PORT_D_COMMON_MODE = 19, - /* Impedance for ramp generator on Port_A 16 Ohm/10K Ohm */ - CONTROL_FLAG_PORT_A_10KOHM_LOAD = 20, - /* Impedance for ramp generator on Port_D, 16 Ohm/10K Ohm */ - CONTROL_FLAG_PORT_D_10K0HM_LOAD = 21, - /* ASI rate is 48kHz/96kHz */ - CONTROL_FLAG_ASI_96KHZ = 22, - /* DAC power settings able to control attached ports no/yes */ - CONTROL_FLAG_DACS_CONTROL_PORTS = 23, - /* Clock Stop OK reporting is disabled/enabled */ - CONTROL_FLAG_CONTROL_STOP_OK_ENABLE = 24, - /* Number of control flags */ - CONTROL_FLAGS_MAX = (CONTROL_FLAG_CONTROL_STOP_OK_ENABLE+1) -}; - -/* - * Control parameter IDs - */ -enum control_parameter_id { - /* 0: force HDA, 1: allow DSP if HDA Spdif1Out stream is idle */ - CONTROL_PARAM_SPDIF1_SOURCE = 2, - - /* Stream Control */ - - /* Select stream with the given ID */ - CONTROL_PARAM_STREAM_ID = 24, - /* Source connection point for the selected stream */ - CONTROL_PARAM_STREAM_SOURCE_CONN_POINT = 25, - /* Destination connection point for the selected stream */ - CONTROL_PARAM_STREAM_DEST_CONN_POINT = 26, - /* Number of audio channels in the selected stream */ - CONTROL_PARAM_STREAMS_CHANNELS = 27, - /*Enable control for the selected stream */ - CONTROL_PARAM_STREAM_CONTROL = 28, - - /* Connection Point Control */ - - /* Select connection point with the given ID */ - CONTROL_PARAM_CONN_POINT_ID = 29, - /* Connection point sample rate */ - CONTROL_PARAM_CONN_POINT_SAMPLE_RATE = 30, - - /* Node Control */ - - /* Select HDA node with the given ID */ - CONTROL_PARAM_NODE_ID = 31 -}; - -/* - * Dsp Io Status codes - */ -enum hda_vendor_status_dspio { - /* Success */ - VENDOR_STATUS_DSPIO_OK = 0x00, - /* Busy, unable to accept new command, the host must retry */ - VENDOR_STATUS_DSPIO_BUSY = 0x01, - /* SCP command queue is full */ - VENDOR_STATUS_DSPIO_SCP_COMMAND_QUEUE_FULL = 0x02, - /* SCP response queue is empty */ - VENDOR_STATUS_DSPIO_SCP_RESPONSE_QUEUE_EMPTY = 0x03 -}; - -/* - * Chip Io Status codes - */ -enum hda_vendor_status_chipio { - /* Success */ - VENDOR_STATUS_CHIPIO_OK = 0x00, - /* Busy, unable to accept new command, the host must retry */ - VENDOR_STATUS_CHIPIO_BUSY = 0x01 -}; - -/* - * CA0132 sample rate - */ -enum ca0132_sample_rate { - SR_6_000 = 0x00, - SR_8_000 = 0x01, - SR_9_600 = 0x02, - SR_11_025 = 0x03, - SR_16_000 = 0x04, - SR_22_050 = 0x05, - SR_24_000 = 0x06, - SR_32_000 = 0x07, - SR_44_100 = 0x08, - SR_48_000 = 0x09, - SR_88_200 = 0x0A, - SR_96_000 = 0x0B, - SR_144_000 = 0x0C, - SR_176_400 = 0x0D, - SR_192_000 = 0x0E, - SR_384_000 = 0x0F, - - SR_COUNT = 0x10, - - SR_RATE_UNKNOWN = 0x1F -}; - -/* - * Scp Helper function - */ -enum get_set { - IS_SET = 0, - IS_GET = 1, -}; - -/* - * Duplicated from ca0110 codec - */ - -static void init_output(struct hda_codec *codec, hda_nid_t pin, hda_nid_t dac) -{ - if (pin) { - snd_hda_codec_write(codec, pin, 0, - AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP); - if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP) - snd_hda_codec_write(codec, pin, 0, - AC_VERB_SET_AMP_GAIN_MUTE, - AMP_OUT_UNMUTE); - } - if (dac) - snd_hda_codec_write(codec, dac, 0, - AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_ZERO); -} - -static void init_input(struct hda_codec *codec, hda_nid_t pin, hda_nid_t adc) -{ - if (pin) { - snd_hda_codec_write(codec, pin, 0, - AC_VERB_SET_PIN_WIDGET_CONTROL, - PIN_VREF80); - if (get_wcaps(codec, pin) & AC_WCAP_IN_AMP) - snd_hda_codec_write(codec, pin, 0, - AC_VERB_SET_AMP_GAIN_MUTE, - AMP_IN_UNMUTE(0)); - } - if (adc) - snd_hda_codec_write(codec, adc, 0, AC_VERB_SET_AMP_GAIN_MUTE, - AMP_IN_UNMUTE(0)); -} - -static char *dirstr[2] = { "Playback", "Capture" }; - -static int _add_switch(struct hda_codec *codec, hda_nid_t nid, const char *pfx, - int chan, int dir) -{ - char namestr[44]; - int type = dir ? HDA_INPUT : HDA_OUTPUT; - struct snd_kcontrol_new knew = - HDA_CODEC_MUTE_MONO(namestr, nid, chan, 0, type); - sprintf(namestr, "%s %s Switch", pfx, dirstr[dir]); - return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec)); -} - -static int _add_volume(struct hda_codec *codec, hda_nid_t nid, const char *pfx, - int chan, int dir) -{ - char namestr[44]; - int type = dir ? HDA_INPUT : HDA_OUTPUT; - struct snd_kcontrol_new knew = - HDA_CODEC_VOLUME_MONO(namestr, nid, chan, 0, type); - sprintf(namestr, "%s %s Volume", pfx, dirstr[dir]); - return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec)); -} - -#define add_out_switch(codec, nid, pfx) _add_switch(codec, nid, pfx, 3, 0) -#define add_out_volume(codec, nid, pfx) _add_volume(codec, nid, pfx, 3, 0) -#define add_in_switch(codec, nid, pfx) _add_switch(codec, nid, pfx, 3, 1) -#define add_in_volume(codec, nid, pfx) _add_volume(codec, nid, pfx, 3, 1) -#define add_mono_switch(codec, nid, pfx, chan) \ - _add_switch(codec, nid, pfx, chan, 0) -#define add_mono_volume(codec, nid, pfx, chan) \ - _add_volume(codec, nid, pfx, chan, 0) -#define add_in_mono_switch(codec, nid, pfx, chan) \ - _add_switch(codec, nid, pfx, chan, 1) -#define add_in_mono_volume(codec, nid, pfx, chan) \ - _add_volume(codec, nid, pfx, chan, 1) - - -/* - * CA0132 specific - */ - -struct ca0132_spec { - struct auto_pin_cfg autocfg; - struct hda_multi_out multiout; - hda_nid_t out_pins[AUTO_CFG_MAX_OUTS]; - hda_nid_t dacs[AUTO_CFG_MAX_OUTS]; - hda_nid_t hp_dac; - hda_nid_t input_pins[AUTO_PIN_LAST]; - hda_nid_t adcs[AUTO_PIN_LAST]; - hda_nid_t dig_out; - hda_nid_t dig_in; - unsigned int num_inputs; - long curr_hp_switch; - long curr_hp_volume[2]; - long curr_speaker_switch; - struct mutex chipio_mutex; - const char *input_labels[AUTO_PIN_LAST]; - struct hda_pcm pcm_rec[2]; /* PCM information */ -}; - -/* Chip access helper function */ -static int chipio_send(struct hda_codec *codec, - unsigned int reg, - unsigned int data) -{ - unsigned int res; - int retry = 50; - - /* send bits of data specified by reg */ - do { - res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, - reg, data); - if (res == VENDOR_STATUS_CHIPIO_OK) - return 0; - } while (--retry); - return -EIO; -} - -/* - * Write chip address through the vendor widget -- NOT protected by the Mutex! - */ -static int chipio_write_address(struct hda_codec *codec, - unsigned int chip_addx) -{ - int res; - - /* send low 16 bits of the address */ - res = chipio_send(codec, VENDOR_CHIPIO_ADDRESS_LOW, - chip_addx & 0xffff); - - if (res != -EIO) { - /* send high 16 bits of the address */ - res = chipio_send(codec, VENDOR_CHIPIO_ADDRESS_HIGH, - chip_addx >> 16); - } - - return res; -} - -/* - * Write data through the vendor widget -- NOT protected by the Mutex! - */ - -static int chipio_write_data(struct hda_codec *codec, unsigned int data) -{ - int res; - - /* send low 16 bits of the data */ - res = chipio_send(codec, VENDOR_CHIPIO_DATA_LOW, data & 0xffff); - - if (res != -EIO) { - /* send high 16 bits of the data */ - res = chipio_send(codec, VENDOR_CHIPIO_DATA_HIGH, - data >> 16); - } - - return res; -} - -/* - * Read data through the vendor widget -- NOT protected by the Mutex! - */ -static int chipio_read_data(struct hda_codec *codec, unsigned int *data) -{ - int res; - - /* post read */ - res = chipio_send(codec, VENDOR_CHIPIO_HIC_POST_READ, 0); - - if (res != -EIO) { - /* read status */ - res = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); - } - - if (res != -EIO) { - /* read data */ - *data = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, - VENDOR_CHIPIO_HIC_READ_DATA, - 0); - } - - return res; -} - -/* - * Write given value to the given address through the chip I/O widget. - * protected by the Mutex - */ -static int chipio_write(struct hda_codec *codec, - unsigned int chip_addx, const unsigned int data) -{ - struct ca0132_spec *spec = codec->spec; - int err; - - mutex_lock(&spec->chipio_mutex); - - /* write the address, and if successful proceed to write data */ - err = chipio_write_address(codec, chip_addx); - if (err < 0) - goto exit; - - err = chipio_write_data(codec, data); - if (err < 0) - goto exit; - -exit: - mutex_unlock(&spec->chipio_mutex); - return err; -} - -/* - * Read the given address through the chip I/O widget - * protected by the Mutex - */ -static int chipio_read(struct hda_codec *codec, - unsigned int chip_addx, unsigned int *data) -{ - struct ca0132_spec *spec = codec->spec; - int err; - - mutex_lock(&spec->chipio_mutex); - - /* write the address, and if successful proceed to write data */ - err = chipio_write_address(codec, chip_addx); - if (err < 0) - goto exit; - - err = chipio_read_data(codec, data); - if (err < 0) - goto exit; - -exit: - mutex_unlock(&spec->chipio_mutex); - return err; -} - -/* - * PCM stuffs - */ -static void ca0132_setup_stream(struct hda_codec *codec, hda_nid_t nid, - u32 stream_tag, - int channel_id, int format) -{ - unsigned int oldval, newval; - - if (!nid) - return; - - snd_printdd("ca0132_setup_stream: " - "NID=0x%x, stream=0x%x, channel=%d, format=0x%x\n", - nid, stream_tag, channel_id, format); - - /* update the format-id if changed */ - oldval = snd_hda_codec_read(codec, nid, 0, - AC_VERB_GET_STREAM_FORMAT, - 0); - if (oldval != format) { - msleep(20); - snd_hda_codec_write(codec, nid, 0, - AC_VERB_SET_STREAM_FORMAT, - format); - } - - oldval = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_CONV, 0); - newval = (stream_tag << 4) | channel_id; - if (oldval != newval) { - snd_hda_codec_write(codec, nid, 0, - AC_VERB_SET_CHANNEL_STREAMID, - newval); - } -} - -static void ca0132_cleanup_stream(struct hda_codec *codec, hda_nid_t nid) -{ - snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_STREAM_FORMAT, 0); - snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_CHANNEL_STREAMID, 0); -} - -/* - * PCM callbacks - */ -static int ca0132_playback_pcm_prepare(struct hda_pcm_stream *hinfo, - struct hda_codec *codec, - unsigned int stream_tag, - unsigned int format, - struct snd_pcm_substream *substream) -{ - struct ca0132_spec *spec = codec->spec; - - ca0132_setup_stream(codec, spec->dacs[0], stream_tag, 0, format); - - return 0; -} - -static int ca0132_playback_pcm_cleanup(struct hda_pcm_stream *hinfo, - struct hda_codec *codec, - struct snd_pcm_substream *substream) -{ - struct ca0132_spec *spec = codec->spec; - - ca0132_cleanup_stream(codec, spec->dacs[0]); - - return 0; -} - -/* - * Digital out - */ -static int ca0132_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo, - struct hda_codec *codec, - unsigned int stream_tag, - unsigned int format, - struct snd_pcm_substream *substream) -{ - struct ca0132_spec *spec = codec->spec; - - ca0132_setup_stream(codec, spec->dig_out, stream_tag, 0, format); - - return 0; -} - -static int ca0132_dig_playback_pcm_cleanup(struct hda_pcm_stream *hinfo, - struct hda_codec *codec, - struct snd_pcm_substream *substream) -{ - struct ca0132_spec *spec = codec->spec; - - ca0132_cleanup_stream(codec, spec->dig_out); - - return 0; -} - -/* - * Analog capture - */ -static int ca0132_capture_pcm_prepare(struct hda_pcm_stream *hinfo, - struct hda_codec *codec, - unsigned int stream_tag, - unsigned int format, - struct snd_pcm_substream *substream) -{ - struct ca0132_spec *spec = codec->spec; - - ca0132_setup_stream(codec, spec->adcs[substream->number], - stream_tag, 0, format); - - return 0; -} - -static int ca0132_capture_pcm_cleanup(struct hda_pcm_stream *hinfo, - struct hda_codec *codec, - struct snd_pcm_substream *substream) -{ - struct ca0132_spec *spec = codec->spec; - - ca0132_cleanup_stream(codec, spec->adcs[substream->number]); - - return 0; -} - -/* - * Digital capture - */ -static int ca0132_dig_capture_pcm_prepare(struct hda_pcm_stream *hinfo, - struct hda_codec *codec, - unsigned int stream_tag, - unsigned int format, - struct snd_pcm_substream *substream) -{ - struct ca0132_spec *spec = codec->spec; - - ca0132_setup_stream(codec, spec->dig_in, stream_tag, 0, format); - - return 0; -} - -static int ca0132_dig_capture_pcm_cleanup(struct hda_pcm_stream *hinfo, - struct hda_codec *codec, - struct snd_pcm_substream *substream) -{ - struct ca0132_spec *spec = codec->spec; - - ca0132_cleanup_stream(codec, spec->dig_in); - - return 0; -} - -/* - */ -static struct hda_pcm_stream ca0132_pcm_analog_playback = { - .substreams = 1, - .channels_min = 2, - .channels_max = 2, - .ops = { - .prepare = ca0132_playback_pcm_prepare, - .cleanup = ca0132_playback_pcm_cleanup - }, -}; - -static struct hda_pcm_stream ca0132_pcm_analog_capture = { - .substreams = 1, - .channels_min = 2, - .channels_max = 2, - .ops = { - .prepare = ca0132_capture_pcm_prepare, - .cleanup = ca0132_capture_pcm_cleanup - }, -}; - -static struct hda_pcm_stream ca0132_pcm_digital_playback = { - .substreams = 1, - .channels_min = 2, - .channels_max = 2, - .ops = { - .prepare = ca0132_dig_playback_pcm_prepare, - .cleanup = ca0132_dig_playback_pcm_cleanup - }, -}; - -static struct hda_pcm_stream ca0132_pcm_digital_capture = { - .substreams = 1, - .channels_min = 2, - .channels_max = 2, - .ops = { - .prepare = ca0132_dig_capture_pcm_prepare, - .cleanup = ca0132_dig_capture_pcm_cleanup - }, -}; - -static int ca0132_build_pcms(struct hda_codec *codec) -{ - struct ca0132_spec *spec = codec->spec; - struct hda_pcm *info = spec->pcm_rec; - - codec->pcm_info = info; - codec->num_pcms = 0; - - info->name = "CA0132 Analog"; - info->stream[SNDRV_PCM_STREAM_PLAYBACK] = ca0132_pcm_analog_playback; - info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dacs[0]; - info->stream[SNDRV_PCM_STREAM_PLAYBACK].channels_max = - spec->multiout.max_channels; - info->stream[SNDRV_PCM_STREAM_CAPTURE] = ca0132_pcm_analog_capture; - info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_inputs; - info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[0]; - codec->num_pcms++; - - if (!spec->dig_out && !spec->dig_in) - return 0; - - info++; - info->name = "CA0132 Digital"; - info->pcm_type = HDA_PCM_TYPE_SPDIF; - if (spec->dig_out) { - info->stream[SNDRV_PCM_STREAM_PLAYBACK] = - ca0132_pcm_digital_playback; - info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dig_out; - } - if (spec->dig_in) { - info->stream[SNDRV_PCM_STREAM_CAPTURE] = - ca0132_pcm_digital_capture; - info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in; - } - codec->num_pcms++; - - return 0; -} - -#define REG_CODEC_MUTE 0x18b014 -#define REG_CODEC_HP_VOL_L 0x18b070 -#define REG_CODEC_HP_VOL_R 0x18b074 - -static int ca0132_hp_switch_get(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct hda_codec *codec = snd_kcontrol_chip(kcontrol); - struct ca0132_spec *spec = codec->spec; - long *valp = ucontrol->value.integer.value; - - *valp = spec->curr_hp_switch; - return 0; -} - -static int ca0132_hp_switch_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct hda_codec *codec = snd_kcontrol_chip(kcontrol); - struct ca0132_spec *spec = codec->spec; - long *valp = ucontrol->value.integer.value; - unsigned int data; - int err; - - /* any change? */ - if (spec->curr_hp_switch == *valp) - return 0; - - snd_hda_power_up(codec); - - err = chipio_read(codec, REG_CODEC_MUTE, &data); - if (err < 0) - goto exit; - - /* *valp 0 is mute, 1 is unmute */ - data = (data & 0x7f) | (*valp ? 0 : 0x80); - err = chipio_write(codec, REG_CODEC_MUTE, data); - if (err < 0) - goto exit; - - spec->curr_hp_switch = *valp; - - exit: - snd_hda_power_down(codec); - return err < 0 ? err : 1; -} - -static int ca0132_speaker_switch_get(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct hda_codec *codec = snd_kcontrol_chip(kcontrol); - struct ca0132_spec *spec = codec->spec; - long *valp = ucontrol->value.integer.value; - - *valp = spec->curr_speaker_switch; - return 0; -} - -static int ca0132_speaker_switch_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct hda_codec *codec = snd_kcontrol_chip(kcontrol); - struct ca0132_spec *spec = codec->spec; - long *valp = ucontrol->value.integer.value; - unsigned int data; - int err; - - /* any change? */ - if (spec->curr_speaker_switch == *valp) - return 0; - - snd_hda_power_up(codec); - - err = chipio_read(codec, REG_CODEC_MUTE, &data); - if (err < 0) - goto exit; - - /* *valp 0 is mute, 1 is unmute */ - data = (data & 0xef) | (*valp ? 0 : 0x10); - err = chipio_write(codec, REG_CODEC_MUTE, data); - if (err < 0) - goto exit; - - spec->curr_speaker_switch = *valp; - - exit: - snd_hda_power_down(codec); - return err < 0 ? err : 1; -} - -static int ca0132_hp_volume_get(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct hda_codec *codec = snd_kcontrol_chip(kcontrol); - struct ca0132_spec *spec = codec->spec; - long *valp = ucontrol->value.integer.value; - - *valp++ = spec->curr_hp_volume[0]; - *valp = spec->curr_hp_volume[1]; - return 0; -} - -static int ca0132_hp_volume_put(struct snd_kcontrol *kcontrol, - struct snd_ctl_elem_value *ucontrol) -{ - struct hda_codec *codec = snd_kcontrol_chip(kcontrol); - struct ca0132_spec *spec = codec->spec; - long *valp = ucontrol->value.integer.value; - long left_vol, right_vol; - unsigned int data; - int val; - int err; - - left_vol = *valp++; - right_vol = *valp; - - /* any change? */ - if ((spec->curr_hp_volume[0] == left_vol) && - (spec->curr_hp_volume[1] == right_vol)) - return 0; - - snd_hda_power_up(codec); - - err = chipio_read(codec, REG_CODEC_HP_VOL_L, &data); - if (err < 0) - goto exit; - - val = 31 - left_vol; - data = (data & 0xe0) | val; - err = chipio_write(codec, REG_CODEC_HP_VOL_L, data); - if (err < 0) - goto exit; - - val = 31 - right_vol; - data = (data & 0xe0) | val; - err = chipio_write(codec, REG_CODEC_HP_VOL_R, data); - if (err < 0) - goto exit; - - spec->curr_hp_volume[0] = left_vol; - spec->curr_hp_volume[1] = right_vol; - - exit: - snd_hda_power_down(codec); - return err < 0 ? err : 1; -} - -static int add_hp_switch(struct hda_codec *codec, hda_nid_t nid) -{ - struct snd_kcontrol_new knew = - HDA_CODEC_MUTE_MONO("Headphone Playback Switch", - nid, 1, 0, HDA_OUTPUT); - knew.get = ca0132_hp_switch_get; - knew.put = ca0132_hp_switch_put; - return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec)); -} - -static int add_hp_volume(struct hda_codec *codec, hda_nid_t nid) -{ - struct snd_kcontrol_new knew = - HDA_CODEC_VOLUME_MONO("Headphone Playback Volume", - nid, 3, 0, HDA_OUTPUT); - knew.get = ca0132_hp_volume_get; - knew.put = ca0132_hp_volume_put; - return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec)); -} - -static int add_speaker_switch(struct hda_codec *codec, hda_nid_t nid) -{ - struct snd_kcontrol_new knew = - HDA_CODEC_MUTE_MONO("Speaker Playback Switch", - nid, 1, 0, HDA_OUTPUT); - knew.get = ca0132_speaker_switch_get; - knew.put = ca0132_speaker_switch_put; - return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec)); -} - -static void ca0132_fix_hp_caps(struct hda_codec *codec) -{ - struct ca0132_spec *spec = codec->spec; - struct auto_pin_cfg *cfg = &spec->autocfg; - unsigned int caps; - - /* set mute-capable, 1db step, 32 steps, ofs 6 */ - caps = 0x80031f06; - snd_hda_override_amp_caps(codec, cfg->hp_pins[0], HDA_OUTPUT, caps); -} - -static int ca0132_build_controls(struct hda_codec *codec) -{ - struct ca0132_spec *spec = codec->spec; - struct auto_pin_cfg *cfg = &spec->autocfg; - int i, err; - - if (spec->multiout.num_dacs) { - err = add_speaker_switch(codec, spec->out_pins[0]); - if (err < 0) - return err; - } - - if (cfg->hp_outs) { - ca0132_fix_hp_caps(codec); - err = add_hp_switch(codec, cfg->hp_pins[0]); - if (err < 0) - return err; - err = add_hp_volume(codec, cfg->hp_pins[0]); - if (err < 0) - return err; - } - - for (i = 0; i < spec->num_inputs; i++) { - const char *label = spec->input_labels[i]; - - err = add_in_switch(codec, spec->adcs[i], label); - if (err < 0) - return err; - err = add_in_volume(codec, spec->adcs[i], label); - if (err < 0) - return err; - if (cfg->inputs[i].type == AUTO_PIN_MIC) { - /* add Mic-Boost */ - err = add_in_mono_volume(codec, spec->input_pins[i], - "Mic Boost", 1); - if (err < 0) - return err; - } - } - - if (spec->dig_out) { - err = snd_hda_create_spdif_out_ctls(codec, spec->dig_out, - spec->dig_out); - if (err < 0) - return err; - err = add_out_volume(codec, spec->dig_out, "IEC958"); - if (err < 0) - return err; - } - - if (spec->dig_in) { - err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in); - if (err < 0) - return err; - err = add_in_volume(codec, spec->dig_in, "IEC958"); - if (err < 0) - return err; - } - return 0; -} - - -static void ca0132_set_ct_ext(struct hda_codec *codec, int enable) -{ - /* Set Creative extension */ - snd_printdd("SET CREATIVE EXTENSION\n"); - snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, - VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE, - enable); - msleep(20); -} - - -static void ca0132_config(struct hda_codec *codec) -{ - struct ca0132_spec *spec = codec->spec; - struct auto_pin_cfg *cfg = &spec->autocfg; - - /* line-outs */ - cfg->line_outs = 1; - cfg->line_out_pins[0] = 0x0b; /* front */ - cfg->line_out_type = AUTO_PIN_LINE_OUT; - - spec->dacs[0] = 0x02; - spec->out_pins[0] = 0x0b; - spec->multiout.dac_nids = spec->dacs; - spec->multiout.num_dacs = 1; - spec->multiout.max_channels = 2; - - /* headphone */ - cfg->hp_outs = 1; - cfg->hp_pins[0] = 0x0f; - - spec->hp_dac = 0; - spec->multiout.hp_nid = 0; - - /* inputs */ - cfg->num_inputs = 2; /* Mic-in and line-in */ - cfg->inputs[0].pin = 0x12; - cfg->inputs[0].type = AUTO_PIN_MIC; - cfg->inputs[1].pin = 0x11; - cfg->inputs[1].type = AUTO_PIN_LINE_IN; - - /* Mic-in */ - spec->input_pins[0] = 0x12; - spec->input_labels[0] = "Mic-In"; - spec->adcs[0] = 0x07; - - /* Line-In */ - spec->input_pins[1] = 0x11; - spec->input_labels[1] = "Line-In"; - spec->adcs[1] = 0x08; - spec->num_inputs = 2; -} - -static void ca0132_init_chip(struct hda_codec *codec) -{ - struct ca0132_spec *spec = codec->spec; - - mutex_init(&spec->chipio_mutex); -} - -static void ca0132_exit_chip(struct hda_codec *codec) -{ - /* put any chip cleanup stuffs here. */ -} - -static int ca0132_init(struct hda_codec *codec) -{ - struct ca0132_spec *spec = codec->spec; - struct auto_pin_cfg *cfg = &spec->autocfg; - int i; - - for (i = 0; i < spec->multiout.num_dacs; i++) { - init_output(codec, spec->out_pins[i], - spec->multiout.dac_nids[i]); - } - init_output(codec, cfg->hp_pins[0], spec->hp_dac); - init_output(codec, cfg->dig_out_pins[0], spec->dig_out); - - for (i = 0; i < spec->num_inputs; i++) - init_input(codec, spec->input_pins[i], spec->adcs[i]); - - init_input(codec, cfg->dig_in_pin, spec->dig_in); - - ca0132_set_ct_ext(codec, 1); - - return 0; -} - - -static void ca0132_free(struct hda_codec *codec) -{ - ca0132_set_ct_ext(codec, 0); - ca0132_exit_chip(codec); - kfree(codec->spec); -} - -static struct hda_codec_ops ca0132_patch_ops = { - .build_controls = ca0132_build_controls, - .build_pcms = ca0132_build_pcms, - .init = ca0132_init, - .free = ca0132_free, -}; - - - -static int patch_ca0132(struct hda_codec *codec) -{ - struct ca0132_spec *spec; - - snd_printdd("patch_ca0132\n"); - - spec = kzalloc(sizeof(*spec), GFP_KERNEL); - if (!spec) - return -ENOMEM; - codec->spec = spec; - - ca0132_init_chip(codec); - - ca0132_config(codec); - - codec->patch_ops = ca0132_patch_ops; - - return 0; -} - -/* - * patch entries - */ -static struct hda_codec_preset snd_hda_preset_ca0132[] = { - { .id = 0x11020011, .name = "CA0132", .patch = patch_ca0132 }, - {} /* terminator */ -}; - -MODULE_ALIAS("snd-hda-codec-id:11020011"); - -MODULE_LICENSE("GPL"); -MODULE_DESCRIPTION("Creative CA0132, CA0132 HD-audio codec"); - -static struct hda_codec_preset_list ca0132_list = { - .preset = snd_hda_preset_ca0132, - .owner = THIS_MODULE, -}; - -static int __init patch_ca0132_init(void) -{ - return snd_hda_add_codec_preset(&ca0132_list); -} - -static void __exit patch_ca0132_exit(void) -{ - snd_hda_delete_codec_preset(&ca0132_list); -} - -module_init(patch_ca0132_init) -module_exit(patch_ca0132_exit) diff --git a/sound/pci/hda/patch_ca0132/Makefile b/sound/pci/hda/patch_ca0132/Makefile new file mode 100644 index 0000000..8f6f167 --- /dev/null +++ b/sound/pci/hda/patch_ca0132/Makefile @@ -0,0 +1,5 @@ +snd-hda-codec-ca0132-objs := patch_ca0132.o + +ifdef CONFIG_SND_HDA_CODEC_CA0132 +obj-$(CONFIG_SND_HDA_INTEL) += snd-hda-codec-ca0132.o +endif diff --git a/sound/pci/hda/patch_ca0132/ca0132_regs.h b/sound/pci/hda/patch_ca0132/ca0132_regs.h new file mode 100644 index 0000000..831ca9c --- /dev/null +++ b/sound/pci/hda/patch_ca0132/ca0132_regs.h @@ -0,0 +1,409 @@ +/* + * HD audio interface patch for Creative CA0132 chip. + * CA0132 registers defines. + * + * Copyright (c) 2011, Creative Technology Ltd. + * + * This driver is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This driver is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#ifndef __CA0132_REGS_H +#define __CA0312_REGS_H + +#define DSP_CHIP_OFFSET 0x100000 +#define DSP_DBGCNTL_MODULE_OFFSET 0xE30 +#define DSP_DBGCNTL_INST_OFFSET \ + (DSP_CHIP_OFFSET + DSP_DBGCNTL_MODULE_OFFSET) + +#define DSP_DBGCNTL_EXEC_LOBIT 0x0 +#define DSP_DBGCNTL_EXEC_HIBIT 0x3 +#define DSP_DBGCNTL_EXEC_MASK 0xF + +#define DSP_DBGCNTL_SS_LOBIT 0x4 +#define DSP_DBGCNTL_SS_HIBIT 0x7 +#define DSP_DBGCNTL_SS_MASK 0xF0 + +#define DSP_DBGCNTL_STATE_LOBIT 0xA +#define DSP_DBGCNTL_STATE_HIBIT 0xD +#define DSP_DBGCNTL_STATE_MASK 0x3C00 + +#define XRAM_CHIP_OFFSET 0x0 +#define XRAM_XRAM_CHANNEL_COUNT 0xE000 +#define XRAM_XRAM_MODULE_OFFSET 0x0 +#define XRAM_XRAM_CHAN_INCR 4 +#define XRAM_XRAM_INST_OFFSET(_chan) \ + (XRAM_CHIP_OFFSET + XRAM_XRAM_MODULE_OFFSET + \ + (_chan * XRAM_XRAM_CHAN_INCR)) + +#define YRAM_CHIP_OFFSET 0x40000 +#define YRAM_YRAM_CHANNEL_COUNT 0x8000 +#define YRAM_YRAM_MODULE_OFFSET 0x0 +#define YRAM_YRAM_CHAN_INCR 4 +#define YRAM_YRAM_INST_OFFSET(_chan) \ + (YRAM_CHIP_OFFSET + YRAM_YRAM_MODULE_OFFSET + \ + (_chan * YRAM_YRAM_CHAN_INCR)) + +#define UC_CHIP_OFFSET 0x80000 +#define UC_UC_CHANNEL_COUNT 0x10000 +#define UC_UC_MODULE_OFFSET 0x0 +#define UC_UC_CHAN_INCR 4 +#define UC_UC_INST_OFFSET(_chan) \ + (UC_CHIP_OFFSET + UC_UC_MODULE_OFFSET + \ + (_chan * UC_UC_CHAN_INCR)) + +#define AXRAM_CHIP_OFFSET 0x3C000 +#define AXRAM_AXRAM_CHANNEL_COUNT 0x1000 +#define AXRAM_AXRAM_MODULE_OFFSET 0x0 +#define AXRAM_AXRAM_CHAN_INCR 4 +#define AXRAM_AXRAM_INST_OFFSET(_chan) \ + (AXRAM_CHIP_OFFSET + AXRAM_AXRAM_MODULE_OFFSET + \ + (_chan * AXRAM_AXRAM_CHAN_INCR)) + +#define AYRAM_CHIP_OFFSET 0x78000 +#define AYRAM_AYRAM_CHANNEL_COUNT 0x1000 +#define AYRAM_AYRAM_MODULE_OFFSET 0x0 +#define AYRAM_AYRAM_CHAN_INCR 4 +#define AYRAM_AYRAM_INST_OFFSET(_chan) \ + (AYRAM_CHIP_OFFSET + AYRAM_AYRAM_MODULE_OFFSET + \ + (_chan * AYRAM_AYRAM_CHAN_INCR)) + +#define DSPDMAC_CHIP_OFFSET 0x110000 +#define DSPDMAC_DMA_CFG_CHANNEL_COUNT 12 +#define DSPDMAC_DMACFG_MODULE_OFFSET 0xF00 +#define DSPDMAC_DMACFG_CHAN_INCR 0x10 +#define DSPDMAC_DMACFG_INST_OFFSET(_chan) \ + (DSPDMAC_CHIP_OFFSET + DSPDMAC_DMACFG_MODULE_OFFSET + \ + (_chan * DSPDMAC_DMACFG_CHAN_INCR)) + +#define DSPDMAC_DMACFG_DBADR_LOBIT 0x0 +#define DSPDMAC_DMACFG_DBADR_HIBIT 0x10 +#define DSPDMAC_DMACFG_DBADR_MASK 0x1FFFF +#define DSPDMAC_DMACFG_LP_LOBIT 0x11 +#define DSPDMAC_DMACFG_LP_HIBIT 0x11 +#define DSPDMAC_DMACFG_LP_MASK 0x20000 + +#define DSPDMAC_DMACFG_AINCR_LOBIT 0x12 +#define DSPDMAC_DMACFG_AINCR_HIBIT 0x12 +#define DSPDMAC_DMACFG_AINCR_MASK 0x40000 + +#define DSPDMAC_DMACFG_DWR_LOBIT 0x13 +#define DSPDMAC_DMACFG_DWR_HIBIT 0x13 +#define DSPDMAC_DMACFG_DWR_MASK 0x80000 + +#define DSPDMAC_DMACFG_AJUMP_LOBIT 0x14 +#define DSPDMAC_DMACFG_AJUMP_HIBIT 0x17 +#define DSPDMAC_DMACFG_AJUMP_MASK 0xF00000 + +#define DSPDMAC_DMACFG_AMODE_LOBIT 0x18 +#define DSPDMAC_DMACFG_AMODE_HIBIT 0x19 +#define DSPDMAC_DMACFG_AMODE_MASK 0x3000000 + +#define DSPDMAC_DMACFG_LK_LOBIT 0x1A +#define DSPDMAC_DMACFG_LK_HIBIT 0x1A +#define DSPDMAC_DMACFG_LK_MASK 0x4000000 + +#define DSPDMAC_DMACFG_AICS_LOBIT 0x1B +#define DSPDMAC_DMACFG_AICS_HIBIT 0x1F +#define DSPDMAC_DMACFG_AICS_MASK 0xF8000000 + +#define DSPDMAC_DMACFG_LP_SINGLE 0 +#define DSPDMAC_DMACFG_LP_LOOPING 1 + +#define DSPDMAC_DMACFG_AINCR_XANDY 0 +#define DSPDMAC_DMACFG_AINCR_XORY 1 + +#define DSPDMAC_DMACFG_DWR_DMA_RD 0 +#define DSPDMAC_DMACFG_DWR_DMA_WR 1 + +#define DSPDMAC_DMACFG_AMODE_LINEAR 0 +#define DSPDMAC_DMACFG_AMODE_RSV1 1 +#define DSPDMAC_DMACFG_AMODE_WINTLV 2 +#define DSPDMAC_DMACFG_AMODE_GINTLV 3 + +#define DSPDMAC_DSP_ADR_OFS_CHANNEL_COUNT 12 +#define DSPDMAC_DSPADROFS_MODULE_OFFSET 0xF04 +#define DSPDMAC_DSPADROFS_CHAN_INCR 0x10 +#define DSPDMAC_DSPADROFS_INST_OFFSET(_chan) \ + (DSPDMAC_CHIP_OFFSET + DSPDMAC_DSPADROFS_MODULE_OFFSET + \ + (_chan * DSPDMAC_DSPADROFS_CHAN_INCR)) + +#define DSPDMAC_DSPADROFS_COFS_LOBIT 0x0 +#define DSPDMAC_DSPADROFS_COFS_HIBIT 0xF +#define DSPDMAC_DSPADROFS_COFS_MASK 0xFFFF + +#define DSPDMAC_DSPADROFS_BOFS_LOBIT 0x10 +#define DSPDMAC_DSPADROFS_BOFS_HIBIT 0x1F +#define DSPDMAC_DSPADROFS_BOFS_MASK 0xFFFF0000 + +#define DSPDMAC_DSP_ADR_WOFS_CHANNEL_COUNT 12 +#define DSPDMAC_DSPADRWOFS_MODULE_OFFSET 0xF04 +#define DSPDMAC_DSPADRWOFS_CHAN_INCR 0x10 + +#define DSPDMAC_DSPADRWOFS_INST_OFFSET(_chan) \ + (DSPDMAC_CHIP_OFFSET + DSPDMAC_DSPADRWOFS_MODULE_OFFSET + \ + (_chan * DSPDMAC_DSPADRWOFS_CHAN_INCR)) + +#define DSPDMAC_DSPADRWOFS_WCOFS_LOBIT 0x0 +#define DSPDMAC_DSPADRWOFS_WCOFS_HIBIT 0xA +#define DSPDMAC_DSPADRWOFS_WCOFS_MASK 0x7FF + +#define DSPDMAC_DSPADRWOFS_WCBFR_LOBIT 0xB +#define DSPDMAC_DSPADRWOFS_WCBFR_HIBIT 0xF +#define DSPDMAC_DSPADRWOFS_WCBFR_MASK 0xF800 + +#define DSPDMAC_DSPADRWOFS_WBOFS_LOBIT 0x10 +#define DSPDMAC_DSPADRWOFS_WBOFS_HIBIT 0x1A +#define DSPDMAC_DSPADRWOFS_WBOFS_MASK 0x7FF0000 + +#define DSPDMAC_DSPADRWOFS_WBBFR_LOBIT 0x1B +#define DSPDMAC_DSPADRWOFS_WBBFR_HIBIT 0x1F +#define DSPDMAC_DSPADRWOFS_WBBFR_MASK 0xF8000000 + +#define DSPDMAC_DSP_ADR_GOFS_CHANNEL_COUNT 12 +#define DSPDMAC_DSPADRGOFS_MODULE_OFFSET 0xF04 +#define DSPDMAC_DSPADRGOFS_CHAN_INCR 0x10 +#define DSPDMAC_DSPADRGOFS_INST_OFFSET(_chan) \ + (DSPDMAC_CHIP_OFFSET + DSPDMAC_DSPADRGOFS_MODULE_OFFSET + \ + (_chan * DSPDMAC_DSPADRGOFS_CHAN_INCR)) + +#define DSPDMAC_DSPADRGOFS_GCOFS_LOBIT 0x0 +#define DSPDMAC_DSPADRGOFS_GCOFS_HIBIT 0x9 +#define DSPDMAC_DSPADRGOFS_GCOFS_MASK 0x3FF + +#define DSPDMAC_DSPADRGOFS_GCS_LOBIT 0xA +#define DSPDMAC_DSPADRGOFS_GCS_HIBIT 0xC +#define DSPDMAC_DSPADRGOFS_GCS_MASK 0x1C00 + +#define DSPDMAC_DSPADRGOFS_GCBFR_LOBIT 0xD +#define DSPDMAC_DSPADRGOFS_GCBFR_HIBIT 0xF +#define DSPDMAC_DSPADRGOFS_GCBFR_MASK 0xE000 + +#define DSPDMAC_DSPADRGOFS_GBOFS_LOBIT 0x10 +#define DSPDMAC_DSPADRGOFS_GBOFS_HIBIT 0x19 +#define DSPDMAC_DSPADRGOFS_GBOFS_MASK 0x3FF0000 + +#define DSPDMAC_DSPADRGOFS_GBS_LOBIT 0x1A +#define DSPDMAC_DSPADRGOFS_GBS_HIBIT 0x1C +#define DSPDMAC_DSPADRGOFS_GBS_MASK 0x1C000000 + +#define DSPDMAC_DSPADRGOFS_GBBFR_LOBIT 0x1D +#define DSPDMAC_DSPADRGOFS_GBBFR_HIBIT 0x1F +#define DSPDMAC_DSPADRGOFS_GBBFR_MASK 0xE0000000 + +#define DSPDMAC_XFR_CNT_CHANNEL_COUNT 12 +#define DSPDMAC_XFRCNT_MODULE_OFFSET 0xF08 +#define DSPDMAC_XFRCNT_CHAN_INCR 0x10 + +#define DSPDMAC_XFRCNT_INST_OFFSET(_chan) \ + (DSPDMAC_CHIP_OFFSET + DSPDMAC_XFRCNT_MODULE_OFFSET + \ + (_chan * DSPDMAC_XFRCNT_CHAN_INCR)) + +#define DSPDMAC_XFRCNT_CCNT_LOBIT 0x0 +#define DSPDMAC_XFRCNT_CCNT_HIBIT 0xF +#define DSPDMAC_XFRCNT_CCNT_MASK 0xFFFF + +#define DSPDMAC_XFRCNT_BCNT_LOBIT 0x10 +#define DSPDMAC_XFRCNT_BCNT_HIBIT 0x1F +#define DSPDMAC_XFRCNT_BCNT_MASK 0xFFFF0000 + +#define DSPDMAC_IRQ_CNT_CHANNEL_COUNT 12 +#define DSPDMAC_IRQCNT_MODULE_OFFSET 0xF0C +#define DSPDMAC_IRQCNT_CHAN_INCR 0x10 +#define DSPDMAC_IRQCNT_INST_OFFSET(_chan) \ + (DSPDMAC_CHIP_OFFSET + DSPDMAC_IRQCNT_MODULE_OFFSET + \ + (_chan * DSPDMAC_IRQCNT_CHAN_INCR)) + +#define DSPDMAC_IRQCNT_CICNT_LOBIT 0x0 +#define DSPDMAC_IRQCNT_CICNT_HIBIT 0xF +#define DSPDMAC_IRQCNT_CICNT_MASK 0xFFFF + +#define DSPDMAC_IRQCNT_BICNT_LOBIT 0x10 +#define DSPDMAC_IRQCNT_BICNT_HIBIT 0x1F +#define DSPDMAC_IRQCNT_BICNT_MASK 0xFFFF0000 + +#define DSPDMAC_AUD_CHSEL_CHANNEL_COUNT 12 +#define DSPDMAC_AUDCHSEL_MODULE_OFFSET 0xFC0 +#define DSPDMAC_AUDCHSEL_CHAN_INCR 0x4 +#define DSPDMAC_AUDCHSEL_INST_OFFSET(_chan) \ + (DSPDMAC_CHIP_OFFSET + DSPDMAC_AUDCHSEL_MODULE_OFFSET + \ + (_chan * DSPDMAC_AUDCHSEL_CHAN_INCR)) + +#define DSPDMAC_AUDCHSEL_ACS_LOBIT 0x0 +#define DSPDMAC_AUDCHSEL_ACS_HIBIT 0x1F +#define DSPDMAC_AUDCHSEL_ACS_MASK 0xFFFFFFFF + +#define DSPDMAC_CHNLSTART_MODULE_OFFSET 0xFF0 +#define DSPDMAC_CHNLSTART_INST_OFFSET \ + (DSPDMAC_CHIP_OFFSET + DSPDMAC_CHNLSTART_MODULE_OFFSET) + +#define DSPDMAC_CHNLSTART_EN_LOBIT 0x0 +#define DSPDMAC_CHNLSTART_EN_HIBIT 0xB +#define DSPDMAC_CHNLSTART_EN_MASK 0xFFF + +#define DSPDMAC_CHNLSTART_VAI1_LOBIT 0xC +#define DSPDMAC_CHNLSTART_VAI1_HIBIT 0xF +#define DSPDMAC_CHNLSTART_VAI1_MASK 0xF000 + +#define DSPDMAC_CHNLSTART_DIS_LOBIT 0x10 +#define DSPDMAC_CHNLSTART_DIS_HIBIT 0x1B +#define DSPDMAC_CHNLSTART_DIS_MASK 0xFFF0000 + +#define DSPDMAC_CHNLSTART_VAI2_LOBIT 0x1C +#define DSPDMAC_CHNLSTART_VAI2_HIBIT 0x1F +#define DSPDMAC_CHNLSTART_VAI2_MASK 0xF0000000 + +#define DSPDMAC_CHNLSTATUS_MODULE_OFFSET 0xFF4 +#define DSPDMAC_CHNLSTATUS_INST_OFFSET \ + (DSPDMAC_CHIP_OFFSET + DSPDMAC_CHNLSTATUS_MODULE_OFFSET) + +#define DSPDMAC_CHNLSTATUS_ISC_LOBIT 0x0 +#define DSPDMAC_CHNLSTATUS_ISC_HIBIT 0xB +#define DSPDMAC_CHNLSTATUS_ISC_MASK 0xFFF + +#define DSPDMAC_CHNLSTATUS_AOO_LOBIT 0xC +#define DSPDMAC_CHNLSTATUS_AOO_HIBIT 0xC +#define DSPDMAC_CHNLSTATUS_AOO_MASK 0x1000 + +#define DSPDMAC_CHNLSTATUS_AOU_LOBIT 0xD +#define DSPDMAC_CHNLSTATUS_AOU_HIBIT 0xD +#define DSPDMAC_CHNLSTATUS_AOU_MASK 0x2000 + +#define DSPDMAC_CHNLSTATUS_AIO_LOBIT 0xE +#define DSPDMAC_CHNLSTATUS_AIO_HIBIT 0xE +#define DSPDMAC_CHNLSTATUS_AIO_MASK 0x4000 + +#define DSPDMAC_CHNLSTATUS_AIU_LOBIT 0xF +#define DSPDMAC_CHNLSTATUS_AIU_HIBIT 0xF +#define DSPDMAC_CHNLSTATUS_AIU_MASK 0x8000 + +#define DSPDMAC_CHNLSTATUS_IEN_LOBIT 0x10 +#define DSPDMAC_CHNLSTATUS_IEN_HIBIT 0x1B +#define DSPDMAC_CHNLSTATUS_IEN_MASK 0xFFF0000 + +#define DSPDMAC_CHNLSTATUS_VAI0_LOBIT 0x1C +#define DSPDMAC_CHNLSTATUS_VAI0_HIBIT 0x1F +#define DSPDMAC_CHNLSTATUS_VAI0_MASK 0xF0000000 + +#define DSPDMAC_CHNLPROP_MODULE_OFFSET 0xFF8 +#define DSPDMAC_CHNLPROP_INST_OFFSET \ + (DSPDMAC_CHIP_OFFSET + DSPDMAC_CHNLPROP_MODULE_OFFSET) + +#define DSPDMAC_CHNLPROP_DCON_LOBIT 0x0 +#define DSPDMAC_CHNLPROP_DCON_HIBIT 0xB +#define DSPDMAC_CHNLPROP_DCON_MASK 0xFFF + +#define DSPDMAC_CHNLPROP_FFS_LOBIT 0xC +#define DSPDMAC_CHNLPROP_FFS_HIBIT 0xC +#define DSPDMAC_CHNLPROP_FFS_MASK 0x1000 + +#define DSPDMAC_CHNLPROP_NAJ_LOBIT 0xD +#define DSPDMAC_CHNLPROP_NAJ_HIBIT 0xD +#define DSPDMAC_CHNLPROP_NAJ_MASK 0x2000 + +#define DSPDMAC_CHNLPROP_ENH_LOBIT 0xE +#define DSPDMAC_CHNLPROP_ENH_HIBIT 0xE +#define DSPDMAC_CHNLPROP_ENH_MASK 0x4000 + +#define DSPDMAC_CHNLPROP_MSPCE_LOBIT 0x10 +#define DSPDMAC_CHNLPROP_MSPCE_HIBIT 0x1B +#define DSPDMAC_CHNLPROP_MSPCE_MASK 0xFFF0000 + +#define DSPDMAC_CHNLPROP_AC_LOBIT 0x1C +#define DSPDMAC_CHNLPROP_AC_HIBIT 0x1F +#define DSPDMAC_CHNLPROP_AC_MASK 0xF0000000 + +#define DSPDMAC_ACTIVE_MODULE_OFFSET 0xFFC +#define DSPDMAC_ACTIVE_INST_OFFSET \ + (DSPDMAC_CHIP_OFFSET + DSPDMAC_ACTIVE_MODULE_OFFSET) + +#define DSPDMAC_ACTIVE_AAR_LOBIT 0x0 +#define DSPDMAC_ACTIVE_AAR_HIBIT 0xB +#define DSPDMAC_ACTIVE_AAR_MASK 0xFFF + +#define DSPDMAC_ACTIVE_WFR_LOBIT 0xC +#define DSPDMAC_ACTIVE_WFR_HIBIT 0x17 +#define DSPDMAC_ACTIVE_WFR_MASK 0xFFF000 + +#define DSP_AUX_MEM_BASE 0xE000 +#define INVALID_CHIP_ADDRESS (~0UL) + +#define X_SIZE (XRAM_XRAM_CHANNEL_COUNT * XRAM_XRAM_CHAN_INCR) +#define Y_SIZE (YRAM_YRAM_CHANNEL_COUNT * YRAM_YRAM_CHAN_INCR) +#define AX_SIZE (AXRAM_AXRAM_CHANNEL_COUNT * AXRAM_AXRAM_CHAN_INCR) +#define AY_SIZE (AYRAM_AYRAM_CHANNEL_COUNT * AYRAM_AYRAM_CHAN_INCR) +#define UC_SIZE (UC_UC_CHANNEL_COUNT * UC_UC_CHAN_INCR) + +#define XEXT_SIZE (X_SIZE + AX_SIZE) +#define YEXT_SIZE (Y_SIZE + AY_SIZE) + +#define U64K 0x10000UL + +#define X_END (XRAM_CHIP_OFFSET + X_SIZE) +#define X_EXT (XRAM_CHIP_OFFSET + XEXT_SIZE) +#define AX_END (XRAM_CHIP_OFFSET + U64K*4) + +#define Y_END (YRAM_CHIP_OFFSET + Y_SIZE) +#define Y_EXT (YRAM_CHIP_OFFSET + YEXT_SIZE) +#define AY_END (YRAM_CHIP_OFFSET + U64K*4) + +#define UC_END (UC_CHIP_OFFSET + UC_SIZE) + +#define X_RANGE_MAIN(a, s) \ + (((a)+((s)-1)*XRAM_XRAM_CHAN_INCR < X_END)) +#define X_RANGE_AUX(a, s) \ + (((a) >= X_END) && ((a)+((s)-1)*XRAM_XRAM_CHAN_INCR < AX_END)) +#define X_RANGE_EXT(a, s) \ + (((a)+((s)-1)*XRAM_XRAM_CHAN_INCR < X_EXT)) +#define X_RANGE_ALL(a, s) \ + (((a)+((s)-1)*XRAM_XRAM_CHAN_INCR < AX_END)) + +#define Y_RANGE_MAIN(a, s) \ + (((a) >= YRAM_CHIP_OFFSET) && \ + ((a)+((s)-1)*YRAM_YRAM_CHAN_INCR < Y_END)) +#define Y_RANGE_AUX(a, s) \ + (((a) >= Y_END) && \ + ((a)+((s)-1)*YRAM_YRAM_CHAN_INCR < AY_END)) +#define Y_RANGE_EXT(a, s) \ + (((a) >= YRAM_CHIP_OFFSET) && \ + ((a)+((s)-1)*YRAM_YRAM_CHAN_INCR < Y_EXT)) +#define Y_RANGE_ALL(a, s) \ + (((a) >= YRAM_CHIP_OFFSET) && \ + ((a)+((s)-1)*YRAM_YRAM_CHAN_INCR < AY_END)) + +#define UC_RANGE(a, s) \ + (((a) >= UC_CHIP_OFFSET) && \ + ((a)+((s)-1)*UC_UC_CHAN_INCR < UC_END)) + +#define X_OFF(a) \ + (((a) - XRAM_CHIP_OFFSET) / XRAM_XRAM_CHAN_INCR) +#define AX_OFF(a) \ + (((a) % (AXRAM_AXRAM_CHANNEL_COUNT * \ + AXRAM_AXRAM_CHAN_INCR)) / AXRAM_AXRAM_CHAN_INCR) + +#define Y_OFF(a) \ + (((a) - YRAM_CHIP_OFFSET) / YRAM_YRAM_CHAN_INCR) +#define AY_OFF(a) \ + (((a) % (AYRAM_AYRAM_CHANNEL_COUNT * \ + AYRAM_AYRAM_CHAN_INCR)) / AYRAM_AYRAM_CHAN_INCR) + +#define UC_OFF(a) (((a) - UC_CHIP_OFFSET) / UC_UC_CHAN_INCR) + +#define X_EXT_MAIN_SIZE(a) (XRAM_XRAM_CHANNEL_COUNT - X_OFF(a)) +#define X_EXT_AUX_SIZE(a, s) ((s) - X_EXT_MAIN_SIZE(a)) + +#define Y_EXT_MAIN_SIZE(a) (YRAM_YRAM_CHANNEL_COUNT - Y_OFF(a)) +#define Y_EXT_AUX_SIZE(a, s) ((s) - Y_EXT_MAIN_SIZE(a)) + +#endif diff --git a/sound/pci/hda/patch_ca0132/dsp_os.h b/sound/pci/hda/patch_ca0132/dsp_os.h new file mode 100644 index 0000000..b23eb4e --- /dev/null +++ b/sound/pci/hda/patch_ca0132/dsp_os.h @@ -0,0 +1,40981 @@ +/*----------------------------------------------------------------------------- +// Generated by Coff2DspImage V0.3. (built on Thu Oct 7 14:48:09 2010) +// ---- +// Input file: DspOS.x +// Output file: dsp_os.h +// On: 2011/09/14 05:13:02 UTC +// ---- +// Copyright (c) 2011, Creative Technology Ltd. +//---------------------------------------------------------------------------*/ + + +const u32 DspImage_dsp_os[] = { +0x4c46584d, 0xffffff01, 0x8, 0x100d24, +0xc, 0x100d34, 0xd, 0x100d38, +0xe, 0x100d3c, 0xf, 0x4c46584d, +0x80020, 0xfff8, 0x1e08000, 0xdd9100, +0x64, 0x1883af, 0x100f0f, 0x1e08000, +0xddd100, 0x64a, 0x1883af, 0x100f0a, +0x1e08000, 0xde1100, 0xc30, 0x1883af, +0x100f05, 0x1e08000, 0xde5100, 0x1216, +0x1883af, 0x1e47fff, 0x1ffe000, 0x190190, +0x400310, 0x1e08000, 0x2f34f, 0x1000000, +0x1dbc0a, 0x1620000, 0x58fbb9, 0x1020001, +0x1c0002c, 0x250000, 0x230000, 0x100fff, +0xc8004c, 0x70000, 0xc80400, 0x1020001, +0x1c0002a, 0xb00000, 0x108102, 0xc80002, +0x1e08000, 0xde9200, 0x2, 0x188300, +0xc82420, 0x1020001, 0x1c02bf2, 0x1008001, +0x1c00028, 0xc80021, 0x1008001, 0x1c00028, +0x240000, 0x1020001, 0x1c00845, 0xb00000, +0x1181fd, 0x1020001, 0x1c0225f, 0xc80020, +0x1020001, 0x1c01cd5, 0x0, 0x100ff6, +0x240000, 0xc80021, 0x1020001, 0x1c01cd5, +0x0, 0x100ffc, 0x240000, 0xc80022, +0x1020001, 0x1c01cd5, 0x0, 0x100ffc, +0x240000, 0xc80023, 0x1020001, 0x1c01cd5, +0x0, 0x100ffc, 0x1e6ffff, 0x1ffc000, +0x7f, 0x11803fc, 0x70000, 0xd10000, +0x1e77fff, 0x1ffc000, 0x7f, 0x11803fc, +0x70000, 0x1f30000, 0x610c, 0x1332160, +0x193300, 0x130ff1, 0x1e77fff, 0x1ffc000, +0x60, 0x9803fc, 0x110103, 0x771008, +0x1081fa, 0xc80008, 0x70000, 0x1e08000, +0x300, 0x102, 0x184310, 0x1b47fff, +0x1fffc00, 0x31061, 0x180310, 0xd40c04, +0xc0500, 0xc80030, 0x70000, 0x1647fff, +0x1f00781, 0x70000, 0x1647fff, 0x1f00789, +0x70000, 0x1647fff, 0x1f00791, 0x70000, +0x1647fff, 0x1f00799, 0x70000, 0x1647fff, +0x1f007a1, 0x70000, 0x1647fff, 0x1f007a9, +0x70000, 0x1647fff, 0x1f007b1, 0x70000, +0x1647fff, 0x1f007b9, 0x70000, 0x1647fff, +0x1f007c1, 0x70000, 0x1647fff, 0x1f007c9, +0x70000, 0x1647fff, 0x1f007d1, 0x70000, +0x1647fff, 0x1f007d9, 0x70000, 0x1e08000, +0x300, 0x162, 0x184310, 0x1b47fff, +0x1fffc00, 0x31061, 0x180310, 0xd40c04, +0xc0500, 0xc80030, 0x70000, 0x1647fff, +0x1f00783, 0x70000, 0x1647fff, 0x1f0078b, +0x70000, 0x1647fff, 0x1f00793, 0x70000, +0x1647fff, 0x1f0079b, 0x70000, 0x1647fff, +0x1f007a3, 0x70000, 0x1647fff, 0x1f007ab, +0x70000, 0x1647fff, 0x1f007b3, 0x70000, +0x1647fff, 0x1f007bb, 0x70000, 0x1647fff, +0x1f007c3, 0x70000, 0x1647fff, 0x1f007cb, +0x70000, 0x1647fff, 0x1f007d3, 0x70000, +0x1647fff, 0x1f007db, 0x70000, 0x1b80000, +0x604c, 0x1232761, 0x1903fe, 0x1fc0c81, +0x120640c, 0x123fe61, 0x181300, 0x70000, +0x1647fff, 0x1f007fb, 0x70000, 0x1647fff, +0x1f007f9, 0x70000, 0xe81000, 0xb00022, +0x100106, 0x1e6ffff, 0x1ffc000, 0x7f, +0x15803fd, 0x70000, 0xd10000, 0x1e77fff, +0x1ffc000, 0x7f, 0x15803fd, 0x70000, +0xe81000, 0xb00022, 0x100106, 0x1e6ffff, +0x1ffc000, 0x7f, 0x19803fe, 0x70000, +0xd10000, 0x1e77fff, 0x1ffc000, 0x7f, +0x19803fe, 0x70000, 0x16201ff, 0x1dfebfd, +0x1647fff, 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0x0, +0x0, 0x0, 0x0, 0x0, +0x0, 0x0, 0x0, 0x0, +0x0, 0x0, 0x0, 0x0, +0x4c46584d, 0xefbeadde, 0x0, +}; +/*------ END OF FILE ------*/ diff --git a/sound/pci/hda/patch_ca0132/patch_ca0132.c b/sound/pci/hda/patch_ca0132/patch_ca0132.c new file mode 100644 index 0000000..c59ff6c --- /dev/null +++ b/sound/pci/hda/patch_ca0132/patch_ca0132.c @@ -0,0 +1,4489 @@ +/* + * HD audio interface patch for Creative Sound Core3D chip + * + * Copyright (c) 2011, Creative Technology Ltd. + * + * Based on patch_ca0110.c + * Copyright (c) 2008 Takashi Iwai tiwai@suse.de + * + * This driver is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; either version 2 of the License, or + * (at your option) any later version. + * + * This driver is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA + */ + +#include <linux/init.h> +#include <linux/delay.h> +#include <linux/slab.h> +#include <linux/pci.h> +#include <linux/module.h> +#include <sound/core.h> +#include <sound/tlv.h> +#include "../hda_codec.h" +#include "../hda_local.h" + +#include "ca0132_regs.h" +#include "dsp_os.h" + +#include "speakereq_x.h" +#include "speakereq_y.h" + +/* Enable this to see more debug messages. */ +/*#define ENABLE_CA0132_DEBUG*/ +/* Enable this to manual select HP/Speaker and AMic1/DMic. */ +#define ENABLE_MANUAL_SELECT +/* Enable this to see controls for tuning purpose. */ +/*#define ENABLE_TUNING_CONTROLS*/ + +#define FLOAT_ZERO 0x00000000 +#define FLOAT_ONE 0x3f800000 +#define FLOAT_TWO 0x40000000 +#define FLOAT_MINUS_5 0xc0a00000 + +#define UNSOL_TAG_HP 0x0f +#define UNSOL_TAG_DMIC 0x14 +#define UNSOL_TAG_AMIC1 0x15 +#define UNSOL_TAG_DSP 0x16 + +#define SUCCEEDED(_x) (((int)(_x)) >= 0) +#define FAILED(_x) (((int)(_x)) < 0) +#define CT_OK (0) +#define CT_FAIL (-1) + +#define MIN(x, y) (((x) < (y)) ? (x) : (y)) +#define MAX(x, y) (((x) > (y)) ? (x) : (y)) + +#define DSP_DMA_WRITE_BUFLEN_INIT (1UL<<18) +#define DSP_DMA_WRITE_BUFLEN_OVLY (1UL<<15) + +#define DMA_TRANSFER_FRAME_SIZE_NWORDS 8 +#define DMA_TRANSFER_MAX_FRAME_SIZE_NWORDS 32 +#define DMA_OVERLAY_FRAME_SIZE_NWORDS 2 + +#define MASTERCONTROL 0x80 +#define MASTERCONTROL_ALLOC_DMA_CHAN 9 +#define MASTERCONTROL_QUERY_SPEAKER_EQ_ADDRESS 22 + +#define WIDGET_CHIP_CTRL 0x15 +#define WIDGET_DSP_CTRL 0x16 + +#define MEM_CONNID_MICIN1 3 +#define MEM_CONNID_MICIN2 5 +#define MEM_CONNID_MICOUT1 12 +#define MEM_CONNID_MICOUT2 14 +#define MEM_CONNID_WUH 10 +#define MEM_CONNID_DSP 16 + +#define SCP_SET 0 +#define SCP_GET 1 + +/* Debug message controls */ +#ifdef ENABLE_CA0132_DEBUG + +#define CTASSERT(x) \ + { if (!(x)) snd_printdd(KERN_ERR "CTASSERT failed.\n"); } + +#define CA0132_LOG(fmt, args...) snd_printdd(fmt, ##args) +#define CA0132_DSP_LOG(msg) snd_printdd(KERN_INFO "[%s]\n", msg) +#define FAIL_MSG(n, s) fail_debug_out(n, s) + +static int fail_debug_out(int status, const char *s) +{ + snd_printdd(KERN_ERR "[%s]\n", s); + return status; +} +#else + +#define CTASSERT(x) do { } while (0) +#define CA0132_LOG(fmt, args...) do { } while (0) +#define CA0132_DSP_LOG(msg) do { } while (0) +#define FAIL_MSG(n, s) fail_debug_out(n, s) + +static int fail_debug_out(int status, const char *s) +{ + return status; +} +#endif + +static char *dirstr[2] = { "Playback", "Capture" }; + +enum { + SPEAKER_OUT, + HEADPHONE_OUT +}; + +enum { + DIGITAL_MIC, + LINE_MIC_IN +}; + +enum { +#define VNODE_START_NID 0x80 + VNID_HP = VNODE_START_NID, /* Headphone vnid */ + VNID_SPK, /* Speaker vnid */ + VNID_DMIC, + VNID_AMIC1, +#ifdef ENABLE_MANUAL_SELECT + VNID_HP_SEL, + VNID_AMIC1_SEL, +#endif + VNODE_END_NID, +#define VNODES_COUNT (VNODE_END_NID - VNODE_START_NID) + +#define EFFECT_START_NID 0x90 +#define OUT_EFFECT_START_NID EFFECT_START_NID + SURROUND = OUT_EFFECT_START_NID, + CRYSTALIZER, + DIALOG_PLUS, + SMART_VOLUME, + X_BASS, + EQUALIZER, + OUT_EFFECT_END_NID, +#define OUT_EFFECTS_COUNT (OUT_EFFECT_END_NID - OUT_EFFECT_START_NID) + +#define IN_EFFECT_START_NID OUT_EFFECT_END_NID + ECHO_CANCELLATION = IN_EFFECT_START_NID, + VOICE_FOCUS, + MIC_SVM, + IN_EFFECT_END_NID, +#define IN_EFFECTS_COUNT (IN_EFFECT_END_NID - IN_EFFECT_START_NID) + + VOICEFX = IN_EFFECT_END_NID, + PLAY_ENHANCEMENT, + CRYSTAL_VOICE, + EFFECT_END_NID +#define EFFECTS_COUNT (EFFECT_END_NID - EFFECT_START_NID) +}; + +/* Effects values size*/ +#define EFFECT_VALS_MAX_COUNT 12 + +struct ct_effect { + char name[44]; + hda_nid_t nid; + int mid; /*effect module ID*/ + int reqs[EFFECT_VALS_MAX_COUNT]; /*effect module request*/ + int direct; /* 0:output; 1:input*/ + int params; /* number of default non-on/off params */ + /*effect default values, 1st is on/off. */ + float def_vals[EFFECT_VALS_MAX_COUNT]; +}; + +static struct ct_effect ca0132_effects[EFFECTS_COUNT] = { + { "Surround", + SURROUND, + 0x96, + {0, 1}, + 0, + 1, + {1.00, 0.67} + }, + { "Crystalizer", + CRYSTALIZER, + 0x96, + {7, 8}, + 0, + 1, + {1.00, 0.65} + }, + { "Dialog Plus", + DIALOG_PLUS, + 0x96, + {2, 3}, + 0, + 1, + {0.00, 0.50} + }, + { "Smart Volume", + SMART_VOLUME, + 0x96, + {4, 5, 6}, + 0, + 2, + {1.00, 0.74, 0.00} + }, + { "X-Bass", + X_BASS, + 0x96, + {24, 23, 25}, + 0, + 2, + {1.00, 80.00, 0.50} + }, + { "Equalizer", + EQUALIZER, + 0x96, + {9, 10, 11, 12, 13, 14, + 15, 16, 17, 18, 19, 20}, + 0, + 11, + {0.00, 0.00, 0.00, 0.00, 0.00, 0.00, + 0.00, 0.00, 0.00, 0.00, 0.00, 0.00} + }, + { "Echo Cancellation", + ECHO_CANCELLATION, + 0x95, + {0, 1, 2, 3}, + 1, + 3, + {0.00, 0.72886, 0.00, 0.00} + }, + { "Voice Focus", + VOICE_FOCUS, + 0x95, + {6, 7, 8, 9}, + 1, + 3, + {1.00, 0.50, 30.00, 30.00} + }, + { "Mic SVM", + MIC_SVM, + 0x95, + {44, 45}, + 1, + 1, + {0.00, 0.74} + }, + { "VoiceFX", + VOICEFX, + 0x95, + {10, 11, 12, 13, 14, 15, 16, 17, 18}, + 1, + 8, + {0.00, 400.00, 1400.00, 2000.00, 1.00, 1.00, 1.00, 0.00, 0.00} + } +}; + + +/* Tuning controls */ +#ifdef ENABLE_TUNING_CONTROLS + +enum { +#define TUNING_CTL_START_NID 0xC0 + WEDGE_ANGLE = TUNING_CTL_START_NID, + SVM_LEVEL, + EQUALIZER_BAND_0, + EQUALIZER_BAND_1, + EQUALIZER_BAND_2, + EQUALIZER_BAND_3, + EQUALIZER_BAND_4, + EQUALIZER_BAND_5, + EQUALIZER_BAND_6, + EQUALIZER_BAND_7, + EQUALIZER_BAND_8, + EQUALIZER_BAND_9, + TUNING_CTL_END_NID +#define TUNING_CTLS_COUNT (TUNING_CTL_END_NID - TUNING_CTL_START_NID) +}; + +struct ct_tuning_ctl { + char name[44]; + hda_nid_t parent_nid; + hda_nid_t nid; + int mid; /*effect module ID*/ + int req; /*effect module request*/ + int direct; /* 0:output; 1:input*/ + float def_val;/*effect default values*/ +}; + +static struct ct_tuning_ctl ca0132_tuning_ctls[] = { + { "Wedge Angle", + VOICE_FOCUS, + WEDGE_ANGLE, + 0x95, + 8, + 1, + 30.00 + }, + { "SVM Level", + MIC_SVM, + SVM_LEVEL, + 0x95, + 45, + 1, + 0.74 + }, + { "EQ Band0", + EQUALIZER, + EQUALIZER_BAND_0, + 0x96, + 11, + 0, + 0 + }, + { "EQ Band1", + EQUALIZER, + EQUALIZER_BAND_1, + 0x96, + 12, + 0, + 0 + }, + { "EQ Band2", + EQUALIZER, + EQUALIZER_BAND_2, + 0x96, + 13, + 0, + 0 + }, + { "EQ Band3", + EQUALIZER, + EQUALIZER_BAND_3, + 0x96, + 14, + 0, + 0 + }, + { "EQ Band4", + EQUALIZER, + EQUALIZER_BAND_4, + 0x96, + 15, + 0, + 0 + }, + { "EQ Band5", + EQUALIZER, + EQUALIZER_BAND_5, + 0x96, + 16, + 0, + 0 + }, + { "EQ Band6", + EQUALIZER, + EQUALIZER_BAND_6, + 0x96, + 17, + 0, + 0 + }, + { "EQ Band7", + EQUALIZER, + EQUALIZER_BAND_7, + 0x96, + 18, + 0, + 0 + }, + { "EQ Band8", + EQUALIZER, + EQUALIZER_BAND_8, + 0x96, + 19, + 0, + 0 + }, + { "EQ Band9", + EQUALIZER, + EQUALIZER_BAND_9, + 0x96, + 20, + 0, + 0 + } +}; +#endif + +/* Voice FX Presets */ +#define VOICEFX_MAX_PARAM_COUNT 9 + +struct ct_voicefx { + char *name; + hda_nid_t nid; + int mid; + int reqs[VOICEFX_MAX_PARAM_COUNT]; /*effect module request*/ +}; + +struct ct_voicefx_preset { + char *name; /*preset name*/ + float vals[VOICEFX_MAX_PARAM_COUNT]; +}; + +struct ct_voicefx ca0132_voicefx = { + "VoiceFX Capture Switch", + VOICEFX, + 0x95, + {10, 11, 12, 13, 14, 15, 16, 17, 18} +}; + +struct ct_voicefx_preset ca0132_voicefx_presets[] = { + { "Neutral", + { 0.000000E+000, 4.000000E+002, 1.400000E+003, + 2.000000E+003, 1.000000E+000, 1.000000E+000, + 1.000000E+000, 0.000000E+000, 0.000000E+000 } + }, + { "Female2Male", + { 1.000000E+000, 4.000000E+002, 1.400000E+003, + 2.000000E+003, 6.000000E-001, 1.050000E+000, + 1.000000E+000, 0.000000E+000, 0.000000E+000 } + }, + { "Male2Female", + { 1.000000E+000, 4.000000E+002, 1.400000E+003, + 2.220000E+003, 2.370000E+000, 9.200000E-001, + 1.000000E+000, 0.000000E+000, 0.000000E+000 } + }, + { "ScrappyKid", + { 1.000000E+000, 4.000000E+002, 1.400000E+003, + 2.000000E+003, 3.000000E+000, 6.600000E-001, + 1.000000E+000, 0.000000E+000, 0.000000E+000 } + }, + { "Elderly", + { 1.000000E+000, 7.130000E+002, 1.500000E+003, + 1.800000E+003, 1.400000E+000, 1.450000E+000, + 1.000000E+000, 1.818171E-001, 0.000000E+000 } + }, + { "Org", + { 1.000000E+000, 4.680000E+002, 1.321000E+003, + 2.200000E+003, 6.500000E-001, 1.500000E+000, + 1.000000E+000, 0.000000E+000, 0.000000E+000 } + }, + { "Elf", + { 1.000000E+000, 3.980000E+002, 1.395000E+003, + 2.451000E+003, 1.110000E+000, 9.600000E-001, + 1.000000E+000, 0.000000E+000, 0.000000E+000 } + }, + { "Dwarf", + { 1.000000E+000, 2.940000E+002, 1.527000E+003, + 2.055000E+003, 7.700000E-001, 9.700000E-001, + 1.000000E+000, 0.000000E+000, 0.000000E+000 } + }, + { "AlienBrute", + { 1.000000E+000, 3.835443E+002, 1.428496E+003, + 2.550000E+003, 6.500000E-001, 1.311318E+000, + 1.000000E+000, 3.000000E-002, 0.000000E+000 } + }, + { "Robot", + { 1.000000E+000, 4.000000E+002, 1.400000E+003, + 2.000000E+003, 1.394090E+000, 1.000000E+000, + -8.239998E-003, 0.000000E+000, 0.000000E+000 } + }, + { "Marine", + { 1.000000E+000, 3.880000E+002, 1.155000E+003, + 1.848000E+003, 8.000000E-001, 1.080000E+000, + 5.400000E-001, 0.000000E+000, 0.000000E+000 } + }, + { "Emo", + { 1.000000E+000, 4.000000E+002, 1.400000E+003, + 2.000000E+003, 1.000000E+000, 1.000000E+000, + 2.000000E-001, 0.000000E+000, 0.000000E+000 } + }, + { "DeepVoice", + { 1.000000E+000, 3.395443E+002, 1.362496E+003, + 2.046000E+003, 4.291186E-001, 1.201318E+000, + 1.000000E+000, 0.000000E+000, 0.000000E+000 } + }, + { "Munchkin", + { 1.000000E+000, 4.000000E+002, 1.400000E+003, + 2.000000E+003, 6.016271E-001, 1.000000E+000, + 1.000000E+000, 0.000000E+000, 0.000000E+000 } + } +}; + +enum hda_cmd_vendor_io { + /* for DspIO node */ + VENDOR_DSPIO_SCP_WRITE_DATA_LOW = 0x000, + VENDOR_DSPIO_SCP_WRITE_DATA_HIGH = 0x100, + + VENDOR_DSPIO_STATUS = 0xF01, + VENDOR_DSPIO_SCP_POST_READ_DATA = 0x702, + VENDOR_DSPIO_SCP_READ_DATA = 0xF02, + VENDOR_DSPIO_DSP_INIT = 0x703, + VENDOR_DSPIO_SCP_POST_COUNT_QUERY = 0x704, + VENDOR_DSPIO_SCP_READ_COUNT = 0xF04, + + /* for ChipIO node */ + VENDOR_CHIPIO_ADDRESS_LOW = 0x000, + VENDOR_CHIPIO_ADDRESS_HIGH = 0x100, + VENDOR_CHIPIO_STREAM_FORMAT = 0x200, + VENDOR_CHIPIO_DATA_LOW = 0x300, + VENDOR_CHIPIO_DATA_HIGH = 0x400, + + VENDOR_CHIPIO_GET_PARAMETER = 0xF00, + VENDOR_CHIPIO_STATUS = 0xF01, + VENDOR_CHIPIO_HIC_POST_READ = 0x702, + VENDOR_CHIPIO_HIC_READ_DATA = 0xF03, + + VENDOR_CHIPIO_8051_DATA_WRITE = 0x707, + VENDOR_CHIPIO_8051_DATA_READ = 0xF07, + + VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE = 0x70A, + VENDOR_CHIPIO_CT_EXTENSIONS_GET = 0xF0A, + + VENDOR_CHIPIO_PLL_PMU_WRITE = 0x70C, + VENDOR_CHIPIO_PLL_PMU_READ = 0xF0C, + VENDOR_CHIPIO_8051_ADDRESS_LOW = 0x70D, + VENDOR_CHIPIO_8051_ADDRESS_HIGH = 0x70E, + VENDOR_CHIPIO_FLAG_SET = 0x70F, + VENDOR_CHIPIO_FLAGS_GET = 0xF0F, + VENDOR_CHIPIO_PARAM_SET = 0x710, + VENDOR_CHIPIO_PARAM_GET = 0xF10, + + VENDOR_CHIPIO_PORT_ALLOC_CONFIG_SET = 0x711, + VENDOR_CHIPIO_PORT_ALLOC_SET = 0x712, + VENDOR_CHIPIO_PORT_ALLOC_GET = 0xF12, + VENDOR_CHIPIO_PORT_FREE_SET = 0x713, + + VENDOR_CHIPIO_PARAM_EX_ID_GET = 0xF17, + VENDOR_CHIPIO_PARAM_EX_ID_SET = 0x717, + VENDOR_CHIPIO_PARAM_EX_VALUE_GET = 0xF18, + VENDOR_CHIPIO_PARAM_EX_VALUE_SET = 0x718, + + VENDOR_CHIPIO_DMIC_CTL_SET = 0x788, + VENDOR_CHIPIO_DMIC_CTL_GET = 0xF88, + VENDOR_CHIPIO_DMIC_PIN_SET = 0x789, + VENDOR_CHIPIO_DMIC_PIN_GET = 0xF89, + VENDOR_CHIPIO_DMIC_MCLK_SET = 0x78A, + VENDOR_CHIPIO_DMIC_MCLK_GET = 0xF8A +}; + +enum control_flag_id { + /* Connection manager stream setup is bypassed/enabled */ + CONTROL_FLAG_C_MGR = 0, + /* DSP DMA is bypassed/enabled */ + CONTROL_FLAG_DMA = 1, + /* 8051 'idle' mode is disabled/enabled */ + CONTROL_FLAG_IDLE_ENABLE = 2, + /* Tracker for the SPDIF-in path is bypassed/enabled */ + CONTROL_FLAG_TRACKER = 3, + /* DigitalOut to Spdif2Out connection is disabled/enabled */ + CONTROL_FLAG_SPDIF2OUT = 4, + /* Digital Microphone is disabled/enabled */ + CONTROL_FLAG_DMIC = 5, + /* ADC_B rate is 48 kHz/96 kHz */ + CONTROL_FLAG_ADC_B_96KHZ = 6, + /* ADC_C rate is 48 kHz/96 kHz */ + CONTROL_FLAG_ADC_C_96KHZ = 7, + /* DAC rate is 48 kHz/96 kHz (affects all DACs) */ + CONTROL_FLAG_DAC_96KHZ = 8, + /* DSP rate is 48 kHz/96 kHz */ + CONTROL_FLAG_DSP_96KHZ = 9, + /* SRC clock is 98 MHz/196 MHz (196 MHz forces rate to 96 KHz) */ + CONTROL_FLAG_SRC_CLOCK_196MHZ = 10, + /* SRC rate is 48 kHz/96 kHz (48 kHz disabled when clock is 196 MHz) */ + CONTROL_FLAG_SRC_RATE_96KHZ = 11, + /* Decode Loop (DSP->SRC->DSP) is disabled/enabled */ + CONTROL_FLAG_DECODE_LOOP = 12, + /* De-emphasis filter on DAC-1 disabled/enabled */ + CONTROL_FLAG_DAC1_DEEMPHASIS = 13, + /* De-emphasis filter on DAC-2 disabled/enabled */ + CONTROL_FLAG_DAC2_DEEMPHASIS = 14, + /* De-emphasis filter on DAC-3 disabled/enabled */ + CONTROL_FLAG_DAC3_DEEMPHASIS = 15, + /* High-pass filter on ADC_B disabled/enabled */ + CONTROL_FLAG_ADC_B_HIGH_PASS = 16, + /* High-pass filter on ADC_C disabled/enabled */ + CONTROL_FLAG_ADC_C_HIGH_PASS = 17, + /* Common mode on Port_A disabled/enabled */ + CONTROL_FLAG_PORT_A_COMMON_MODE = 18, + /* Common mode on Port_D disabled/enabled */ + CONTROL_FLAG_PORT_D_COMMON_MODE = 19, + /* Impedance for ramp generator on Port_A 16 Ohm/10K Ohm */ + CONTROL_FLAG_PORT_A_10KOHM_LOAD = 20, + /* Impedance for ramp generator on Port_D, 16 Ohm/10K Ohm */ + CONTROL_FLAG_PORT_D_10KOHM_LOAD = 21, + /* ASI rate is 48kHz/96kHz */ + CONTROL_FLAG_ASI_96KHZ = 22, + /* DAC power settings able to control attached ports no/yes */ + CONTROL_FLAG_DACS_CONTROL_PORTS = 23, + /* Clock Stop OK reporting is disabled/enabled */ + CONTROL_FLAG_CONTROL_STOP_OK_ENABLE = 24, + /* Number of control flags */ + CONTROL_FLAGS_MAX = (CONTROL_FLAG_CONTROL_STOP_OK_ENABLE+1) +}; + +enum control_param_id { + /* 0: force HDA, 1: allow DSP if HDA Spdif1Out stream is idle */ + CONTROL_PARAM_SPDIF1_SOURCE = 2, + + /* Stream Control */ + + /* Select stream with the given ID */ + CONTROL_PARAM_STREAM_ID = 24, + /* Source connection point for the selected stream */ + CONTROL_PARAM_STREAM_SOURCE_CONN_POINT = 25, + /* Destination connection point for the selected stream */ + CONTROL_PARAM_STREAM_DEST_CONN_POINT = 26, + /* Number of audio channels in the selected stream */ + CONTROL_PARAM_STREAMS_CHANNELS = 27, + /*Enable control for the selected stream */ + CONTROL_PARAM_STREAM_CONTROL = 28, + + /* Connection Point Control */ + + /* Select connection point with the given ID */ + CONTROL_PARAM_CONN_POINT_ID = 29, + /* Connection point sample rate */ + CONTROL_PARAM_CONN_POINT_SAMPLE_RATE = 30, + + /* Node Control */ + + /* Select HDA node with the given ID */ + CONTROL_PARAM_NODE_ID = 31 +}; + +enum hda_vendor_status_dspio { + /* Success */ + VENDOR_STATUS_DSPIO_OK = 0x00, + /* Busy, unable to accept new command, the host must retry */ + VENDOR_STATUS_DSPIO_BUSY = 0x01, + /* SCP command queue is full */ + VENDOR_STATUS_DSPIO_SCP_COMMAND_QUEUE_FULL = 0x02, + /* SCP response queue is empty */ + VENDOR_STATUS_DSPIO_SCP_RESPONSE_QUEUE_EMPTY = 0x03 +}; + +enum hda_vendor_status_chipio { + /* Success */ + VENDOR_STATUS_CHIPIO_OK = 0x00, + /* Busy, unable to accept new command, the host must retry */ + VENDOR_STATUS_CHIPIO_BUSY = 0x01 +}; + +enum ca0132_sample_rate { + SR_6_000 = 0x00, + SR_8_000 = 0x01, + SR_9_600 = 0x02, + SR_11_025 = 0x03, + SR_16_000 = 0x04, + SR_22_050 = 0x05, + SR_24_000 = 0x06, + SR_32_000 = 0x07, + SR_44_100 = 0x08, + SR_48_000 = 0x09, + SR_88_200 = 0x0A, + SR_96_000 = 0x0B, + SR_144_000 = 0x0C, + SR_176_400 = 0x0D, + SR_192_000 = 0x0E, + SR_384_000 = 0x0F, + + SR_COUNT = 0x10, + + SR_RATE_UNKNOWN = 0x1F +}; + +enum dsp_download_state { + DSP_DOWNLOAD_FAILED = -1, + DSP_DOWNLOAD_INIT = 0, + DSP_DOWNLOADING = 1, + DSP_DOWNLOADED = 2 +}; + +struct hda_stream_format { + unsigned int sample_rate; + unsigned short valid_bits_per_sample; + unsigned short container_size; + unsigned short number_channels; +}; + +/* retrieve parameters from hda format */ +#define get_hdafmt_chs(fmt) (fmt & 0xf) +#define get_hdafmt_bits(fmt) ((fmt >> 4) & 0x7) +#define get_hdafmt_rate(fmt) ((fmt >> 8) & 0x7f) +#define get_hdafmt_type(fmt) ((fmt >> 15) & 0x1) + +struct ca0132_spec { + struct snd_kcontrol_new *mixers[5]; + unsigned int num_mixers; + const struct hda_verb *base_init_verbs; + const struct hda_verb *base_exit_verbs; + const struct hda_verb *init_verbs[5]; + unsigned int num_init_verbs; /* exclude base init verbs */ + + /* Nodes configurations */ + struct hda_multi_out multiout; + hda_nid_t out_pins[5]; + hda_nid_t dacs[5]; + unsigned int num_outputs; + hda_nid_t input_pins[5]; + hda_nid_t adcs[5]; + unsigned int num_inputs; + hda_nid_t shared_mic_nid; + hda_nid_t shared_out_nid; + struct hda_pcm pcm_rec[5]; /* PCM information */ + + /* chip access */ + struct mutex chipio_mutex; /* chip access mutex */ + u32 curr_chip_addx; + + /* DSP download related */ + enum dsp_download_state dsp_state; + unsigned int dsp_stream_id; + unsigned int wait_scp; + unsigned int wait_scp_header; + unsigned int wait_num_data; + unsigned int scp_resp_header; + unsigned int scp_resp_data[4]; + unsigned int scp_resp_count; + + /* mixer and effects related */ + unsigned char dmic_ctl; + int cur_out_type; + int cur_mic_type; + long vnode_lvol[VNODES_COUNT]; + long vnode_rvol[VNODES_COUNT]; + long vnode_lswitch[VNODES_COUNT]; + long vnode_rswitch[VNODES_COUNT]; + long effects_switch[EFFECTS_COUNT]; + long voicefx_val; + long cur_mic_boost; + + #ifdef ENABLE_TUNING_CONTROLS + long cur_ctl_vals[TUNING_CTLS_COUNT]; + #endif +}; + +/* + * CA0132 codec access + */ +unsigned int codec_send_command(struct hda_codec *codec, hda_nid_t nid, + unsigned int verb, unsigned int parm, unsigned int *res) +{ + unsigned int response; + response = snd_hda_codec_read(codec, nid, 0, verb, parm); + *res = response; + + return ((response == -1) ? CT_FAIL : CT_OK); +} + +static int codec_set_converter_format(struct hda_codec *codec, hda_nid_t nid, + unsigned short converter_format, unsigned int *res) +{ + return codec_send_command(codec, nid, VENDOR_CHIPIO_STREAM_FORMAT, + converter_format & 0xffff, res); +} + +static int codec_set_converter_stream_channel(struct hda_codec *codec, + hda_nid_t nid, unsigned char stream, + unsigned char channel, unsigned int *res) +{ + unsigned char converter_stream_channel = 0; + + converter_stream_channel = (stream << 4) | (channel & 0x0f); + return codec_send_command(codec, nid, AC_VERB_SET_CHANNEL_STREAMID, + converter_stream_channel, res); +} + +/* + * CA0132 chip access stuffs + */ +static int chipio_send(struct hda_codec *codec, + unsigned int reg, + u32 data) +{ + unsigned int res; + int retry = 50; + + /* send bits of data specified by reg */ + do { + res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, + reg, data); + if (res == VENDOR_STATUS_CHIPIO_OK) + return CT_OK; + } while (--retry); + + CTASSERT(0); + return CT_FAIL; +} + +static int chipio_write_addx(struct hda_codec *codec, u32 chip_addx) +{ + struct ca0132_spec *spec = codec->spec; + int status = CT_OK; + + if (spec->curr_chip_addx == chip_addx) + return CT_OK; + + /* send low 16 bits of the address */ + status = chipio_send(codec, VENDOR_CHIPIO_ADDRESS_LOW, + chip_addx & 0xffff); + + if (SUCCEEDED(status)) { + /* send high 16 bits of the address */ + status = chipio_send(codec, VENDOR_CHIPIO_ADDRESS_HIGH, + chip_addx >> 16); + } + + CTASSERT(SUCCEEDED(status)); + spec->curr_chip_addx = SUCCEEDED(status) ? chip_addx : ~0UL; + + return status; +} + +static int chipio_write_data(struct hda_codec *codec, u32 data) +{ + struct ca0132_spec *spec = codec->spec; + int status = CT_OK; + + /* send low 16 bits of the data */ + status = chipio_send(codec, VENDOR_CHIPIO_DATA_LOW, data & 0xffff); + + if (SUCCEEDED(status)) { + /* send high 16 bits of the data */ + status = chipio_send(codec, VENDOR_CHIPIO_DATA_HIGH, + data >> 16); + } + + CTASSERT(SUCCEEDED(status)); + spec->curr_chip_addx = SUCCEEDED(status) ? + (spec->curr_chip_addx + 4) : ~0UL; + + return status; +} + +static int chipio_write_data_multiple(struct hda_codec *codec, + const u32 *data, + unsigned int count) +{ + int status = CT_OK; + + if (data == NULL) + return FAIL_MSG(CT_FAIL, "chipio_write_data null ptr"); + + while ((count-- != 0) && (status == CT_OK)) + status = chipio_write_data(codec, *data++); + + return status; +} + +static int chipio_read_data(struct hda_codec *codec, unsigned int *data) +{ + struct ca0132_spec *spec = codec->spec; + int status = CT_OK; + + /* post read */ + status = chipio_send(codec, VENDOR_CHIPIO_HIC_POST_READ, 0); + + if (SUCCEEDED(status)) { + /* read status */ + status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); + } + + if (SUCCEEDED(status)) { + /* read data */ + *data = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, + VENDOR_CHIPIO_HIC_READ_DATA, 0); + } + + CTASSERT(SUCCEEDED(status)); + spec->curr_chip_addx = SUCCEEDED(status) ? + (spec->curr_chip_addx + 4) : ~0UL; + + return status; +} + +static int chipio_write(struct hda_codec *codec, u32 chip_addx, + const u32 data) +{ + struct ca0132_spec *spec = codec->spec; + int status; + + mutex_lock(&spec->chipio_mutex); + status = chipio_write_addx(codec, chip_addx); + if (SUCCEEDED(status)) + status = chipio_write_data(codec, data); + mutex_unlock(&spec->chipio_mutex); + + return status; +} + +static int chipio_write_multiple(struct hda_codec *codec, + u32 chip_addx, + const u32 *data, + unsigned int count) +{ + struct ca0132_spec *spec = codec->spec; + int status; + + mutex_lock(&spec->chipio_mutex); + status = chipio_write_addx(codec, chip_addx); + if (SUCCEEDED(status)) + status = chipio_write_data_multiple(codec, data, count); + mutex_unlock(&spec->chipio_mutex); + + return status; +} + +static int chipio_read(struct hda_codec *codec, u32 chip_addx, + unsigned int *data) +{ + struct ca0132_spec *spec = codec->spec; + int status; + + mutex_lock(&spec->chipio_mutex); + status = chipio_write_addx(codec, chip_addx); + if (SUCCEEDED(status)) + status = chipio_read_data(codec, data); + mutex_unlock(&spec->chipio_mutex); + + return status; +} + +static void chipio_set_control_flag(struct hda_codec *codec, + enum control_flag_id flag_id, + bool flag_state) +{ + unsigned int val; + unsigned int flag_bit; + + flag_bit = (flag_state ? 1 : 0); + val = (flag_bit << 7) | (flag_id); + snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, + VENDOR_CHIPIO_FLAG_SET, val); +} + +static void chipio_set_control_param(struct hda_codec *codec, + enum control_param_id param_id, int param_val) +{ + struct ca0132_spec *spec = codec->spec; + int val; + + if ((param_id < 32) && (param_val < 8)) { + val = (param_val << 5) | (param_id); + snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, + VENDOR_CHIPIO_PARAM_SET, val); + } else { + mutex_lock(&spec->chipio_mutex); + if (chipio_send(codec, VENDOR_CHIPIO_STATUS, 0) == CT_OK) { + snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, + VENDOR_CHIPIO_PARAM_EX_ID_SET, + param_id); + snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, + VENDOR_CHIPIO_PARAM_EX_VALUE_SET, + param_val); + } else + CA0132_LOG("set_control_param:FAIL! id=0x%x, val=%d\n", + param_id, param_val); + mutex_unlock(&spec->chipio_mutex); + } +} + +static void chipio_set_conn_rate(struct hda_codec *codec, + int connid, enum ca0132_sample_rate rate) +{ + chipio_set_control_param(codec, CONTROL_PARAM_CONN_POINT_ID, connid); + chipio_set_control_param(codec, CONTROL_PARAM_CONN_POINT_SAMPLE_RATE, + rate); +} + +static void chipio_enable_clocks(struct hda_codec *codec) +{ + struct ca0132_spec *spec = codec->spec; + + mutex_lock(&spec->chipio_mutex); + snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, + VENDOR_CHIPIO_8051_ADDRESS_LOW, 0); + snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, + VENDOR_CHIPIO_PLL_PMU_WRITE, 0xff); + snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, + VENDOR_CHIPIO_8051_ADDRESS_LOW, 5); + snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, + VENDOR_CHIPIO_PLL_PMU_WRITE, 0x0b); + snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, + VENDOR_CHIPIO_8051_ADDRESS_LOW, 6); + snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, + VENDOR_CHIPIO_PLL_PMU_WRITE, 0xff); + mutex_unlock(&spec->chipio_mutex); +} + + +/* + * CA0132 DSP IO stuffs + */ +static int dspio_send(struct hda_codec *codec, unsigned int reg, + unsigned int data) +{ + unsigned int res; + int retry = 50; + + /* send bits of data specified by reg to dsp */ + do { + res = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, reg, data); + if ((res >= 0) && (res != VENDOR_STATUS_DSPIO_BUSY)) + return res; + } while (--retry); + + CTASSERT(retry); + return CT_FAIL; +} + +static void dspio_write_wait(struct hda_codec *codec) +{ + int cur_val, prv_val; + int retry = 50; + + cur_val = 0; + do { + prv_val = cur_val; + msleep(20); + dspio_send(codec, VENDOR_DSPIO_SCP_POST_COUNT_QUERY, 1); + dspio_send(codec, VENDOR_DSPIO_STATUS, 0); + cur_val = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, + VENDOR_DSPIO_SCP_READ_COUNT, 0); + } while (cur_val && (cur_val == prv_val) && --retry); +} + +static int dspio_write(struct hda_codec *codec, unsigned int scp_data) +{ + struct ca0132_spec *spec = codec->spec; + int status; + + dspio_write_wait(codec); + + mutex_lock(&spec->chipio_mutex); + status = dspio_send(codec, VENDOR_DSPIO_SCP_WRITE_DATA_LOW, + scp_data & 0xffff); + if (SUCCEEDED(status)) + status = dspio_send(codec, VENDOR_DSPIO_SCP_WRITE_DATA_HIGH, + scp_data >> 16); + mutex_unlock(&spec->chipio_mutex); + + /* OK, now check if the write itself has executed*/ + if (SUCCEEDED(status)) + status = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, + VENDOR_DSPIO_STATUS, 0); + + if (status == VENDOR_STATUS_DSPIO_SCP_COMMAND_QUEUE_FULL) + CA0132_LOG("dspio_write: SCP_COMMAND_QUEUE_FULL!!!\n\n"); + + return (status == VENDOR_STATUS_DSPIO_SCP_COMMAND_QUEUE_FULL) ? + CT_FAIL : CT_OK; +} + +static int dspio_write_multiple(struct hda_codec *codec, + unsigned int *buffer, unsigned int size) +{ + int status = CT_OK; + unsigned int count; + + if ((buffer == NULL)) + return CT_FAIL; + + count = 0; + while (count < size) { + status = dspio_write(codec, *buffer++); + if (status != CT_OK) + break; + count++; + } + + return status; +} + +static int dspio_read(struct hda_codec *codec, unsigned int *data) +{ + int status; + + status = dspio_send(codec, VENDOR_DSPIO_SCP_POST_READ_DATA, 0); + if (SUCCEEDED(status)) + status = dspio_send(codec, VENDOR_DSPIO_STATUS, 0); + + if (FAILED(status) + || (status == VENDOR_STATUS_DSPIO_SCP_RESPONSE_QUEUE_EMPTY)) + return CT_FAIL; + + *data = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, + VENDOR_DSPIO_SCP_READ_DATA, 0); + + return CT_OK; +} + +static int dspio_read_multiple(struct hda_codec *codec, unsigned int *buffer, + unsigned int *buf_size, unsigned int size_count) +{ + int status = CT_OK; + unsigned int size = *buf_size; + unsigned int count; + unsigned int skip_count; + unsigned int dummy; + + if ((buffer == NULL)) + return CT_FAIL; + + count = 0; + while (count < size && count < size_count) { + status = dspio_read(codec, buffer++); + if (status != CT_OK) + break; + count++; + } + + skip_count = count; + if (SUCCEEDED(status)) { + while (skip_count < size) { + status = dspio_read(codec, &dummy); + if (status != CT_OK) + break; + skip_count++; + } + } + *buf_size = count; + + return status; +} + +static inline unsigned int +make_scp_header(unsigned int target_id, unsigned int source_id, + unsigned int get_flag, unsigned int req, + unsigned int device_flag, unsigned int resp_flag, + unsigned int error_flag, unsigned int data_size) +{ + unsigned int header = 0; + + header = (data_size & 0x1f) << 27; + header |= (error_flag & 0x01) << 26; + header |= (resp_flag & 0x01) << 25; + header |= (device_flag & 0x01) << 24; + header |= (req & 0x7f) << 17; + header |= (get_flag & 0x01) << 16; + header |= (source_id & 0xff) << 8; + header |= target_id & 0xff; + + return header; +} + +static inline void +extract_scp_header(unsigned int header, + unsigned int *target_id, unsigned int *source_id, + unsigned int *get_flag, unsigned int *req, + unsigned int *device_flag, unsigned int *resp_flag, + unsigned int *error_flag, unsigned int *data_size) +{ + if (data_size) + *data_size = (header >> 27) & 0x1f; + if (error_flag) + *error_flag = (header >> 26) & 0x01; + if (resp_flag) + *resp_flag = (header >> 25) & 0x01; + if (device_flag) + *device_flag = (header >> 24) & 0x01; + if (req) + *req = (header >> 17) & 0x7f; + if (get_flag) + *get_flag = (header >> 16) & 0x01; + if (source_id) + *source_id = (header >> 8) & 0xff; + if (target_id) + *target_id = header & 0xff; +} + +#define SCP_MAX_DATA_WORDS (16) + +/* Data type to simplify using floats and integers */ +union _scp_data { + float f; + unsigned int ui; +}; + +/* Structure to contain any SCP message */ +struct scp_msg { + unsigned int hdr; + union _scp_data data[SCP_MAX_DATA_WORDS]; +}; + +static void dspio_clear_response_queue(struct hda_codec *codec) +{ + unsigned int dummy = 0; + int status = CT_FAIL; + + /* clear all from the response queue */ + do { + status = dspio_read(codec, &dummy); + } while (status == CT_OK); +} + +static int dspio_get_response_data(struct hda_codec *codec) +{ + struct ca0132_spec *spec = codec->spec; + unsigned int data = 0; + unsigned int count; + + if (FAILED(dspio_read(codec, &data))) + return CT_FAIL; + + CA0132_LOG("dspio_get_response_data: 0x%08x\n", data); + if ((data & 0x00ffffff) == spec->wait_scp_header) { + spec->scp_resp_header = data; + spec->scp_resp_count = data >> 27; + count = spec->wait_num_data; + dspio_read_multiple(codec, spec->scp_resp_data, + &spec->scp_resp_count, count); + return CT_OK; + } + + return CT_FAIL; +} + +static int dspio_send_scp_message(struct hda_codec *codec, + unsigned char *send_buf, + unsigned int send_buf_size, + unsigned char *return_buf, + unsigned int return_buf_size, + unsigned int *bytes_returned) +{ + struct ca0132_spec *spec = codec->spec; + int retry; + int status = CT_FAIL; + unsigned int scp_send_size = 0; + unsigned int total_size; + bool waiting_for_resp = false; + unsigned int header; + struct scp_msg *ret_msg; + unsigned int resp_src_id, resp_target_id; + unsigned int data_size, src_id, target_id, get_flag, device_flag; + + if (bytes_returned) + *bytes_returned = 0; + + /* get scp header from buffer */ + header = *((unsigned int *)send_buf); + extract_scp_header(header, &target_id, &src_id, &get_flag, NULL, + &device_flag, NULL, NULL, &data_size); + scp_send_size = data_size + 1; + total_size = (scp_send_size * 4); + + CTASSERT(send_buf_size >= total_size); + if (send_buf_size < total_size) + return CT_FAIL; + + if (get_flag || device_flag) { + if (!return_buf || return_buf_size < 4 || !bytes_returned) { + CTASSERT(0); + return CT_FAIL; + } + spec->wait_scp_header = *((unsigned int *)send_buf); + + /* swap source id with target id */ + resp_target_id = src_id; + resp_src_id = target_id; + spec->wait_scp_header &= 0xffff0000; + spec->wait_scp_header |= (resp_src_id << 8) | (resp_target_id); + spec->wait_num_data = return_buf_size/sizeof(unsigned int) - 1; + spec->wait_scp = 1; + waiting_for_resp = true; + } + + status = dspio_write_multiple(codec, (unsigned int *)send_buf, + scp_send_size); + if (FAILED(status)) { + CTASSERT(0); + spec->wait_scp = 0; + return status; + } + + if (waiting_for_resp) { + memset(return_buf, 0, return_buf_size); + retry = 50; + do { + msleep(20); + } while (spec->wait_scp && (--retry != 0)); + waiting_for_resp = false; + if (retry != 0) { + ret_msg = (struct scp_msg *)return_buf; + memcpy(&ret_msg->hdr, &spec->scp_resp_header, 4); + memcpy(&ret_msg->data, spec->scp_resp_data, + spec->wait_num_data); + *bytes_returned = (spec->scp_resp_count + 1) * 4; + status = CT_OK; + } else { + CTASSERT(*bytes_returned == 0); + status = CT_FAIL; + } + spec->wait_scp = 0; + } + + return status; +} + +static int dspio_scp(struct hda_codec *codec, + int mod_id, int req, int dir, void *data, unsigned int len, + void *reply, unsigned int *reply_len) +{ + int status = CT_OK; + struct scp_msg scp_send, scp_reply; + unsigned int ret_bytes, send_size, ret_size; + unsigned int send_get_flag, reply_resp_flag, reply_error_flag; + unsigned int reply_data_size; + + memset(&scp_send, 0, sizeof(scp_send)); + memset(&scp_reply, 0, sizeof(scp_reply)); + + CTASSERT((len == 0 || data != NULL) && len <= SCP_MAX_DATA_WORDS); + if ((len != 0 && data == NULL) || (len > SCP_MAX_DATA_WORDS)) + return CT_FAIL; + + CTASSERT(dir != SCP_GET || reply != NULL); + if (dir == SCP_GET && reply == NULL) + return FAIL_MSG(CT_FAIL, "dspio_scp get but has no buffer"); + + CTASSERT((reply == NULL) || (reply_len != NULL && (*reply_len > 0))); + if (reply != NULL && (reply_len == NULL || (*reply_len == 0))) + return FAIL_MSG(CT_FAIL, "dspio_scp bad resp buf len parms"); + + scp_send.hdr = make_scp_header(mod_id, 0x20, (dir == SCP_GET), req, + 0, 0, 0, len/sizeof(unsigned int)); + if (data != NULL && len > 0) { + len = MIN(sizeof(scp_send.data), len); + memcpy(scp_send.data, data, len); + } + + ret_bytes = 0; + send_size = sizeof(unsigned int) + len; + status = dspio_send_scp_message(codec, (unsigned char *)&scp_send, + send_size, (unsigned char *)&scp_reply, + sizeof(scp_reply), &ret_bytes); + +/* for debugging */ +#ifdef ENABLE_CA0132_DEBUG +{ + unsigned int x, *p, i; + unsigned int source_id; + unsigned int target_id; + unsigned int req; + unsigned int get_flag; + unsigned int resp_flag; + unsigned int device_flag; + unsigned int error_flag; + unsigned int data_size; + + memcpy(&x, &scp_send.hdr, sizeof(unsigned int)); + extract_scp_header(x, &target_id, &source_id, + &get_flag, &req, &device_flag, &resp_flag, + &error_flag, &data_size); + + snd_printdd("ScpDispatch ----- REQ: " + "HDR=0x%08x " + "SID=%04x " + "TID=%04x " + "Req=%04x " + "GRDE=%d %d %d %d " + "Siz=%d [ ", + x, + source_id, + target_id, + req, + get_flag, + resp_flag, + device_flag, + error_flag, + data_size); + + for (x = 0; x < data_size; x++) + snd_printdd("0x%08x ", scp_send.data[x].ui); + + snd_printdd("]\n"); + + if (get_flag) { + if (ret_bytes >= sizeof(scp_reply.hdr)) { + memcpy(&x, &scp_reply.hdr, sizeof(unsigned int)); + extract_scp_header(x, &target_id, &source_id, + &get_flag, &req, &device_flag, &resp_flag, + &error_flag, &data_size); + + snd_printdd( + " ----- REP: " + "HDR=0x%08x " + "SID=%04x " + "TID=%04x " + "Req=%04x " + "GRDE=%d %d %d %d " + "Siz=%d [ ", + x, + source_id, + target_id, + req, + get_flag, + resp_flag, + device_flag, + error_flag, + data_size); + + for (x = 0; x < data_size; x++) + snd_printdd("0x%08x ", scp_reply.data[x].ui); + } else { + snd_printdd("REP: (too short,nbytes=%d) [", ret_bytes); + + for (p = (unsigned int *)&scp_reply, i = 0; + i < ret_bytes; p++, i++) { + snd_printdd("0x%04x ", *p); + } + } + snd_printdd("]\n"); + } +} +#endif + + if (FAILED(status)) + return FAIL_MSG(status, "dspio_scp: send scp msg failed"); + + /* extract send and reply headers members */ + extract_scp_header(scp_send.hdr, NULL, NULL, &send_get_flag, + NULL, NULL, NULL, NULL, NULL); + extract_scp_header(scp_reply.hdr, NULL, NULL, NULL, NULL, NULL, + &reply_resp_flag, &reply_error_flag, + &reply_data_size); + + if (!send_get_flag) + return CT_OK; + + if (reply_resp_flag && !reply_error_flag) { + ret_size = (ret_bytes - sizeof(scp_reply.hdr)) + / sizeof(unsigned int); + + CTASSERT(dir == SCP_GET && reply != NULL && reply_len != NULL); + + if (*reply_len < ret_size*sizeof(unsigned int)) { + status = FAIL_MSG(CT_FAIL, "reply too long for buf"); + } else if (ret_size != reply_data_size) { + status = FAIL_MSG(CT_FAIL, "RetLen and HdrLen .NE."); + } else { + *reply_len = ret_size*sizeof(unsigned int); + memcpy(reply, scp_reply.data, *reply_len); + } + } else + status = FAIL_MSG(CT_FAIL, "reply ill-formed or errflag set"); + + return status; +} + +static int dspio_set_param(struct hda_codec *codec, int mod_id, + int req, void *data, unsigned int len) +{ + return dspio_scp(codec, mod_id, req, SCP_SET, data, len, NULL, NULL); +} + +static int dspio_alloc_dma_chan(struct hda_codec *codec, unsigned int *dma_chan) +{ + int status = CT_OK; + unsigned int size = sizeof(dma_chan); + + CA0132_DSP_LOG(" dspio_alloc_dma_chan() -- begin"); + status = dspio_scp(codec, MASTERCONTROL, MASTERCONTROL_ALLOC_DMA_CHAN, + SCP_GET, NULL, 0, dma_chan, &size); + + if (FAILED(status)) { + CA0132_DSP_LOG("dspio_alloc_dma_chan: SCP Failed"); + return CT_FAIL; + } + + if ((*dma_chan + 1) == 0) { + CA0132_DSP_LOG("no free dma channels to allocate"); + return CT_FAIL; + } + + CA0132_LOG("dspio_alloc_dma_chan: chan=%d\n", *dma_chan); + CA0132_DSP_LOG(" dspio_alloc_dma_chan() -- complete"); + + return status; +} + +static int dspio_free_dma_chan(struct hda_codec *codec, unsigned int dma_chan) +{ + int status = CT_OK; + unsigned int dummy = 0; + + CA0132_DSP_LOG(" dspio_free_dma_chan() -- begin"); + CA0132_LOG("dspio_free_dma_chan: chan=%d\n", dma_chan); + + status = dspio_scp(codec, MASTERCONTROL, MASTERCONTROL_ALLOC_DMA_CHAN, + SCP_SET, &dma_chan, sizeof(dma_chan), NULL, &dummy); + + if (FAILED(status)) { + CA0132_DSP_LOG("dspio_free_dma_chan: SCP Failed"); + return CT_FAIL; + } + + CA0132_DSP_LOG(" dspio_free_dma_chan() -- complete"); + + return status; +} + +/* + * CA0132 DSP access stuffs + */ +static int dsp_set_run_state(struct hda_codec *codec) +{ + unsigned int dbg_ctrl_reg; + unsigned int halt_state; + int err; + + err = chipio_read(codec, DSP_DBGCNTL_INST_OFFSET, &dbg_ctrl_reg); + if (err < 0) + return err; + + halt_state = (dbg_ctrl_reg & DSP_DBGCNTL_STATE_MASK) >> + DSP_DBGCNTL_STATE_LOBIT; + + if (halt_state != 0) { + dbg_ctrl_reg &= ~((halt_state << DSP_DBGCNTL_SS_LOBIT) & + DSP_DBGCNTL_SS_MASK); + err = chipio_write(codec, DSP_DBGCNTL_INST_OFFSET, + dbg_ctrl_reg); + if (err < 0) + return err; + + dbg_ctrl_reg |= (halt_state << DSP_DBGCNTL_EXEC_LOBIT) & + DSP_DBGCNTL_EXEC_MASK; + err = chipio_write(codec, DSP_DBGCNTL_INST_OFFSET, + dbg_ctrl_reg); + if (err < 0) + return err; + } + + return CT_OK; +} + +static int dsp_reset(struct hda_codec *codec) +{ + unsigned int res; + int retry = 20; + + CA0132_LOG("dsp_reset\n"); + do { + res = dspio_send(codec, VENDOR_DSPIO_DSP_INIT, 0); + retry--; + } while (res == CT_FAIL && retry); + + if (!retry) { + CA0132_LOG("dsp_reset timeout\n"); + return CT_FAIL; + } + + return CT_OK; +} + +static unsigned int dsp_chip_to_dsp_addx(unsigned int chip_addx, + bool *code, bool *yram) +{ + *code = *yram = false; + + if (UC_RANGE(chip_addx, 1)) { + *code = true; + return UC_OFF(chip_addx); + } else if (X_RANGE_ALL(chip_addx, 1)) { + return X_OFF(chip_addx); + } else if (Y_RANGE_ALL(chip_addx, 1)) { + *yram = true; + return Y_OFF(chip_addx); + } + + return INVALID_CHIP_ADDRESS; +} + +static bool dsp_is_dma_active(struct hda_codec *codec, unsigned int dma_chan) +{ + unsigned int dma_chnlstart_reg; + + chipio_read(codec, DSPDMAC_CHNLSTART_INST_OFFSET, &dma_chnlstart_reg); + + return ((dma_chnlstart_reg & (1 << + (DSPDMAC_CHNLSTART_EN_LOBIT + dma_chan))) != 0); +} + +static int dsp_dma_setup_common(struct hda_codec *codec, + unsigned int chip_addx, + unsigned int dma_chan, + unsigned int port_map_mask, + bool ovly) +{ + int status = CT_OK; + unsigned int chnl_prop; + unsigned int dsp_addx; + unsigned int active; + bool code, yram; + + CA0132_DSP_LOG("-- dsp_dma_setup_common() -- Begin ---------"); + + CTASSERT(dma_chan < DSPDMAC_DMA_CFG_CHANNEL_COUNT); + if (dma_chan >= DSPDMAC_DMA_CFG_CHANNEL_COUNT) + return FAIL_MSG(CT_FAIL, "dma chan num invalid"); + + if (dsp_is_dma_active(codec, dma_chan)) + return FAIL_MSG(CT_FAIL, "dma already active"); + + dsp_addx = dsp_chip_to_dsp_addx(chip_addx, &code, &yram); + + if (dsp_addx == INVALID_CHIP_ADDRESS) + return FAIL_MSG(CT_FAIL, "invalid chip addr"); + + chnl_prop = DSPDMAC_CHNLPROP_AC_MASK; + active = 0; + + CA0132_DSP_LOG(" dsp_dma_setup_common() start reg pgm"); + + if (ovly) { + status = chipio_read(codec, DSPDMAC_CHNLPROP_INST_OFFSET, + &chnl_prop); + + if (FAILED(status)) + return FAIL_MSG(CT_FAIL, "read CHNLPROP Reg fail"); + + CA0132_DSP_LOG(" dsp_dma_setup_common() Read CHNLPROP"); + } + + if (!code) + chnl_prop &= ~(1 << (DSPDMAC_CHNLPROP_MSPCE_LOBIT + dma_chan)); + else + chnl_prop |= (1 << (DSPDMAC_CHNLPROP_MSPCE_LOBIT + dma_chan)); + + chnl_prop &= ~(1 << (DSPDMAC_CHNLPROP_DCON_LOBIT + dma_chan)); + + status = chipio_write(codec, DSPDMAC_CHNLPROP_INST_OFFSET, chnl_prop); + if (FAILED(status)) + return FAIL_MSG(CT_FAIL, "write CHNLPROP Reg fail"); + + CA0132_DSP_LOG(" dsp_dma_setup_common() Write CHNLPROP"); + + if (ovly) { + status = chipio_read(codec, DSPDMAC_ACTIVE_INST_OFFSET, + &active); + + if (FAILED(status)) + return FAIL_MSG(CT_FAIL, "read ACTIVE Reg fail"); + + CA0132_DSP_LOG(" dsp_dma_setup_common() Read ACTIVE"); + } + + active &= (~(1 << (DSPDMAC_ACTIVE_AAR_LOBIT + dma_chan))) & + DSPDMAC_ACTIVE_AAR_MASK; + + status = chipio_write(codec, DSPDMAC_ACTIVE_INST_OFFSET, active); + if (FAILED(status)) + return FAIL_MSG(CT_FAIL, "write ACTIVE Reg fail"); + + CA0132_DSP_LOG(" dsp_dma_setup_common() Write ACTIVE"); + + status = chipio_write(codec, DSPDMAC_AUDCHSEL_INST_OFFSET(dma_chan), + port_map_mask); + if (FAILED(status)) + return FAIL_MSG(CT_FAIL, "write AUDCHSEL Reg fail"); + + CA0132_DSP_LOG(" dsp_dma_setup_common() Write AUDCHSEL"); + + status = chipio_write(codec, DSPDMAC_IRQCNT_INST_OFFSET(dma_chan), + DSPDMAC_IRQCNT_BICNT_MASK | DSPDMAC_IRQCNT_CICNT_MASK); + if (FAILED(status)) + return FAIL_MSG(CT_FAIL, "write IRQCNT Reg fail"); + + CA0132_DSP_LOG(" dsp_dma_setup_common() Write IRQCNT"); + + CA0132_LOG("ChipA=0x%x,DspA=0x%x,dmaCh=%u," + "CHSEL=0x%x,CHPROP=0x%x,Active=0x%x\n", + chip_addx, dsp_addx, dma_chan, + port_map_mask, chnl_prop, active); + + CA0132_DSP_LOG("-- dsp_dma_setup_common() -- Complete ---------"); + + return CT_OK; +} + +static int dsp_dma_setup(struct hda_codec *codec, + unsigned int chip_addx, + unsigned int count, + unsigned int dma_chan) +{ + int status = CT_OK; + bool code, yram; + unsigned int dsp_addx; + unsigned int addr_field; + unsigned int incr_field; + unsigned int base_cnt; + unsigned int cur_cnt; + unsigned int dma_cfg = 0; + unsigned int adr_ofs = 0; + unsigned int xfr_cnt = 0; + const unsigned int max_dma_count = 1 << (DSPDMAC_XFRCNT_BCNT_HIBIT - + DSPDMAC_XFRCNT_BCNT_LOBIT + 1); + + CA0132_DSP_LOG("-- dsp_dma_setup() -- Begin ---------"); + + CTASSERT(count <= max_dma_count); + if (count > max_dma_count) + return FAIL_MSG(CT_FAIL, "count too big"); + + dsp_addx = dsp_chip_to_dsp_addx(chip_addx, &code, &yram); + if (dsp_addx == INVALID_CHIP_ADDRESS) + return FAIL_MSG(CT_FAIL, "invalid chip addr"); + + CA0132_DSP_LOG(" dsp_dma_setup() start reg pgm"); + + addr_field = dsp_addx << DSPDMAC_DMACFG_DBADR_LOBIT; + incr_field = 0; + + if (!code) { + addr_field <<= 1; + if (yram) + addr_field |= (1 << DSPDMAC_DMACFG_DBADR_LOBIT); + + incr_field = (1 << DSPDMAC_DMACFG_AINCR_LOBIT); + } + + CTASSERT((addr_field & DSPDMAC_DMACFG_DBADR_MASK) == addr_field); + dma_cfg = addr_field + incr_field; + status = chipio_write(codec, DSPDMAC_DMACFG_INST_OFFSET(dma_chan), + dma_cfg); + if (FAILED(status)) + return FAIL_MSG(CT_FAIL, "write DMACFG Reg fail"); + + CA0132_DSP_LOG(" dsp_dma_setup() Write DMACFG"); + + adr_ofs = (count - 1) << (DSPDMAC_DSPADROFS_BOFS_LOBIT + + (code ? 0 : 1)); + CTASSERT((adr_ofs & DSPDMAC_DSPADROFS_BOFS_MASK) == adr_ofs); + + status = chipio_write(codec, DSPDMAC_DSPADROFS_INST_OFFSET(dma_chan), + adr_ofs); + if (FAILED(status)) + return FAIL_MSG(CT_FAIL, "write DSPADROFS Reg fail"); + + CA0132_DSP_LOG(" dsp_dma_setup() Write DSPADROFS"); + + base_cnt = (count - 1) << DSPDMAC_XFRCNT_BCNT_LOBIT; + CTASSERT((base_cnt & DSPDMAC_XFRCNT_BCNT_MASK) == base_cnt); + + cur_cnt = (count - 1) << DSPDMAC_XFRCNT_CCNT_LOBIT; + CTASSERT((cur_cnt & DSPDMAC_XFRCNT_CCNT_MASK) == cur_cnt); + + xfr_cnt = base_cnt | cur_cnt; + + status = chipio_write(codec, + DSPDMAC_XFRCNT_INST_OFFSET(dma_chan), xfr_cnt); + if (FAILED(status)) + return FAIL_MSG(CT_FAIL, "write XFRCNT Reg fail"); + + CA0132_DSP_LOG(" dsp_dma_setup() Write XFRCNT"); + + CA0132_LOG("ChipA=0x%x, cnt=0x%x, DMACFG=0x%x, " + "ADROFS=0x%x, XFRCNT=0x%x\n", + chip_addx, count, dma_cfg, adr_ofs, xfr_cnt); + + CA0132_DSP_LOG("-- dsp_dma_setup() -- Complete ---------"); + + return CT_OK; +} + +static int dsp_dma_start(struct hda_codec *codec, + unsigned int dma_chan, bool ovly) +{ + unsigned int reg = 0; + int status = CT_OK; + + CA0132_DSP_LOG("-- dsp_dma_start() -- Begin ---------"); + + if (ovly) { + status = chipio_read(codec, + DSPDMAC_CHNLSTART_INST_OFFSET, ®); + + if (FAILED(status)) + return FAIL_MSG(CT_FAIL, "read CHNLSTART reg fail"); + + CA0132_DSP_LOG("-- dsp_dma_start() Read CHNLSTART"); + + reg &= ~(DSPDMAC_CHNLSTART_EN_MASK | + DSPDMAC_CHNLSTART_DIS_MASK); + } + + status = chipio_write(codec, DSPDMAC_CHNLSTART_INST_OFFSET, + reg | (1 << (dma_chan + DSPDMAC_CHNLSTART_EN_LOBIT))); + if (FAILED(status)) + return FAIL_MSG(CT_FAIL, "write CHNLSTART reg fail"); + + CA0132_DSP_LOG("-- dsp_dma_start() -- Complete ---------"); + + return status; +} + +static int dsp_dma_stop(struct hda_codec *codec, + unsigned int dma_chan, bool ovly) +{ + unsigned int reg = 0; + int status = CT_OK; + + CA0132_DSP_LOG("-- dsp_dma_stop() -- Begin ---------"); + + if (ovly) { + status = chipio_read(codec, + DSPDMAC_CHNLSTART_INST_OFFSET, ®); + + if (FAILED(status)) + return FAIL_MSG(CT_FAIL, "read CHNLSTART reg fail"); + + CA0132_DSP_LOG("-- dsp_dma_stop() Read CHNLSTART"); + reg &= ~(DSPDMAC_CHNLSTART_EN_MASK | + DSPDMAC_CHNLSTART_DIS_MASK); + } + + status = chipio_write(codec, DSPDMAC_CHNLSTART_INST_OFFSET, + reg | (1 << (dma_chan + DSPDMAC_CHNLSTART_DIS_LOBIT))); + if (FAILED(status)) + return FAIL_MSG(CT_FAIL, "write CHNLSTART reg fail"); + + CA0132_DSP_LOG("-- dsp_dma_stop() -- Complete ---------"); + + return status; +} + +static int dsp_allocate_router_ports(struct hda_codec *codec, + unsigned int num_chans, + unsigned int ports_per_channel, + unsigned int start_device, + unsigned int *port_map) +{ + int status = CT_OK; + int res; + u8 val; + + status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); + if (FAILED(status)) + return status; + + val = start_device << 6; + val |= (ports_per_channel - 1) << 4; + val |= num_chans - 1; + + snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, + VENDOR_CHIPIO_PORT_ALLOC_CONFIG_SET, + val); + + snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, + VENDOR_CHIPIO_PORT_ALLOC_SET, + MEM_CONNID_DSP); + + status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); + if (FAILED(status)) + return status; + + res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0, + VENDOR_CHIPIO_PORT_ALLOC_GET, 0); + + *port_map = res; + + return (res < 0) ? CT_FAIL : CT_OK; +} + +static int dsp_free_router_ports(struct hda_codec *codec) +{ + int status = CT_OK; + + status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); + if (FAILED(status)) + return status; + + snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, + VENDOR_CHIPIO_PORT_FREE_SET, + MEM_CONNID_DSP); + + status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0); + + return status; +} + +static int dsp_allocate_ports(struct hda_codec *codec, + unsigned int num_chans, + unsigned int rate_multi, unsigned int *port_map) +{ + int status = CT_FAIL; + + CA0132_DSP_LOG(" dsp_allocate_ports() -- begin"); + + if ((rate_multi != 1) && (rate_multi != 2) && (rate_multi != 4)) + return FAIL_MSG(status, "bad rate multiple"); + + status = dsp_allocate_router_ports(codec, num_chans, + rate_multi, 0, port_map); + + CA0132_DSP_LOG(" dsp_allocate_ports() -- complete"); + + return status; +} + +static int dsp_free_ports(struct hda_codec *codec) +{ + int status; + + CA0132_DSP_LOG(" dsp_free_ports() -- begin"); + + status = dsp_free_router_ports(codec); + if (FAILED(status)) + return FAIL_MSG(CT_FAIL, "free router ports fail"); + + CA0132_DSP_LOG(" dsp_free_ports() -- complete"); + + return status; +} + +static int dsp_allocate_ports_format(struct hda_codec *codec, + const unsigned short fmt, + unsigned int *port_map) +{ + int status = CT_FAIL; + unsigned int num_chans; + + unsigned int sample_rate_div = ((get_hdafmt_rate(fmt) >> 0) & 3) + 1; + unsigned int sample_rate_mul = ((get_hdafmt_rate(fmt) >> 3) & 3) + 1; + unsigned int rate_multi = sample_rate_mul / sample_rate_div; + + if ((rate_multi != 1) && (rate_multi != 2) && (rate_multi != 4)) + return FAIL_MSG(CT_FAIL, "bad rate multiple"); + + num_chans = get_hdafmt_chs(fmt) + 1; + + status = dsp_allocate_ports(codec, num_chans, rate_multi, port_map); + + return status; +} + +/* + * HDA DMA engine stuffs for DSP code download + */ +struct dma_engine { + struct hda_codec *codec; + unsigned short m_converter_format; + void *m_buffer_addr; + unsigned int m_buffer_size; + unsigned int m_req_size; + struct snd_pcm_substream *substream; +}; + +enum dma_state { + DMA_STATE_RESET = 0, + DMA_STATE_STOP = 1, + DMA_STATE_RUN = 2 +}; + +#define azx_pcm_open(a) (a->ops->open(a)) +#define azx_pcm_close(a) (a->ops->close(a)) +#define azx_pcm_prepare(a) (a->ops->prepare(a)) +#define azx_pcm_trigger(a, b) (a->ops->trigger(a, b)) +#define azx_pcm_hw_free(a) (a->ops->hw_free(a)) + +static int dma_convert_to_hda_format( + struct hda_stream_format *stream_format, + unsigned short *hda_format) +{ + unsigned int format_val; + + format_val = snd_hda_calc_stream_format( + stream_format->sample_rate, + stream_format->number_channels, + SNDRV_PCM_FORMAT_S32_LE, + stream_format->container_size, 0); + + if (hda_format) + *hda_format = (unsigned short)format_val; + + return CT_OK; +} + +static int dma_init( + struct hda_codec *codec, + struct dma_engine **pp_dma, + struct hda_stream_format *stream_format, + unsigned short *format, + unsigned int req_size) +{ + struct dma_engine *dma; + struct snd_pcm_substream *substream; + struct snd_pcm *pcm; + struct snd_pcm_runtime *runtime; + unsigned int bits; + snd_pcm_uframes_t frames; + + *pp_dma = NULL; + dma = kzalloc(sizeof(*dma), GFP_KERNEL); + memset((void *)dma, 0, sizeof(*dma)); + + dma_convert_to_hda_format(stream_format, format); + dma->m_converter_format = *format; + + dma->substream = NULL; + pcm = codec->pcm_info->pcm; + for (substream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream; + substream; substream = substream->next) { + if (codec->pcm_info->pcm_type == HDA_PCM_TYPE_SPDIF) + continue; + + if (!SUBSTREAM_BUSY(substream)) { + dma->substream = substream; + break; + } + } + + if (NULL == dma->substream) { + kfree(dma); + return CT_FAIL; + } + + runtime = kzalloc(sizeof(*runtime), GFP_KERNEL); + memset((void *)runtime, 0, sizeof(*runtime)); + dma->substream->runtime = runtime; + dma->substream->private_data = pcm->private_data; + + azx_pcm_open(dma->substream); + req_size = req_size * 2; + snd_pcm_lib_malloc_pages(dma->substream, req_size); + + runtime->rate = stream_format->sample_rate; + runtime->channels = stream_format->number_channels; + runtime->format = SNDRV_PCM_FORMAT_S32_LE; + runtime->no_period_wakeup = 1; + + bits = snd_pcm_format_physical_width(runtime->format); + runtime->sample_bits = bits; + bits *= runtime->channels; + runtime->frame_bits = bits; + frames = 1; + while (bits % 8 != 0) { + bits *= 2; + frames *= 2; + } + runtime->byte_align = bits / 8; + runtime->min_align = frames; + runtime->buffer_size = bytes_to_frames(runtime, req_size); + runtime->period_size = runtime->buffer_size; + dma->m_req_size = req_size; + dma->codec = codec; + + *pp_dma = dma; + CA0132_LOG("dma_init: succeeded.\n"); + return CT_OK; +} + +static int dma_prepare(struct dma_engine *dma) +{ + struct snd_pcm_runtime *runtime; + int err; + + CA0132_LOG("dma_prepare: begin\n"); + runtime = dma->substream->runtime; + + err = azx_pcm_prepare(dma->substream); + if (err < 0) + return CT_FAIL; + + dma->m_buffer_size = snd_pcm_lib_buffer_bytes(dma->substream); + dma->m_buffer_addr = runtime->dma_area; + + return CT_OK; +} + +static int dma_reset(struct dma_engine *dma) +{ + struct snd_pcm_runtime *runtime = dma->substream->runtime; + + CA0132_LOG("dma_reset: begin\n"); + azx_pcm_hw_free(dma->substream); + snd_pcm_lib_malloc_pages(dma->substream, dma->m_req_size); + + azx_pcm_prepare(dma->substream); + dma->m_buffer_size = snd_pcm_lib_buffer_bytes(dma->substream); + dma->m_buffer_addr = runtime->dma_area; + + return CT_OK; +} + +static int dma_set_state(struct dma_engine *dma, enum dma_state state) +{ + int cmd; + + CA0132_LOG("dma_set_state state=%d\n", state); + + switch (state) { + case DMA_STATE_RESET: + dma_reset(dma); + return CT_OK; + case DMA_STATE_STOP: + cmd = SNDRV_PCM_TRIGGER_STOP; + break; + case DMA_STATE_RUN: + cmd = SNDRV_PCM_TRIGGER_START; + break; + default: + return CT_OK; + } + + azx_pcm_trigger(dma->substream, cmd); + + return CT_OK; +} + +static unsigned int dma_get_buffer_size(struct dma_engine *dma) +{ + return dma->m_buffer_size; +} + +static unsigned int *dma_get_buffer_addr(struct dma_engine *dma) +{ + return dma->m_buffer_addr; +} + +static int dma_free_buffer(struct dma_engine *dma) +{ + azx_pcm_hw_free(dma->substream); + azx_pcm_close(dma->substream); + kfree(dma->substream->runtime); + dma->substream->runtime = NULL; + return CT_OK; +} + +static int dma_xfer(struct dma_engine *dma, + const unsigned int *data, + unsigned int count) +{ + memcpy(dma->m_buffer_addr, data, count); + return CT_OK; +} + +static void dma_get_converter_format( + struct dma_engine *dma, + unsigned short *format) +{ + if (format) + *format = dma->m_converter_format; +} + +static unsigned int dma_get_stream_id(struct dma_engine *dma) +{ + struct ca0132_spec *spec = dma->codec->spec; + + return spec->dsp_stream_id; +} + +static int dma_exit(struct dma_engine *dma) +{ + CA0132_LOG("dma_exit\n"); + kfree(dma); + return 0; +} + +/* + * CA0132 chip DSP image segment stuffs + */ +struct dsp_image_seg { + u32 magic; + u32 chip_addr; + u32 count; + u32 data[0]; +}; + +static const u32 g_magic_value = 0x4c46584d; +static const u32 g_chip_addr_magic_value = 0xFFFFFF01; + +static bool is_valid(const struct dsp_image_seg *p) +{ + return p->magic == g_magic_value; +} + +static bool is_hci_prog_list_seg(const struct dsp_image_seg *p) +{ + return g_chip_addr_magic_value == p->chip_addr; +} + +static bool is_last(const struct dsp_image_seg *p) +{ + return p->count == 0; +} + +static size_t dsp_sizeof(const struct dsp_image_seg *p) +{ + return sizeof(*p) + p->count*sizeof(u32); +} + +static const struct dsp_image_seg *get_next_seg_ptr( + const struct dsp_image_seg *p) +{ + return (struct dsp_image_seg *)((unsigned char *)(p) + dsp_sizeof(p)); +} + +/* + * CA0132 chip DSP trannsfer stuffs. For DSP download. + */ +#define INVALID_DMA_CHANNEL (~0UL) + +static int dspxfr_hci_write(struct hda_codec *codec, + const struct dsp_image_seg *fls) +{ + int status = CT_OK; + const u32 *data; + unsigned int count; + + CTASSERT(fls != NULL && fls->chip_addr == g_chip_addr_magic_value); + if (fls == NULL || fls->chip_addr != g_chip_addr_magic_value) + return FAIL_MSG(CT_FAIL, "hci_write invalid params"); + + count = fls->count; + data = (u32 *)(fls->data); + while (SUCCEEDED(status) && count >= 2) { + status = chipio_write(codec, data[0], data[1]); + if (FAILED(status)) + status = FAIL_MSG(status, "hci_write chipio failed"); + count -= 2; + data += 2; + } + return status; +} + +static int dspxfr_one_seg(struct hda_codec *codec, + const struct dsp_image_seg *fls, + unsigned int reloc, + struct dma_engine *dma_engine, + unsigned int dma_chan, + unsigned int port_map_mask, + bool ovly) +{ + int status = CT_OK; + bool comm_dma_setup_done = false; + const unsigned int *data; + unsigned int chip_addx; + unsigned int words_to_write; + unsigned int buffer_size_words; + unsigned int *buffer_addx; + unsigned short hda_format; + unsigned int sample_rate_div; + unsigned int sample_rate_mul; + unsigned int num_chans; + unsigned int hda_frame_size_words; + unsigned int remainder_words; + const u32 *data_remainder; + u32 chip_addx_remainder; + unsigned int run_size_words; + const struct dsp_image_seg *hci_write = NULL; + int retry; + + CTASSERT(fls != NULL); + if (fls == NULL) + return CT_FAIL; + if (is_hci_prog_list_seg(fls)) { + hci_write = fls; + fls = get_next_seg_ptr(fls); + } + + if (hci_write && (!fls || is_last(fls))) { + CA0132_LOG("hci_write\n"); + return dspxfr_hci_write(codec, hci_write); + } + + if (fls == NULL || dma_engine == NULL || port_map_mask == 0) { + CA0132_LOG("Invalid Params\n"); + return CT_FAIL; + } + + data = fls->data; + chip_addx = fls->chip_addr, + words_to_write = fls->count; + + if (!words_to_write) + return hci_write ? dspxfr_hci_write(codec, hci_write) : CT_OK; + if (reloc) + chip_addx = (chip_addx & (0xFFFF0000 << 2)) + (reloc << 2); + + if (!UC_RANGE(chip_addx, words_to_write) && + !X_RANGE_ALL(chip_addx, words_to_write) && + !Y_RANGE_ALL(chip_addx, words_to_write)) { + CA0132_LOG("Invalid chip_addx Params\n"); + return CT_FAIL; + } + + buffer_size_words = (unsigned int)dma_get_buffer_size(dma_engine) / + sizeof(u32); + + buffer_addx = dma_get_buffer_addr(dma_engine); + + if (buffer_addx == NULL) + status = FAIL_MSG(CT_FAIL, "dma_engine buffer NULL"); + + dma_get_converter_format(dma_engine, &hda_format); + sample_rate_div = ((get_hdafmt_rate(hda_format) >> 0) & 3) + 1; + sample_rate_mul = ((get_hdafmt_rate(hda_format) >> 3) & 3) + 1; + num_chans = get_hdafmt_chs(hda_format) + 1; + + hda_frame_size_words = ((sample_rate_div == 0) ? 0 : + (num_chans * sample_rate_mul / sample_rate_div)); + + buffer_size_words = MIN(buffer_size_words, UC_RANGE(chip_addx, 1) ? + 65536UL : 32768UL); + buffer_size_words -= buffer_size_words % hda_frame_size_words; + CA0132_LOG("chpadr=0x%08x frmsz=%u nchan=%u " + "rate_mul=%u div=%u bufsz=%u\n", + chip_addx, hda_frame_size_words, num_chans, + sample_rate_mul, sample_rate_div, buffer_size_words); + + CTASSERT(SUCCEEDED(status)); + CTASSERT(buffer_addx != NULL); + CTASSERT(buffer_size_words >= hda_frame_size_words); + CTASSERT(hda_frame_size_words > 0); + + if ((buffer_addx == NULL) || (hda_frame_size_words == 0) || + (buffer_size_words < hda_frame_size_words)) { + status = FAIL_MSG(CT_FAIL, "dspxfr_one_seg:failed"); + } + + if (FAILED(status)) + return status; + + remainder_words = words_to_write % hda_frame_size_words; + data_remainder = data; + chip_addx_remainder = chip_addx; + + data += remainder_words; + chip_addx += remainder_words*sizeof(u32); + words_to_write -= remainder_words; + + while ((words_to_write != 0) && SUCCEEDED(status)) { + run_size_words = MIN(buffer_size_words, words_to_write); + CA0132_LOG("dspxfr (seg loop)cnt=%u rs=%u remainder=%u\n", + words_to_write, run_size_words, remainder_words); + dma_set_state(dma_engine, DMA_STATE_STOP); + dma_xfer(dma_engine, data, run_size_words*sizeof(u32)); + if (!comm_dma_setup_done && SUCCEEDED(status)) { + status = dsp_dma_stop(codec, dma_chan, ovly); + if (SUCCEEDED(status)) + status = dsp_dma_setup_common(codec, chip_addx, + dma_chan, port_map_mask, ovly); + comm_dma_setup_done = true; + } + + if (SUCCEEDED(status)) + status = dsp_dma_setup(codec, chip_addx, + run_size_words, dma_chan); + if (SUCCEEDED(status)) + status = dsp_dma_start(codec, dma_chan, ovly); + if (SUCCEEDED(status) && !dsp_is_dma_active(codec, dma_chan)) + status = FAIL_MSG(CT_FAIL, "dspxfr:DMA did not start"); + if (SUCCEEDED(status)) + status = dma_set_state(dma_engine, DMA_STATE_RUN); + if (SUCCEEDED(status)) { + if (remainder_words != 0) { + status = chipio_write_multiple(codec, + chip_addx_remainder, + data_remainder, + remainder_words); + remainder_words = 0; + } + if (hci_write) { + status = dspxfr_hci_write(codec, hci_write); + hci_write = NULL; + } + retry = 5000; + while (dsp_is_dma_active(codec, dma_chan)) { + if (--retry <= 0) + break; + } + CA0132_DSP_LOG("+++++ DMA complete"); + dma_set_state(dma_engine, DMA_STATE_STOP); + dma_set_state(dma_engine, DMA_STATE_RESET); + } + + CTASSERT(run_size_words <= words_to_write); + data += run_size_words; + chip_addx += run_size_words*sizeof(u32); + words_to_write -= run_size_words; + } + + if (SUCCEEDED(status) && (remainder_words != 0)) { + status = chipio_write_multiple(codec, chip_addx_remainder, + data_remainder, remainder_words); + } + + return status; +} + +static int dspxfr_image(struct hda_codec *codec, + const struct dsp_image_seg *fls_data, + unsigned int reloc, struct hda_stream_format *format, + bool ovly) +{ + int status = CT_OK; + unsigned short hda_format = 0; + unsigned int response; + unsigned char stream_id = 0; + struct dma_engine *dma_engine; + unsigned int dma_chan; + unsigned int port_map_mask; + unsigned int buf_size; + + CTASSERT(fls_data != NULL); + if (fls_data == NULL) + return CT_FAIL; + + buf_size = ovly ? DSP_DMA_WRITE_BUFLEN_OVLY : DSP_DMA_WRITE_BUFLEN_INIT; + status = dma_init(codec, &dma_engine, format, &hda_format, buf_size); + + if (FAILED(status)) + return CT_FAIL; + + dma_chan = 0; + do { + status = codec_set_converter_format(codec, WIDGET_CHIP_CTRL, + hda_format, &response); + if (FAILED(status)) { + status = FAIL_MSG(status, "set converter format fail"); + break; + } + + status = dma_prepare(dma_engine); + if (FAILED(status)) + break; + + if (ovly) { + status = dspio_alloc_dma_chan(codec, &dma_chan); + if (FAILED(status)) { + status = FAIL_MSG(status, "alloc dmachan fail"); + dma_chan = INVALID_DMA_CHANNEL; + break; + } + } + + port_map_mask = 0; + status = dsp_allocate_ports_format(codec, hda_format, + &port_map_mask); + if (FAILED(status)) { + status = FAIL_MSG(status, "alloc parts fail"); + break; + } + + stream_id = dma_get_stream_id(dma_engine); + status = codec_set_converter_stream_channel(codec, + WIDGET_CHIP_CTRL, stream_id, 0, &response); + if (FAILED(status)) { + status = FAIL_MSG(status, "set stream chan fail"); + break; + } + + while (SUCCEEDED(status) && (fls_data != NULL) && + !is_last(fls_data)) { + if (!is_valid(fls_data)) { + status = FAIL_MSG(CT_FAIL, "FLS check fail"); + break; + } + status = dspxfr_one_seg(codec, fls_data, reloc, + dma_engine, dma_chan, + port_map_mask, ovly); + if (is_hci_prog_list_seg(fls_data)) + fls_data = get_next_seg_ptr(fls_data); + + CTASSERT(fls_data != NULL); + if ((fls_data != NULL) && !is_last(fls_data)) + fls_data = get_next_seg_ptr(fls_data); + + CTASSERT(fls_data != NULL); + } + + if (port_map_mask != 0) + status = dsp_free_ports(codec); + + if (FAILED(status)) + break; + + status = codec_set_converter_stream_channel(codec, + WIDGET_CHIP_CTRL, 0, 0, &response); + } while (0); + + if (ovly && (dma_chan != INVALID_DMA_CHANNEL)) + status = dspio_free_dma_chan(codec, dma_chan); + + status = dma_set_state(dma_engine, DMA_STATE_RESET); + if (FAILED(status)) + status = FAIL_MSG(status, "dma set state Reset fail"); + + status = dma_free_buffer(dma_engine); + if (FAILED(status)) + status = FAIL_MSG(status, "dma free buffer fail"); + + dma_exit(dma_engine); + + return status; +} + +/* + * CA0132 DSP download stuffs. + */ +static void dspload_post_setup(struct hda_codec *codec) +{ + CA0132_DSP_LOG("---- dspload_post_setup ------"); + + /*set DSP speaker to 2.0 configuration*/ + chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x18), 0x08080080); + chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x19), 0x3f800000); + + /*update write pointer*/ + chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x29), 0x00000002); +} + +static int dspload_image(struct hda_codec *codec, + const struct dsp_image_seg *fls, + bool ovly, + unsigned int reloc, + bool autostart, + int router_chans) +{ + int status = CT_OK; + struct hda_stream_format stream_format; + + CA0132_DSP_LOG("---- dspload_image begin ------"); + if (router_chans == 0) { + if (!ovly) + router_chans = DMA_TRANSFER_FRAME_SIZE_NWORDS; + else + router_chans = DMA_OVERLAY_FRAME_SIZE_NWORDS; + } + + stream_format.sample_rate = 48000; + stream_format.number_channels = (unsigned short)router_chans; + + while (stream_format.number_channels > 16) { + stream_format.sample_rate *= 2; + stream_format.number_channels /= 2; + } + + stream_format.container_size = 32; + stream_format.valid_bits_per_sample = 32; + + do { + CA0132_DSP_LOG("Ready to program DMA"); + if (!ovly) + status = dsp_reset(codec); + + if (FAILED(status)) + break; + + CA0132_DSP_LOG("dsp_reset() complete"); + status = dspxfr_image(codec, fls, reloc, &stream_format, ovly); + + if (FAILED(status)) + break; + + CA0132_DSP_LOG("dspxfr_image() complete"); + if (autostart && !ovly) { + dspload_post_setup(codec); + status = dsp_set_run_state(codec); + } + + CA0132_DSP_LOG("LOAD FINISHED"); + } while (0); + + return status; +} + +static int dspload_get_speakereq_addx(struct hda_codec *codec, + unsigned int *x, + unsigned int *y) +{ + int status = CT_OK; + struct { unsigned short x, y; } speakereq_info; + unsigned int size = sizeof(speakereq_info); + + CA0132_DSP_LOG("dspload_get_speakereq_addx() -- begin"); + status = dspio_scp(codec, MASTERCONTROL, + MASTERCONTROL_QUERY_SPEAKER_EQ_ADDRESS, + SCP_GET, NULL, 0, &speakereq_info, &size); + + if (FAILED(status)) { + CA0132_DSP_LOG("dspload_get_speakereq_addx: SCP Failed"); + return CT_FAIL; + } + + *x = speakereq_info.x; + *y = speakereq_info.y; + CA0132_LOG("dspload_get_speakereq_addx: X=0x%x Y=0x%x\n", *x, *y); + + CA0132_DSP_LOG("dspload_get_speakereq_addx() -- complete"); + + return status; +} + +static int dspload_speakereq(struct hda_codec *codec) +{ + int status = CT_OK; + const struct dsp_image_seg *image_x, *image_y; + unsigned int x, y; + + CA0132_DSP_LOG("dspload_speakereq() -- begin"); + + image_x = (struct dsp_image_seg *)Speaker_EQ_X; + image_y = (struct dsp_image_seg *)Speaker_EQ_Y; + + status = dspload_get_speakereq_addx(codec, &x, &y); + if (FAILED(status)) + return CT_FAIL; + + status = dspload_image(codec, image_x, 1, x, 0, 8); + if (FAILED(status)) + return CT_FAIL; + + status = dspload_image(codec, image_y, 1, y, 0, 8); + if (FAILED(status)) + return CT_FAIL; + + CA0132_DSP_LOG("dspload_speakereq() -- complete"); + + return status; +} + +static bool dspload_is_loaded(struct hda_codec *codec) +{ + unsigned int data = 0; + int status = CT_OK; + + status = chipio_read(codec, 0x40004, &data); + if (FAILED(status) || (data != 1)) + return false; + + return true; +} + +static bool dspload_wait_loaded(struct hda_codec *codec) +{ + int retry = 100; + + do { + msleep(20); + if (dspload_is_loaded(codec)) { + printk(KERN_INFO "DOWNLOAD OK :-) DSP IS RUNNING.\n"); + return true; + } + } while (--retry); + + printk(KERN_ERR "DOWNLOAD FAILED!!! DSP IS NOT RUNNING.\n"); + return false; +} + +/* + * PCM stuffs. + */ +static void ca0132_setup_stream(struct hda_codec *codec, hda_nid_t nid, + u32 stream_tag, + int channel_id, int format) +{ + unsigned int oldval, newval; + + if (!nid) + return; + + CA0132_LOG("ca0132_setup_stream: " + "NID=0x%x, stream=0x%x, channel=%d, format=0x%x\n", + nid, stream_tag, channel_id, format); + + /* update the format-id if changed */ + oldval = snd_hda_codec_read(codec, nid, 0, + AC_VERB_GET_STREAM_FORMAT, 0); + if (oldval != format) { + msleep(20); + snd_hda_codec_write(codec, nid, 0, + AC_VERB_SET_STREAM_FORMAT, + format); + } + + oldval = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_CONV, 0); + newval = (stream_tag << 4) | channel_id; + if (oldval != newval) { + snd_hda_codec_write(codec, nid, 0, + AC_VERB_SET_CHANNEL_STREAMID, + newval); + } +} + +static void ca0132_cleanup_stream(struct hda_codec *codec, hda_nid_t nid) +{ + unsigned int val; + + if (!nid) + return; + + CA0132_LOG("ca0132_cleanup_stream: NID=0x%x\n", nid); + + val = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_CONV, 0); + if (!val) + return; + + snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_STREAM_FORMAT, 0); + snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_CHANNEL_STREAMID, 0); +} + +/* + * PCM playbacks + */ + +static int ca0132_playback_pcm_prepare(struct hda_pcm_stream *hinfo, + struct hda_codec *codec, + unsigned int stream_tag, + unsigned int format, + struct snd_pcm_substream *substream) +{ + struct ca0132_spec *spec = codec->spec; + + if (spec->dsp_state == DSP_DOWNLOADING) { + spec->dsp_stream_id = stream_tag; + return 0; + } + + ca0132_setup_stream(codec, spec->dacs[0], stream_tag, 0, format); + return 0; +} + +static int ca0132_playback_pcm_cleanup(struct hda_pcm_stream *hinfo, + struct hda_codec *codec, + struct snd_pcm_substream *substream) +{ + struct ca0132_spec *spec = codec->spec; + + if (spec->dsp_state == DSP_DOWNLOADING) + return 0; + + ca0132_cleanup_stream(codec, spec->dacs[0]); + return 0; +} + +/* + * PCM capture + */ + +static int ca0132_capture_pcm_prepare(struct hda_pcm_stream *hinfo, + struct hda_codec *codec, + unsigned int stream_tag, + unsigned int format, + struct snd_pcm_substream *substream) +{ + struct ca0132_spec *spec = codec->spec; + + if (spec->dsp_state == DSP_DOWNLOADING) + return 0; + + ca0132_setup_stream(codec, hinfo->nid, stream_tag, 0, format); + return 0; +} + +static int ca0132_capture_pcm_cleanup(struct hda_pcm_stream *hinfo, + struct hda_codec *codec, + struct snd_pcm_substream *substream) +{ + struct ca0132_spec *spec = codec->spec; + + if (spec->dsp_state == DSP_DOWNLOADING) + return 0; + + ca0132_cleanup_stream(codec, hinfo->nid); + return 0; +} + + +/* + * Controls stuffs. + */ + +/* + * Mixer controls helpers. + */ +#define CA0132_CODEC_VOL_MONO(xname, nid, channel, dir) \ + { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ + .name = xname, \ + .subdevice = HDA_SUBDEV_AMP_FLAG, \ + .access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \ + SNDRV_CTL_ELEM_ACCESS_TLV_READ | \ + SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \ + .info = ca0132_volume_info, \ + .get = ca0132_volume_get, \ + .put = ca0132_volume_put, \ + .tlv = { .c = ca0132_volume_tlv }, \ + .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) } + +#define CA0132_CODEC_MUTE_MONO(xname, nid, channel, dir) \ + { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \ + .name = xname, \ + .subdevice = HDA_SUBDEV_AMP_FLAG, \ + .info = snd_hda_mixer_amp_switch_info, \ + .get = ca0132_switch_get, \ + .put = ca0132_switch_put, \ + .private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) } + +/* stereo */ +#define CA0132_CODEC_VOL(xname, nid, dir) \ + CA0132_CODEC_VOL_MONO(xname, nid, 3, dir) +#define CA0132_CODEC_MUTE(xname, nid, dir) \ + CA0132_CODEC_MUTE_MONO(xname, nid, 3, dir) + + +/* The followings are for tuning of products */ +#ifdef ENABLE_TUNING_CONTROLS + +static float voice_focus_vals_lookup[] = { +20.00, 21.00, 22.00, 23.00, 24.00, 25.00, 26.00, 27.00, 28.00, 29.00, +30.00, 31.00, 32.00, 33.00, 34.00, 35.00, 36.00, 37.00, 38.00, 39.00, +40.00, 41.00, 42.00, 43.00, 44.00, 45.00, 46.00, 47.00, 48.00, 49.00, +50.00, 51.00, 52.00, 53.00, 54.00, 55.00, 56.00, 57.00, 58.00, 59.00, +60.00, 61.00, 62.00, 63.00, 64.00, 65.00, 66.00, 67.00, 68.00, 69.00, +70.00, 71.00, 72.00, 73.00, 74.00, 75.00, 76.00, 77.00, 78.00, 79.00, +80.00, 81.00, 82.00, 83.00, 84.00, 85.00, 86.00, 87.00, 88.00, 89.00, +90.00, 91.00, 92.00, 93.00, 94.00, 95.00, 96.00, 97.00, 98.00, 99.00, +100.00, 101.00, 102.00, 103.00, 104.00, 105.00, 106.00, 107.00, 108.00, 109.00, +110.00, 111.00, 112.00, 113.00, 114.00, 115.00, 116.00, 117.00, 118.00, 119.00, +120.00, 121.00, 122.00, 123.00, 124.00, 125.00, 126.00, 127.00, 128.00, 129.00, +130.00, 131.00, 132.00, 133.00, 134.00, 135.00, 136.00, 137.00, 138.00, 139.00, +140.00, 141.00, 142.00, 143.00, 144.00, 145.00, 146.00, 147.00, 148.00, 149.00, +150.00, 151.00, 152.00, 153.00, 154.00, 155.00, 156.00, 157.00, 158.00, 159.00, +160.00, 161.00, 162.00, 163.00, 164.00, 165.00, 166.00, 167.00, 168.00, 169.00, +170.00, 171.00, 172.00, 173.00, 174.00, 175.00, 176.00, 177.00, 178.00, 179.00, +180.00 +}; + +static float mic_svm_vals_lookup[] = { +0.00, 0.01, 0.02, 0.03, 0.04, 0.05, 0.06, 0.07, 0.08, 0.09, +0.10, 0.11, 0.12, 0.13, 0.14, 0.15, 0.16, 0.17, 0.18, 0.19, +0.20, 0.21, 0.22, 0.23, 0.24, 0.25, 0.26, 0.27, 0.28, 0.29, +0.30, 0.31, 0.32, 0.33, 0.34, 0.35, 0.36, 0.37, 0.38, 0.39, +0.40, 0.41, 0.42, 0.43, 0.44, 0.45, 0.46, 0.47, 0.48, 0.49, +0.50, 0.51, 0.52, 0.53, 0.54, 0.55, 0.56, 0.57, 0.58, 0.59, +0.60, 0.61, 0.62, 0.63, 0.64, 0.65, 0.66, 0.67, 0.68, 0.69, +0.70, 0.71, 0.72, 0.73, 0.74, 0.75, 0.76, 0.77, 0.78, 0.79, +0.80, 0.81, 0.82, 0.83, 0.84, 0.85, 0.86, 0.87, 0.88, 0.89, +0.90, 0.91, 0.92, 0.93, 0.94, 0.95, 0.96, 0.97, 0.98, 0.99, +1.00 +}; + +static float equalizer_vals_lookup[] = { +-24.00, -23.00, -22.00, -21.00, -20.00, +-19.00, -18.00, -17.00, -16.00, -15.00, -14.00, -13.00, -12.00, -11.00, -10.00, +-9.00, -8.00, -7.00, -6.00, -5.00, -4.00, -3.00, -2.00, -1.00, 00.00, +1.00, 2.00, 3.00, 4.00, 5.00, 6.00, 7.00, 8.00, 9.00, 10.00, +11.00, 12.00, 13.00, 14.00, 15.00, 16.00, 17.00, 18.00, 19.00, 20.00, +21.00, 22.00, 23.00, 24.00 +}; + +static int tuning_ctl_set(struct hda_codec *codec, hda_nid_t nid, + float *lookup, int idx) +{ + int i = 0; + + for (i = 0; i < TUNING_CTLS_COUNT; i++) + if (nid == ca0132_tuning_ctls[i].nid) + break; + + snd_hda_power_up(codec); + dspio_set_param(codec, ca0132_tuning_ctls[i].mid, + ca0132_tuning_ctls[i].req, + &(lookup[idx]), sizeof(float)); + snd_hda_power_down(codec); + + return 1; +} + +static int tuning_ctl_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct hda_codec *codec = snd_kcontrol_chip(kcontrol); + struct ca0132_spec *spec = codec->spec; + hda_nid_t nid = get_amp_nid(kcontrol); + long *valp = ucontrol->value.integer.value; + int idx = nid - TUNING_CTL_START_NID; + + *valp = spec->cur_ctl_vals[idx]; + return 0; +} + +static int voice_focus_ctl_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + int chs = get_amp_channels(kcontrol); + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->count = chs == 3 ? 2 : 1; + uinfo->value.integer.min = 20; + uinfo->value.integer.max = 180; + uinfo->value.integer.step = 1; + + return 0; +} + +static int voice_focus_ctl_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct hda_codec *codec = snd_kcontrol_chip(kcontrol); + struct ca0132_spec *spec = codec->spec; + hda_nid_t nid = get_amp_nid(kcontrol); + long *valp = ucontrol->value.integer.value; + int idx; + + idx = nid - TUNING_CTL_START_NID; + /* any change? */ + if (spec->cur_ctl_vals[idx] == *valp) + return 0; + + spec->cur_ctl_vals[idx] = *valp; + + idx = *valp - 20; + tuning_ctl_set(codec, nid, voice_focus_vals_lookup, idx); + + return 1; +} + +static int mic_svm_ctl_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + int chs = get_amp_channels(kcontrol); + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->count = chs == 3 ? 2 : 1; + uinfo->value.integer.min = 0; + uinfo->value.integer.max = 100; + uinfo->value.integer.step = 1; + + return 0; +} + +static int mic_svm_ctl_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct hda_codec *codec = snd_kcontrol_chip(kcontrol); + struct ca0132_spec *spec = codec->spec; + hda_nid_t nid = get_amp_nid(kcontrol); + long *valp = ucontrol->value.integer.value; + int idx; + + idx = nid - TUNING_CTL_START_NID; + /* any change? */ + if (spec->cur_ctl_vals[idx] == *valp) + return 0; + + spec->cur_ctl_vals[idx] = *valp; + + idx = *valp; + tuning_ctl_set(codec, nid, mic_svm_vals_lookup, idx); + + return 0; +} + +static int equalizer_ctl_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + int chs = get_amp_channels(kcontrol); + uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER; + uinfo->count = chs == 3 ? 2 : 1; + uinfo->value.integer.min = 0; + uinfo->value.integer.max = 48; + uinfo->value.integer.step = 1; + + return 0; +} + +static int equalizer_ctl_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct hda_codec *codec = snd_kcontrol_chip(kcontrol); + struct ca0132_spec *spec = codec->spec; + hda_nid_t nid = get_amp_nid(kcontrol); + long *valp = ucontrol->value.integer.value; + int idx; + + idx = nid - TUNING_CTL_START_NID; + /* any change? */ + if (spec->cur_ctl_vals[idx] == *valp) + return 0; + + spec->cur_ctl_vals[idx] = *valp; + + idx = *valp; + tuning_ctl_set(codec, nid, equalizer_vals_lookup, idx); + + return 1; +} + +DECLARE_TLV_DB_SCALE(voice_focus_db_scale, 2000, 100, 0); +DECLARE_TLV_DB_SCALE(eq_db_scale, -2400, 100, 0); + +static int add_tuning_control(struct hda_codec *codec, + hda_nid_t pnid, hda_nid_t nid, + const char *name, int dir) +{ + char namestr[44]; + int type = dir ? HDA_INPUT : HDA_OUTPUT; + struct snd_kcontrol_new knew = + HDA_CODEC_VOLUME_MONO(namestr, nid, 1, 0, type); + + knew.access = SNDRV_CTL_ELEM_ACCESS_READWRITE | + SNDRV_CTL_ELEM_ACCESS_TLV_READ; + knew.tlv.c = 0; + knew.tlv.p = 0; + switch (pnid) { + case VOICE_FOCUS: + knew.info = voice_focus_ctl_info; + knew.get = tuning_ctl_get; + knew.put = voice_focus_ctl_put; + knew.tlv.p = voice_focus_db_scale; + break; + case MIC_SVM: + knew.info = mic_svm_ctl_info; + knew.get = tuning_ctl_get; + knew.put = mic_svm_ctl_put; + break; + case EQUALIZER: + knew.info = equalizer_ctl_info; + knew.get = tuning_ctl_get; + knew.put = equalizer_ctl_put; + knew.tlv.p = eq_db_scale; + break; + default: + return 0; + } + knew.private_value = + HDA_COMPOSE_AMP_VAL(nid, 1, 0, type); + sprintf(namestr, "%s %s Volume", name, dirstr[dir]); + return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec)); +} + +static int add_tuning_ctls(struct hda_codec *codec) +{ + int i; + int err; + + for (i = 0; i < TUNING_CTLS_COUNT; i++) { + err = add_tuning_control(codec, + ca0132_tuning_ctls[i].parent_nid, + ca0132_tuning_ctls[i].nid, + ca0132_tuning_ctls[i].name, + ca0132_tuning_ctls[i].direct); + if (err < 0) + return err; + } + + return 0; +} + +static void ca0132_init_tuning_defaults(struct hda_codec *codec) +{ + struct ca0132_spec *spec = codec->spec; + int i; + + /* Wedge Angle defaults to 30. 10 below is 30 - 20. 20 is min. */ + spec->cur_ctl_vals[WEDGE_ANGLE - TUNING_CTL_START_NID] = 10; + /* SVM level defaults to 0.74. */ + spec->cur_ctl_vals[SVM_LEVEL - TUNING_CTL_START_NID] = 74; + + /* EQ defaults to 0dB. */ + for (i = 2; i < TUNING_CTLS_COUNT; i++) + spec->cur_ctl_vals[i] = 24; +} +#endif + +static void ca0132_apply_vnode_settings(struct hda_codec *codec, + hda_nid_t vnid, + hda_nid_t shared_nid, int type) +{ + struct ca0132_spec *spec = codec->spec; + int val; + + /* apply selected volume and switch */ + val = (int)spec->vnode_lvol[vnid - VNODE_START_NID]; + snd_hda_codec_amp_update(codec, shared_nid, 0, + type, 0, HDA_AMP_VOLMASK, val); + + val = (int)spec->vnode_rvol[vnid - VNODE_START_NID]; + snd_hda_codec_amp_update(codec, shared_nid, 1, + type, 0, HDA_AMP_VOLMASK, val); + + val = (int)spec->vnode_lswitch[vnid - VNODE_START_NID]; + snd_hda_codec_amp_update(codec, shared_nid, 0, + type, 0, HDA_AMP_MUTE, + val ? 0 : HDA_AMP_MUTE); + + val = (int)spec->vnode_rswitch[vnid - VNODE_START_NID]; + snd_hda_codec_amp_update(codec, shared_nid, 1, + type, 0, HDA_AMP_MUTE, + val ? 0 : HDA_AMP_MUTE); +} + +static int ca0132_select_out(struct hda_codec *codec) +{ + struct ca0132_spec *spec = codec->spec; + unsigned int pin_ctl; + int jack_present; + unsigned int tmp; + int err; + + CA0132_LOG("ca0132_select_out\n"); + + snd_hda_power_up(codec); + +#ifdef ENABLE_MANUAL_SELECT + jack_present = spec->vnode_lswitch[VNID_HP_SEL - VNODE_START_NID]; +#else + /* Is headphone jack detected? */ + jack_present = snd_hda_jack_detect(codec, spec->out_pins[1]); +#endif + if (jack_present) + spec->cur_out_type = HEADPHONE_OUT; + else + spec->cur_out_type = SPEAKER_OUT; + + if (spec->cur_out_type == SPEAKER_OUT) { + /*speaker out config*/ + tmp = FLOAT_ONE; + err = dspio_set_param(codec, 0x80, 0x04, + &tmp, sizeof(unsigned int)); + if (err < 0) + goto exit; + /*enable speaker EQ*/ + tmp = FLOAT_ONE; + err = dspio_set_param(codec, 0x8f, 0x00, + &tmp, sizeof(unsigned int)); + if (err < 0) + goto exit; + /*speaker EQ bypass attenuation is 0*/ + tmp = FLOAT_ZERO; + err = dspio_set_param(codec, 0x8f, 0x01, + &tmp, sizeof(unsigned int)); + if (err < 0) + goto exit; + + /* disable headphone node */ + pin_ctl = snd_hda_codec_read(codec, spec->out_pins[1], 0, + AC_VERB_GET_PIN_WIDGET_CONTROL, 0); + snd_hda_codec_write(codec, spec->out_pins[1], 0, + AC_VERB_SET_PIN_WIDGET_CONTROL, + pin_ctl & 0xBF); + /* disable headphone EAPD */ + snd_hda_codec_write(codec, spec->out_pins[1], 0, + AC_VERB_SET_EAPD_BTLENABLE, 0x00); + + /* apply selected volume and switch */ + ca0132_apply_vnode_settings(codec, VNID_SPK, + spec->shared_out_nid, HDA_OUTPUT); + + /* enable speaker node */ + pin_ctl = snd_hda_codec_read(codec, spec->out_pins[0], 0, + AC_VERB_GET_PIN_WIDGET_CONTROL, 0); + snd_hda_codec_write(codec, spec->out_pins[0], 0, + AC_VERB_SET_PIN_WIDGET_CONTROL, + pin_ctl | 0x40); + /* enable speaker EAPD */ + snd_hda_codec_write(codec, spec->out_pins[0], 0, + AC_VERB_SET_EAPD_BTLENABLE, 0x02); + } else { + /*headphone out config*/ + tmp = FLOAT_ZERO; + err = dspio_set_param(codec, 0x80, 0x04, + &tmp, sizeof(unsigned int)); + if (err < 0) + goto exit; + /*disable speaker EQ*/ + tmp = FLOAT_ZERO; + err = dspio_set_param(codec, 0x8f, 0x00, + &tmp, sizeof(unsigned int)); + if (err < 0) + goto exit; + /*speaker EQ bypass attenuation is -5.0*/ + tmp = FLOAT_MINUS_5; + err = dspio_set_param(codec, 0x8f, 0x01, + &tmp, sizeof(unsigned int)); + if (err < 0) + goto exit; + + /* disable speaker*/ + pin_ctl = snd_hda_codec_read(codec, spec->out_pins[0], 0, + AC_VERB_GET_PIN_WIDGET_CONTROL, 0); + snd_hda_codec_write(codec, spec->out_pins[0], 0, + AC_VERB_SET_PIN_WIDGET_CONTROL, + pin_ctl & 0xBF); + /* disable speaker EAPD */ + snd_hda_codec_write(codec, spec->out_pins[0], 0, + AC_VERB_SET_EAPD_BTLENABLE, 0x00); + + /* apply selected volume and switch */ + ca0132_apply_vnode_settings(codec, VNID_HP, + spec->shared_out_nid, HDA_OUTPUT); + + /* enable headphone*/ + pin_ctl = snd_hda_codec_read(codec, spec->out_pins[1], 0, + AC_VERB_GET_PIN_WIDGET_CONTROL, 0); + snd_hda_codec_write(codec, spec->out_pins[1], 0, + AC_VERB_SET_PIN_WIDGET_CONTROL, + pin_ctl | 0x40); + /* enable headphone EAPD */ + snd_hda_codec_write(codec, spec->out_pins[1], 0, + AC_VERB_SET_EAPD_BTLENABLE, 0x02); + } + +exit: + snd_hda_power_down(codec); + + return err < 0 ? err : 0; +} + +static void ca0132_set_dmic(struct hda_codec *codec, int enable); +static int ca0132_mic_boost_set(struct hda_codec *codec, long val); +static int ca0132_effects_set(struct hda_codec *codec, hda_nid_t nid, long val); + +static int ca0132_select_mic(struct hda_codec *codec) +{ + struct ca0132_spec *spec = codec->spec; + hda_nid_t vnid; + int jack_present; + + CA0132_LOG("ca0132_select_mic\n"); + + snd_hda_power_up(codec); + +#ifdef ENABLE_MANUAL_SELECT + jack_present = spec->vnode_lswitch[VNID_AMIC1_SEL - VNODE_START_NID]; +#else + /* Is Analog Mic1 jack jack detected? */ + jack_present = snd_hda_jack_detect(codec, spec->input_pins[0]); +#endif + if (jack_present) + spec->cur_mic_type = LINE_MIC_IN; + else + spec->cur_mic_type = DIGITAL_MIC; + + if (spec->cur_mic_type == DIGITAL_MIC) { + /* enable digital Mic */ + ca0132_set_dmic(codec, 1); + ca0132_mic_boost_set(codec, 0); + /* set voice focus */ + ca0132_effects_set(codec, VOICE_FOCUS, + spec->effects_switch[VOICE_FOCUS - EFFECT_START_NID]); + vnid = VNID_DMIC; + } else { + /* disable digital Mic */ + ca0132_set_dmic(codec, 0); + ca0132_mic_boost_set(codec, spec->cur_mic_boost); + /* disable voice focus */ + ca0132_effects_set(codec, VOICE_FOCUS, 0); + vnid = VNID_AMIC1; + } + + /* apply selected volume and switch */ + ca0132_apply_vnode_settings(codec, vnid, + spec->shared_mic_nid, HDA_INPUT); + + snd_hda_power_down(codec); + + return 0; +} + +/* + * Check if VNODE settings take effect immediately. + */ +static bool ca0132_is_vnode_effective(struct hda_codec *codec, + hda_nid_t vnid, + hda_nid_t *shared_nid) +{ + struct ca0132_spec *spec = codec->spec; + hda_nid_t nid; + bool effective = false; + + switch (vnid) { + case VNID_HP: + if (spec->cur_out_type == HEADPHONE_OUT) { + nid = spec->shared_out_nid; + effective = true; + } + break; + case VNID_SPK: + if (spec->cur_out_type == SPEAKER_OUT) { + nid = spec->shared_out_nid; + effective = true; + } + break; + case VNID_DMIC: + if (spec->cur_mic_type == DIGITAL_MIC) { + nid = spec->shared_mic_nid; + effective = true; + } + break; + case VNID_AMIC1: + if (spec->cur_mic_type == LINE_MIC_IN) { + nid = spec->shared_mic_nid; + effective = true; + } + break; + default: + break; + } + + if (effective && shared_nid) + *shared_nid = nid; + + return effective; +} + +/* + * The following functions are control change helpers. + * They return 0 if no changed. Return 1 if changed. + */ +static int ca0132_voicefx_set(struct hda_codec *codec, int enable) +{ + struct ca0132_spec *spec = codec->spec; + unsigned int tmp; + + /* based on CrystalVoice state to enable VoiceFX. */ + if (enable) { + tmp = spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] ? + FLOAT_ONE : FLOAT_ZERO; + } else { + tmp = FLOAT_ZERO; + } + + dspio_set_param(codec, ca0132_voicefx.mid, + ca0132_voicefx.reqs[0], &tmp, sizeof(float)); + + return 1; +} + +static int ca0132_effects_set(struct hda_codec *codec, hda_nid_t nid, long val) +{ + struct ca0132_spec *spec = codec->spec; + unsigned int on; + int num_fx = OUT_EFFECTS_COUNT + IN_EFFECTS_COUNT; + int err = 0; + int idx = nid - EFFECT_START_NID; + + if ((idx < 0) || (idx >= num_fx)) + return 0; /* no changed */ + + /* for out effect, qualify with PE */ + if ((nid >= OUT_EFFECT_START_NID) && (nid < OUT_EFFECT_END_NID)) { + /* if PE if off, turn off out effects. */ + if (!spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]) + val = 0; + } + + /* for in effect, qualify with CrystalVoice */ + if ((nid >= IN_EFFECT_START_NID) && (nid < IN_EFFECT_END_NID)) { + /* if CrystalVoice if off, turn off in effects. */ + if (!spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID]) + val = 0; + + /* Voice Focus applies to 2-ch Mic, Digital Mic */ + if ((nid == VOICE_FOCUS) && (spec->cur_mic_type != DIGITAL_MIC)) + val = 0; + } + + CA0132_LOG("ca0132_effect_set: nid=0x%x, val=%ld\n", nid, val); + + on = (val == 0) ? FLOAT_ZERO : FLOAT_ONE; + err = dspio_set_param(codec, ca0132_effects[idx].mid, + ca0132_effects[idx].reqs[0], + &on, sizeof(unsigned int)); + if (err < 0) + return 0; /* no changed */ + + return 1; +} + +static int ca0132_pe_switch_set(struct hda_codec *codec) +{ + struct ca0132_spec *spec = codec->spec; + hda_nid_t nid; + int i, ret = 0; + + CA0132_LOG("ca0132_pe_switch_set: val=%ld\n", + spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]); + + i = OUT_EFFECT_START_NID - EFFECT_START_NID; + nid = OUT_EFFECT_START_NID; + /* PE affects all out effects */ + for (; nid < OUT_EFFECT_END_NID; nid++, i++) + ret |= ca0132_effects_set(codec, nid, spec->effects_switch[i]); + + return ret; +} + +static int ca0132_cvoice_switch_set(struct hda_codec *codec) +{ + struct ca0132_spec *spec = codec->spec; + hda_nid_t nid; + int i, ret = 0; + + CA0132_LOG("ca0132_cvoice_switch_set: val=%ld\n", + spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID]); + + i = IN_EFFECT_START_NID - EFFECT_START_NID; + nid = IN_EFFECT_START_NID; + /* CrystalVoice affects all in effects */ + for (; nid < IN_EFFECT_END_NID; nid++, i++) + ret |= ca0132_effects_set(codec, nid, spec->effects_switch[i]); + + /* including VoiceFX */ + ret |= ca0132_voicefx_set(codec, (spec->voicefx_val ? 1 : 0)); + return ret; +} + +static int ca0132_mic_boost_set(struct hda_codec *codec, long val) +{ + struct ca0132_spec *spec = codec->spec; + int ret = 0; + + if (val) /* on */ + ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0, + HDA_INPUT, 0, HDA_AMP_VOLMASK, 3); + else /* off */ + ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0, + HDA_INPUT, 0, HDA_AMP_VOLMASK, 0); + + return ret; +} + +static int ca0132_vnode_switch_set(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct hda_codec *codec = snd_kcontrol_chip(kcontrol); + hda_nid_t nid = get_amp_nid(kcontrol); + hda_nid_t shared_nid = 0; + bool effective; + int ret = 0; + +#ifdef ENABLE_MANUAL_SELECT + if (nid == VNID_HP_SEL) { + ca0132_select_out(codec); + return 1; + } + + if (nid == VNID_AMIC1_SEL) { + ca0132_select_mic(codec); + return 1; + } +#endif + + /* if effective conditions, then update hw immediately. */ + effective = ca0132_is_vnode_effective(codec, nid, &shared_nid); + if (effective) { + int dir = get_amp_direction(kcontrol); + int ch = get_amp_channels(kcontrol); + unsigned long pval; + + mutex_lock(&codec->control_mutex); + pval = kcontrol->private_value; + kcontrol->private_value = HDA_COMPOSE_AMP_VAL(shared_nid, ch, + 0, dir); + ret = snd_hda_mixer_amp_switch_put(kcontrol, ucontrol); + kcontrol->private_value = pval; + mutex_unlock(&codec->control_mutex); + } + + return ret; +} +/* End of control change helpers. */ + +static int ca0132_voicefx_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + unsigned int items = sizeof(ca0132_voicefx_presets) + / sizeof(struct ct_voicefx_preset); + + uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED; + uinfo->count = 1; + uinfo->value.enumerated.items = items; + if (uinfo->value.enumerated.item >= items) + uinfo->value.enumerated.item = items - 1; + strcpy(uinfo->value.enumerated.name, + ca0132_voicefx_presets[uinfo->value.enumerated.item].name); + return 0; +} + +static int ca0132_voicefx_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct hda_codec *codec = snd_kcontrol_chip(kcontrol); + struct ca0132_spec *spec = codec->spec; + + ucontrol->value.enumerated.item[0] = spec->voicefx_val; + return 0; +} + +static int ca0132_voicefx_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct hda_codec *codec = snd_kcontrol_chip(kcontrol); + struct ca0132_spec *spec = codec->spec; + int i, err = 0; + int sel = ucontrol->value.enumerated.item[0]; + unsigned int items = sizeof(ca0132_voicefx_presets) + / sizeof(struct ct_voicefx_preset); + + if (sel >= items) + return 0; + + CA0132_LOG("ca0132_voicefx_put: sel=%d, preset=%s\n", + sel, ca0132_voicefx_presets[sel].name); + + /* + * Idx 0 is default. + * Default needs to qualify with CrystalVoice state. + */ + for (i = 0; i < VOICEFX_MAX_PARAM_COUNT; i++) { + err = dspio_set_param(codec, ca0132_voicefx.mid, + ca0132_voicefx.reqs[i], + &(ca0132_voicefx_presets[sel].vals[i]), + sizeof(float)); + if (err < 0) + break; + } + + if (err >= 0) { + spec->voicefx_val = sel; + /* enable voice fx */ + ca0132_voicefx_set(codec, (sel ? 1 : 0)); + } + + return 1; +} + +static int ca0132_switch_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct hda_codec *codec = snd_kcontrol_chip(kcontrol); + struct ca0132_spec *spec = codec->spec; + hda_nid_t nid = get_amp_nid(kcontrol); + int ch = get_amp_channels(kcontrol); + long *valp = ucontrol->value.integer.value; + + /* vnode */ + if ((nid >= VNODE_START_NID) && (nid < VNODE_END_NID)) { + if (ch & 1) { + *valp = spec->vnode_lswitch[nid - VNODE_START_NID]; + valp++; + } + if (ch & 2) { + *valp = spec->vnode_rswitch[nid - VNODE_START_NID]; + valp++; + } + return 0; + } + + /* effects, include PE and CrystalVoice */ + if ((nid >= EFFECT_START_NID) && (nid < EFFECT_END_NID)) { + *valp = spec->effects_switch[nid - EFFECT_START_NID]; + return 0; + } + + /* mic boost */ + if (nid == spec->input_pins[0]) { + *valp = spec->cur_mic_boost; + return 0; + } + + return 0; +} + +static int ca0132_switch_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct hda_codec *codec = snd_kcontrol_chip(kcontrol); + struct ca0132_spec *spec = codec->spec; + hda_nid_t nid = get_amp_nid(kcontrol); + int ch = get_amp_channels(kcontrol); + long *valp = ucontrol->value.integer.value; + int changed = 1; + + CA0132_LOG("ca0132_switch_put: nid=0x%x, val=%ld\n", nid, *valp); + + snd_hda_power_up(codec); + /* vnode */ + if ((nid >= VNODE_START_NID) && (nid < VNODE_END_NID)) { + if (ch & 1) { + spec->vnode_lswitch[nid - VNODE_START_NID] = *valp; + valp++; + } + if (ch & 2) { + spec->vnode_rswitch[nid - VNODE_START_NID] = *valp; + valp++; + } + changed = ca0132_vnode_switch_set(kcontrol, ucontrol); + goto exit; + } + + /* PE */ + if (nid == PLAY_ENHANCEMENT) { + spec->effects_switch[nid - EFFECT_START_NID] = *valp; + changed = ca0132_pe_switch_set(codec); + goto exit; + } + + /* CrystalVoice */ + if (nid == CRYSTAL_VOICE) { + spec->effects_switch[nid - EFFECT_START_NID] = *valp; + changed = ca0132_cvoice_switch_set(codec); + goto exit; + } + + /* out and in effects */ + if (((nid >= OUT_EFFECT_START_NID) && (nid < OUT_EFFECT_END_NID)) || + ((nid >= IN_EFFECT_START_NID) && (nid < IN_EFFECT_END_NID))) { + spec->effects_switch[nid - EFFECT_START_NID] = *valp; + changed = ca0132_effects_set(codec, nid, *valp); + goto exit; + } + + /* mic boost */ + if (nid == spec->input_pins[0]) { + spec->cur_mic_boost = *valp; + + /* Mic boost does not apply to Digital Mic */ + if (spec->cur_mic_type != DIGITAL_MIC) + changed = ca0132_mic_boost_set(codec, *valp); + goto exit; + } + +exit: + snd_hda_power_down(codec); + return changed; +} + +/* + * Volume related + */ +static int ca0132_volume_info(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_info *uinfo) +{ + struct hda_codec *codec = snd_kcontrol_chip(kcontrol); + struct ca0132_spec *spec = codec->spec; + hda_nid_t nid = get_amp_nid(kcontrol); + int ch = get_amp_channels(kcontrol); + int dir = get_amp_direction(kcontrol); + unsigned long pval; + int err; + + switch (nid) { + case VNID_HP: + case VNID_SPK: + /* follow shared_out info */ + nid = spec->shared_out_nid; + mutex_lock(&codec->control_mutex); + pval = kcontrol->private_value; + kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); + err = snd_hda_mixer_amp_volume_info(kcontrol, uinfo); + kcontrol->private_value = pval; + mutex_unlock(&codec->control_mutex); + break; + case VNID_DMIC: + case VNID_AMIC1: + /* follow shared_mic info */ + nid = spec->shared_mic_nid; + mutex_lock(&codec->control_mutex); + pval = kcontrol->private_value; + kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); + err = snd_hda_mixer_amp_volume_info(kcontrol, uinfo); + kcontrol->private_value = pval; + mutex_unlock(&codec->control_mutex); + break; + default: + err = snd_hda_mixer_amp_volume_info(kcontrol, uinfo); + } + return err; +} + +static int ca0132_volume_get(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct hda_codec *codec = snd_kcontrol_chip(kcontrol); + struct ca0132_spec *spec = codec->spec; + hda_nid_t nid = get_amp_nid(kcontrol); + int ch = get_amp_channels(kcontrol); + long *valp = ucontrol->value.integer.value; + + /* store the left and right volume */ + if (ch & 1) { + *valp = spec->vnode_lvol[nid - VNODE_START_NID]; + valp++; + } + if (ch & 2) { + *valp = spec->vnode_rvol[nid - VNODE_START_NID]; + valp++; + } + return 0; +} + +static int ca0132_volume_put(struct snd_kcontrol *kcontrol, + struct snd_ctl_elem_value *ucontrol) +{ + struct hda_codec *codec = snd_kcontrol_chip(kcontrol); + struct ca0132_spec *spec = codec->spec; + hda_nid_t nid = get_amp_nid(kcontrol); + int ch = get_amp_channels(kcontrol); + long *valp = ucontrol->value.integer.value; + hda_nid_t shared_nid = 0; + bool effective; + int changed = 1; + + /* store the left and right volume */ + if (ch & 1) { + spec->vnode_lvol[nid - VNODE_START_NID] = *valp; + valp++; + } + if (ch & 2) { + spec->vnode_rvol[nid - VNODE_START_NID] = *valp; + valp++; + } + + /* if effective conditions, then update hw immediately. */ + effective = ca0132_is_vnode_effective(codec, nid, &shared_nid); + if (effective) { + int dir = get_amp_direction(kcontrol); + unsigned long pval; + + snd_hda_power_up(codec); + mutex_lock(&codec->control_mutex); + pval = kcontrol->private_value; + kcontrol->private_value = HDA_COMPOSE_AMP_VAL(shared_nid, ch, + 0, dir); + changed = snd_hda_mixer_amp_volume_put(kcontrol, ucontrol); + kcontrol->private_value = pval; + mutex_unlock(&codec->control_mutex); + snd_hda_power_down(codec); + } + + return changed; +} + +static int ca0132_volume_tlv(struct snd_kcontrol *kcontrol, int op_flag, + unsigned int size, unsigned int __user *tlv) +{ + struct hda_codec *codec = snd_kcontrol_chip(kcontrol); + struct ca0132_spec *spec = codec->spec; + hda_nid_t nid = get_amp_nid(kcontrol); + int ch = get_amp_channels(kcontrol); + int dir = get_amp_direction(kcontrol); + unsigned long pval; + int err; + + switch (nid) { + case VNID_HP: + case VNID_SPK: + /* follow shared_out tlv */ + nid = spec->shared_out_nid; + mutex_lock(&codec->control_mutex); + pval = kcontrol->private_value; + kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); + err = snd_hda_mixer_amp_tlv(kcontrol, op_flag, size, tlv); + kcontrol->private_value = pval; + mutex_unlock(&codec->control_mutex); + break; + case VNID_DMIC: + case VNID_AMIC1: + /* follow shared_mic tlv */ + nid = spec->shared_mic_nid; + mutex_lock(&codec->control_mutex); + pval = kcontrol->private_value; + kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir); + err = snd_hda_mixer_amp_tlv(kcontrol, op_flag, size, tlv); + kcontrol->private_value = pval; + mutex_unlock(&codec->control_mutex); + break; + default: + err = snd_hda_mixer_amp_tlv(kcontrol, op_flag, size, tlv); + } + return err; +} + +static int add_fx_switch(struct hda_codec *codec, hda_nid_t nid, + const char *pfx, int dir) +{ + char namestr[44]; + int type = dir ? HDA_INPUT : HDA_OUTPUT; + struct snd_kcontrol_new knew = + CA0132_CODEC_MUTE_MONO(namestr, nid, 1, type); + sprintf(namestr, "%s %s Switch", pfx, dirstr[dir]); + return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec)); +} + +static int add_voicefx(struct hda_codec *codec) +{ + struct snd_kcontrol_new knew = + HDA_CODEC_MUTE_MONO(ca0132_voicefx.name, + VOICEFX, 1, 0, HDA_INPUT); + knew.info = ca0132_voicefx_info; + knew.get = ca0132_voicefx_get; + knew.put = ca0132_voicefx_put; + return snd_hda_ctl_add(codec, VOICEFX, snd_ctl_new1(&knew, codec)); +} + +/* + * When changing Node IDs for Mixer Controls below, make sure to update + * Node IDs in ca0132_config() as well. + */ +static struct snd_kcontrol_new ca0132_mixer[] = { + CA0132_CODEC_VOL("Headphone Playback Volume", VNID_HP, HDA_OUTPUT), + CA0132_CODEC_MUTE("Headphone Playback Switch", VNID_HP, HDA_OUTPUT), + CA0132_CODEC_VOL("PC Speaker Playback Volume", VNID_SPK, HDA_OUTPUT), + CA0132_CODEC_MUTE("PC Speaker Playback Switch", VNID_SPK, HDA_OUTPUT), + CA0132_CODEC_VOL("Digital-Mic Capture Volume", VNID_DMIC, HDA_INPUT), + CA0132_CODEC_MUTE("Digital-Mic Capture Switch", VNID_DMIC, HDA_INPUT), + CA0132_CODEC_VOL("Analog-Mic1 Capture Volume", VNID_AMIC1, HDA_INPUT), + CA0132_CODEC_MUTE("Analog-Mic1 Capture Switch", VNID_AMIC1, HDA_INPUT), + HDA_CODEC_VOLUME("Analog-Mic2 Capture Volume", 0x08, 0, HDA_INPUT), + HDA_CODEC_MUTE("Analog-Mic2 Capture Switch", 0x08, 0, HDA_INPUT), + HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT), + HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT), + CA0132_CODEC_MUTE_MONO("Mic1-Boost (30dB) Capture Switch", + 0x12, 1, HDA_INPUT), +#ifdef ENABLE_MANUAL_SELECT + CA0132_CODEC_MUTE_MONO("HP/Speaker Playback Switch", + VNID_HP_SEL, 1, HDA_OUTPUT), + CA0132_CODEC_MUTE_MONO("AMic1/DMic Capture Switch", + VNID_AMIC1_SEL, 1, HDA_INPUT), +#endif + { } /* end */ +}; + +static int ca0132_build_controls(struct hda_codec *codec) +{ + struct ca0132_spec *spec = codec->spec; + int i, num_fx; + int err = 0; + + /* Add Mixer controls */ + for (i = 0; i < spec->num_mixers; i++) { + err = snd_hda_add_new_ctls(codec, spec->mixers[i]); + if (err < 0) + return err; + } + + /* Add in and out effects controls. + * VoiceFX, PE and CrystalVoice are added separately. + */ + num_fx = OUT_EFFECTS_COUNT + IN_EFFECTS_COUNT; + for (i = 0; i < num_fx; i++) { + err = add_fx_switch(codec, ca0132_effects[i].nid, + ca0132_effects[i].name, + ca0132_effects[i].direct); + if (err < 0) + return err; + } + + err = add_fx_switch(codec, PLAY_ENHANCEMENT, "PlayEnhancement", 0); + if (err < 0) + return err; + + err = add_fx_switch(codec, CRYSTAL_VOICE, "CrystalVoice", 1); + if (err < 0) + return err; + + add_voicefx(codec); + + #ifdef ENABLE_TUNING_CONTROLS + add_tuning_ctls(codec); + #endif + + return 0; +} + +/* + * PCM + */ +static struct hda_pcm_stream ca0132_pcm_analog_playback = { + .substreams = 1, + .channels_min = 2, + .channels_max = 6, + .ops = { + .prepare = ca0132_playback_pcm_prepare, + .cleanup = ca0132_playback_pcm_cleanup + }, +}; + +static struct hda_pcm_stream ca0132_pcm_analog_capture = { + .substreams = 1, + .channels_min = 2, + .channels_max = 2, + .ops = { + .prepare = ca0132_capture_pcm_prepare, + .cleanup = ca0132_capture_pcm_cleanup + }, +}; + +static int ca0132_build_pcms(struct hda_codec *codec) +{ + struct ca0132_spec *spec = codec->spec; + struct hda_pcm *info = spec->pcm_rec; + + codec->pcm_info = info; + codec->num_pcms = 0; + + info->name = "CA0132 Playback"; + info->stream[SNDRV_PCM_STREAM_PLAYBACK] = ca0132_pcm_analog_playback; + info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dacs[0]; + info->stream[SNDRV_PCM_STREAM_PLAYBACK].channels_max = + spec->multiout.max_channels; + codec->num_pcms++; + + info++; + info->name = "CA0132 Digital-Mic / Analog-Mic1"; + info->stream[SNDRV_PCM_STREAM_CAPTURE] = ca0132_pcm_analog_capture; + info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = 1; + info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[0]; + codec->num_pcms++; + + info++; + info->name = "CA0132 Analog Mic-In2"; + info->stream[SNDRV_PCM_STREAM_CAPTURE] = ca0132_pcm_analog_capture; + info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = 1; + info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[1]; + codec->num_pcms++; + + info++; + info->name = "CA0132 What U Hear"; + info->stream[SNDRV_PCM_STREAM_CAPTURE] = ca0132_pcm_analog_capture; + info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = 1; + info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[2]; + codec->num_pcms++; + + return 0; +} + +static void init_output(struct hda_codec *codec, hda_nid_t pin, hda_nid_t dac) +{ + if (pin) { + snd_hda_codec_write(codec, pin, 0, + AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP); + if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP) + snd_hda_codec_write(codec, pin, 0, + AC_VERB_SET_AMP_GAIN_MUTE, + AMP_OUT_UNMUTE); + } + if (dac) + snd_hda_codec_write(codec, dac, 0, AC_VERB_SET_AMP_GAIN_MUTE, + AMP_OUT_ZERO); +} + +static void init_input(struct hda_codec *codec, hda_nid_t pin, hda_nid_t adc) +{ + if (pin) { + snd_hda_codec_write(codec, pin, 0, + AC_VERB_SET_PIN_WIDGET_CONTROL, + PIN_VREF80); + if (get_wcaps(codec, pin) & AC_WCAP_IN_AMP) + snd_hda_codec_write(codec, pin, 0, + AC_VERB_SET_AMP_GAIN_MUTE, + AMP_IN_UNMUTE(0)); + } + if (adc) { + snd_hda_codec_write(codec, adc, 0, AC_VERB_SET_AMP_GAIN_MUTE, + AMP_IN_UNMUTE(0)); + + /* init to 0 dB and unmute. */ + snd_hda_codec_amp_stereo(codec, adc, HDA_INPUT, 0, + HDA_AMP_VOLMASK, 0x5a); + snd_hda_codec_amp_stereo(codec, adc, HDA_INPUT, 0, + HDA_AMP_MUTE, 0); + } +} + +static void refresh_amp_caps(struct hda_codec *codec, hda_nid_t nid, int dir) +{ + unsigned int caps; + + caps = snd_hda_param_read(codec, nid, dir == HDA_OUTPUT ? + AC_PAR_AMP_OUT_CAP : AC_PAR_AMP_IN_CAP); + snd_hda_override_amp_caps(codec, nid, dir, caps); +} + +static void ca0132_set_dmic(struct hda_codec *codec, int enable) +{ + struct ca0132_spec *spec = codec->spec; + unsigned int tmp; + u8 val; + + CA0132_LOG("ca0132_set_dmic: enable=%d\n", enable); + + if (enable) { + /* set DMic input as 2-ch */ + tmp = FLOAT_TWO; + dspio_set_param(codec, 0x80, 0x00, &tmp, sizeof(unsigned int)); + + val = spec->dmic_ctl; + val |= 0x80; + snd_hda_codec_write(codec, spec->input_pins[0], 0, + VENDOR_CHIPIO_DMIC_CTL_SET, val); + + if (!(spec->dmic_ctl & 0x20)) + chipio_set_control_flag(codec, CONTROL_FLAG_DMIC, 1); + } else { + /* set AMic input as mono */ + tmp = FLOAT_ONE; + dspio_set_param(codec, 0x80, 0x00, &tmp, sizeof(unsigned int)); + + val = spec->dmic_ctl; + /* clear bit7 and bit5 to disable dmic */ + val &= 0x5f; + snd_hda_codec_write(codec, spec->input_pins[0], 0, + VENDOR_CHIPIO_DMIC_CTL_SET, val); + + if (!(spec->dmic_ctl & 0x20)) + chipio_set_control_flag(codec, CONTROL_FLAG_DMIC, 0); + } +} + +static void ca0132_init_dmic(struct hda_codec *codec) +{ + struct ca0132_spec *spec = codec->spec; + u8 val; + + /* Setup Digital Mic here, but don't enable. + * Enable based on jack detect. + */ + + /* MCLK uses MPIO1, set to enable. + * Bit 2-0: MPIO select + * Bit 3: set to disable + * Bit 7-4: reserved + */ + val = 0x01; + snd_hda_codec_write(codec, spec->input_pins[0], 0, + VENDOR_CHIPIO_DMIC_MCLK_SET, val); + + /* Data1 uses MPIO3. Data2 not use + * Bit 2-0: Data1 MPIO select + * Bit 3: set disable Data1 + * Bit 6-4: Data2 MPIO select + * Bit 7: set disable Data2 + */ + val = 0x83; + snd_hda_codec_write(codec, spec->input_pins[0], 0, + VENDOR_CHIPIO_DMIC_PIN_SET, val); + + /* Use Ch-0 and Ch-1. Rate is 48K, mode 1. Disable DMic first. + * Bit 3-0: Channel mask + * Bit 4: set for 48KHz, clear for 32KHz + * Bit 5: mode + * Bit 6: set to select Data2, clear for Data1 + * Bit 7: set to enable DMic, clear for AMic + */ + val = 0x33; + /* keep a copy of dmic ctl val for enable/disable dmic purpuse */ + spec->dmic_ctl = val; + snd_hda_codec_write(codec, spec->input_pins[0], 0, + VENDOR_CHIPIO_DMIC_CTL_SET, val); +} + +static void ca0132_init_analog_mic2(struct hda_codec *codec) +{ + struct ca0132_spec *spec = codec->spec; + + mutex_lock(&spec->chipio_mutex); + snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, + VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x20); + snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, + VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x19); + snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, + VENDOR_CHIPIO_8051_DATA_WRITE, 0x00); + snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, + VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x2D); + snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, + VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x19); + snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0, + VENDOR_CHIPIO_8051_DATA_WRITE, 0x00); + mutex_unlock(&spec->chipio_mutex); +} + +static void ca0132_refresh_widget_caps(struct hda_codec *codec) +{ + struct ca0132_spec *spec = codec->spec; + int i; + hda_nid_t nid; + + CA0132_LOG("ca0132_refresh_widget_caps.\n"); + nid = codec->start_nid; + for (i = 0; i < codec->num_nodes; i++, nid++) + codec->wcaps[i] = snd_hda_param_read(codec, nid, + AC_PAR_AUDIO_WIDGET_CAP); + + for (i = 0; i < spec->multiout.num_dacs; i++) + refresh_amp_caps(codec, spec->dacs[i], HDA_OUTPUT); + + for (i = 0; i < spec->num_outputs; i++) + refresh_amp_caps(codec, spec->out_pins[i], HDA_OUTPUT); + + for (i = 0; i < spec->num_inputs; i++) { + refresh_amp_caps(codec, spec->adcs[i], HDA_INPUT); + refresh_amp_caps(codec, spec->input_pins[i], HDA_INPUT); + } +} + +static void ca0132_setup_defaults(struct hda_codec *codec) +{ + unsigned int tmp; + int num_fx; + int idx, i; + + if (!dspload_is_loaded(codec)) + return; + + /* out, in effects + voicefx */ + num_fx = OUT_EFFECTS_COUNT + IN_EFFECTS_COUNT + 1; + for (idx = 0; idx < num_fx; idx++) { + for (i = 0; i <= ca0132_effects[idx].params; i++) { + dspio_set_param(codec, ca0132_effects[idx].mid, + ca0132_effects[idx].reqs[i], + &(ca0132_effects[idx].def_vals[i]), + sizeof(float)); + } + } + + /* set AMic1 and AMic2 as mono mic */ + tmp = FLOAT_ONE; + dspio_set_param(codec, 0x80, 0x00, &tmp, sizeof(unsigned int)); + dspio_set_param(codec, 0x80, 0x01, &tmp, sizeof(unsigned int)); + + /* set AMic1 as CrystalVoice input */ + tmp = FLOAT_ONE; + dspio_set_param(codec, 0x80, 0x05, &tmp, sizeof(unsigned int)); +} + +static void ca0132_init_flags(struct hda_codec *codec) +{ + chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0); + chipio_set_control_flag(codec, CONTROL_FLAG_PORT_A_COMMON_MODE, 0); + chipio_set_control_flag(codec, CONTROL_FLAG_PORT_D_COMMON_MODE, 0); + chipio_set_control_flag(codec, CONTROL_FLAG_PORT_A_10KOHM_LOAD, 0); + chipio_set_control_flag(codec, CONTROL_FLAG_PORT_D_10KOHM_LOAD, 0); + chipio_set_control_flag(codec, CONTROL_FLAG_ADC_C_HIGH_PASS, 1); +} + +static void ca0132_set_dsp_msr(struct hda_codec *codec, bool is96k) +{ + chipio_set_control_flag(codec, CONTROL_FLAG_DSP_96KHZ, is96k); + chipio_set_control_flag(codec, CONTROL_FLAG_DAC_96KHZ, is96k); + chipio_set_control_flag(codec, CONTROL_FLAG_SRC_RATE_96KHZ, is96k); + chipio_set_control_flag(codec, CONTROL_FLAG_SRC_CLOCK_196MHZ, is96k); + chipio_set_control_flag(codec, CONTROL_FLAG_ADC_B_96KHZ, is96k); + chipio_set_control_flag(codec, CONTROL_FLAG_ADC_C_96KHZ, is96k); + + chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_16_000); + chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_16_000); + chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000); +} + +static bool ca0132_download_dsp_images(struct hda_codec *codec) +{ + bool dsp_loaded = false; + const struct dsp_image_seg *dsp_os_image; + + dsp_os_image = (struct dsp_image_seg *)DspImage_dsp_os; + dspload_image(codec, dsp_os_image, 0, 0, true, 0); + dsp_loaded = dspload_wait_loaded(codec); + + if (dsp_loaded) + dspload_speakereq(codec); + + return dsp_loaded; +} + +static void ca0132_download_dsp(struct hda_codec *codec) +{ + struct ca0132_spec *spec = codec->spec; + + spec->dsp_state = DSP_DOWNLOAD_INIT; + /* check if there is power cut-off to DSP */ + if (dspload_is_loaded(codec)) { + /* dsp is already loaded. */ + /*spec->dsp_state = DSP_DOWNLOADED;*/ + } + + if (spec->dsp_state == DSP_DOWNLOAD_INIT) { + chipio_enable_clocks(codec); + spec->dsp_state = DSP_DOWNLOADING; + if (!ca0132_download_dsp_images(codec)) + spec->dsp_state = DSP_DOWNLOAD_FAILED; + else + spec->dsp_state = DSP_DOWNLOADED; + } + + if (spec->dsp_state == DSP_DOWNLOADED) + ca0132_set_dsp_msr(codec, true); +} + +static void ca0132_process_dsp_response(struct hda_codec *codec) +{ + struct ca0132_spec *spec = codec->spec; + + CA0132_LOG("ca0132_process_dsp_response\n"); + if (spec->wait_scp) { + if (dspio_get_response_data(codec) >= 0) + spec->wait_scp = 0; + } + + dspio_clear_response_queue(codec); +} + +static void ca0132_unsol_event(struct hda_codec *codec, unsigned int res) +{ + CA0132_LOG("ca0132_unsol_event: 0x%x\n", res); + switch ((res >> AC_UNSOL_RES_TAG_SHIFT) & 0x3f) { + case UNSOL_TAG_DSP: + ca0132_process_dsp_response(codec); + break; + case UNSOL_TAG_HP: + ca0132_select_out(codec); + break; + case UNSOL_TAG_AMIC1: + ca0132_select_mic(codec); + break; + default: + break; + } +} + +/* + * Verbs tables. + */ + +/* Sends before DSP download. */ +static struct hda_verb ca0132_base_init_verbs[] = { + /*enable ct extension*/ + {0x15, VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE, 0x1}, + /*enable DSP node unsol, needed for DSP download*/ + {0x16, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | UNSOL_TAG_DSP}, + {} +}; + +/* Send at exit. */ +static struct hda_verb ca0132_base_exit_verbs[] = { + /*set afg to D3*/ + {0x01, AC_VERB_SET_POWER_STATE, 0x03}, + /*disable ct extension*/ + {0x15, VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE, 0}, + {} +}; + +/* Other verbs tables. Sends after DSP download. */ +static struct hda_verb ca0132_init_verbs0[] = { + /* chip init verbs */ + {0x15, 0x70D, 0xF0}, + {0x15, 0x70E, 0xFE}, + {0x15, 0x707, 0x75}, + {0x15, 0x707, 0xD3}, + {0x15, 0x707, 0x09}, + {0x15, 0x707, 0x53}, + {0x15, 0x707, 0xD4}, + {0x15, 0x707, 0xEF}, + {0x15, 0x707, 0x75}, + {0x15, 0x707, 0xD3}, + {0x15, 0x707, 0x09}, + {0x15, 0x707, 0x02}, + {0x15, 0x707, 0x37}, + {0x15, 0x707, 0x78}, + {0x15, 0x53C, 0xCE}, + {0x15, 0x575, 0xC9}, + {0x15, 0x53D, 0xCE}, + {0x15, 0x5B7, 0xC9}, + {0x15, 0x70D, 0xE8}, + {0x15, 0x70E, 0xFE}, + {0x15, 0x707, 0x02}, + {0x15, 0x707, 0x68}, + {0x15, 0x707, 0x62}, + {0x15, 0x53A, 0xCE}, + {0x15, 0x546, 0xC9}, + {0x15, 0x53B, 0xCE}, + {0x15, 0x5E8, 0xC9}, + {0x15, 0x717, 0x0D}, + {0x15, 0x718, 0x20}, + {} +}; + +static struct hda_verb ca0132_init_verbs1[] = { + {0x0f, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | UNSOL_TAG_HP}, + {0x12, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | UNSOL_TAG_AMIC1}, + /* config EAPD */ + {0x0b, 0x78D, 0x00}, + /*{0x0b, AC_VERB_SET_EAPD_BTLENABLE, 0x02},*/ + {0x10, 0x78D, 0x02}, + /*{0x10, AC_VERB_SET_EAPD_BTLENABLE, 0x02},*/ + {} +}; + +static void ca0132_init_chip(struct hda_codec *codec) +{ + struct ca0132_spec *spec = codec->spec; + int num_fx; + int i; + unsigned int on; + + mutex_init(&spec->chipio_mutex); + + spec->cur_out_type = SPEAKER_OUT; + spec->cur_mic_type = DIGITAL_MIC; + spec->cur_mic_boost = 0; + + for (i = 0; i < VNODES_COUNT; i++) { + spec->vnode_lvol[i] = 0x5a; + spec->vnode_rvol[i] = 0x5a; + spec->vnode_lswitch[i] = 0; + spec->vnode_rswitch[i] = 0; + } + + /* + * Default states for effects are in ca0132_effects[]. + */ + num_fx = OUT_EFFECTS_COUNT + IN_EFFECTS_COUNT; + for (i = 0; i < num_fx; i++) { + on = (unsigned int)ca0132_effects[i].reqs[0]; + spec->effects_switch[i] = on ? 1 : 0; + } + + spec->voicefx_val = 0; + spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID] = 1; + spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] = 0; + + #ifdef ENABLE_TUNING_CONTROLS + ca0132_init_tuning_defaults(codec); + #endif +} + +static void ca0132_exit_chip(struct hda_codec *codec) +{ + /* put any chip cleanup stuffs here. */ + + if (dspload_is_loaded(codec)) + dsp_reset(codec); +} + +static int ca0132_init(struct hda_codec *codec) +{ + struct ca0132_spec *spec = codec->spec; + int i; + + spec->dsp_state = DSP_DOWNLOAD_INIT; + spec->curr_chip_addx = ~0UL; + + snd_hda_power_up(codec); + + ca0132_init_flags(codec); + snd_hda_sequence_write(codec, spec->base_init_verbs); + ca0132_download_dsp(codec); + ca0132_refresh_widget_caps(codec); + ca0132_setup_defaults(codec); + ca0132_init_analog_mic2(codec); + ca0132_init_dmic(codec); + + for (i = 0; i < spec->num_outputs; i++) + init_output(codec, spec->out_pins[i], spec->dacs[0]); + + for (i = 0; i < spec->num_inputs; i++) + init_input(codec, spec->input_pins[i], spec->adcs[i]); + + for (i = 0; i < spec->num_init_verbs; i++) + snd_hda_sequence_write(codec, spec->init_verbs[i]); + + ca0132_select_out(codec); + ca0132_select_mic(codec); + + snd_hda_power_down(codec); + + return 0; +} + +static void ca0132_free(struct hda_codec *codec) +{ + struct ca0132_spec *spec = codec->spec; + + snd_hda_power_up(codec); + snd_hda_sequence_write(codec, spec->base_exit_verbs); + ca0132_exit_chip(codec); + snd_hda_power_down(codec); + kfree(codec->spec); +} + + +static struct hda_codec_ops ca0132_patch_ops = { + .build_controls = ca0132_build_controls, + .build_pcms = ca0132_build_pcms, + .init = ca0132_init, + .free = ca0132_free, + .unsol_event = ca0132_unsol_event, +}; + +static void ca0132_config(struct hda_codec *codec) +{ + struct ca0132_spec *spec = codec->spec; + + spec->dacs[0] = 0x2; + spec->dacs[1] = 0x3; + spec->dacs[2] = 0x4; + + spec->multiout.dac_nids = spec->dacs; + spec->multiout.num_dacs = 3; + spec->multiout.max_channels = 2; + + spec->num_outputs = 2; + spec->out_pins[0] = 0x0b; /* speaker out */ + spec->out_pins[1] = 0x10; /* headphone out */ + spec->shared_out_nid = 0x2; + + spec->num_inputs = 3; + spec->adcs[0] = 0x7; /* digital mic / analog mic1 */ + spec->adcs[1] = 0x8; /* analog mic2 */ + spec->adcs[2] = 0xa; /* what u hear */ + spec->shared_mic_nid = 0x7; + + spec->input_pins[0] = 0x12; + spec->input_pins[1] = 0x11; + spec->input_pins[2] = 0x13; +} + +static int patch_ca0132(struct hda_codec *codec) +{ + struct ca0132_spec *spec; + + snd_printdd("patch_ca0132\n"); + + spec = kzalloc(sizeof(*spec), GFP_KERNEL); + if (!spec) + return -ENOMEM; + codec->spec = spec; + + spec->num_mixers = 1; + spec->mixers[0] = ca0132_mixer; + + spec->base_init_verbs = ca0132_base_init_verbs; + spec->base_exit_verbs = ca0132_base_exit_verbs; + spec->init_verbs[0] = ca0132_init_verbs0; + spec->init_verbs[1] = ca0132_init_verbs1; + spec->num_init_verbs = 2; + + ca0132_init_chip(codec); + + ca0132_config(codec); + + codec->patch_ops = ca0132_patch_ops; + + return 0; +} + + +/* + * patch entries + */ +static struct hda_codec_preset snd_hda_preset_ca0132[] = { + { .id = 0x11020011, .name = "CA0132", .patch = patch_ca0132 }, + {} /* terminator */ +}; + +MODULE_ALIAS("snd-hda-codec-id:11020011"); + +MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("Creative Sound Core3D codec"); + +static struct hda_codec_preset_list ca0132_list = { + .preset = snd_hda_preset_ca0132, + .owner = THIS_MODULE, +}; + +static int __init patch_ca0132_init(void) +{ + return snd_hda_add_codec_preset(&ca0132_list); +} + +static void __exit patch_ca0132_exit(void) +{ + snd_hda_delete_codec_preset(&ca0132_list); +} + +module_init(patch_ca0132_init) +module_exit(patch_ca0132_exit) diff --git a/sound/pci/hda/patch_ca0132/speakereq_x.h b/sound/pci/hda/patch_ca0132/speakereq_x.h new file mode 100644 index 0000000..9e40e3e --- /dev/null +++ b/sound/pci/hda/patch_ca0132/speakereq_x.h @@ -0,0 +1,272 @@ +/*----------------------------------------------------------------------------- +// Generated by Coff2DspImage V0.4. (built on Thu Oct 28 02:57:27 2010) +// ---- +// Input file: coef_re.o +// Output file: Speaker_EQ_X.cpp +// On: 2011/01/13 16:06:51 UTC +// ---- +// Copyright (c) 2011, Creative Technology Ltd. +//---------------------------------------------------------------------------*/ + + +const u32 Speaker_EQ_X[] = { +0x4c46584d, 0x0, 0x400, 0x3fbbe149, +0x80000000, 0xbef168a2, 0x80000000, 0x3e8c4d50, +0x0, 0xbeefa563, 0x80000000, 0x3efe9e2f, +0x0, 0xbf1a0d27, 0x80000000, 0x3f5631fc, +0x0, 0xbf302e68, 0x80000000, 0x3f45255b, +0x0, 0xbf2f639c, 0x80000000, 0x3f5837a5, +0x0, 0xbf39bb2e, 0x80000000, 0x3f18b10e, +0x0, 0xbf11d34f, 0x80000000, 0x3f0eed9e, +0x0, 0xbf1b5efe, 0x80000000, 0x3f208627, +0x0, 0xbf0df857, 0x80000000, 0x3edbcf02, +0x0, 0xbea4a063, 0x80000000, 0x3e8cab21, +0x0, 0xbe86eda9, 0x80000000, 0x3e8f8977, +0x0, 0xbe96fa87, 0x80000000, 0x3e9f831b, +0x0, 0xbea99e6c, 0x80000000, 0x3ecba859, +0x0, 0xbf03440a, 0x80000000, 0x3f286608, +0x0, 0xbf3c0f37, 0x80000000, 0x3f3897c1, +0x0, 0xbf28afae, 0x80000000, 0x3f223c7c, +0x0, 0xbf28a32c, 0x80000000, 0x3f3ecc47, +0x0, 0xbf59b830, 0x80000000, 0x3f738983, +0x0, 0xbf802847, 0x80000000, 0x3f815e28, +0x0, 0xbf7a4bbe, 0x80000000, 0x3f703961, +0x0, 0xbf643801, 0x80000000, 0x3f5cced0, +0x0, 0xbf56c14d, 0x80000000, 0x3f565ef9, +0x0, 0xbf56c5f4, 0x80000000, 0x3f5b1e44, +0x0, 0xbf5dbc24, 0x80000000, 0x3f619100, +0x0, 0xbf6150d1, 0x80000000, 0x3f60ecbc, +0x0, 0xbf5c6b05, 0x80000000, 0x3f58fc39, +0x0, 0xbf5370aa, 0x80000000, 0x3f512d14, +0x0, 0xbf4e978f, 0x80000000, 0x3f50579c, +0x0, 0xbf51f17f, 0x80000000, 0x3f573e48, +0x0, 0xbf5b21cd, 0x80000000, 0x3f612223, +0x0, 0xbf642835, 0x80000000, 0x3f681d5e, +0x0, 0xbf6885bc, 0x80000000, 0x3f69ecda, +0x0, 0xbf684fd6, 0x80000000, 0x3f687927, +0x0, 0xbf666057, 0x80000000, 0x3f669f0b, +0x0, 0xbf64e71c, 0x80000000, 0x3f65926a, +0x0, 0xbf642287, 0x80000000, 0x3f64d9df, +0x0, 0xbf633585, 0x80000000, 0x3f638252, +0x0, 0xbf614d73, 0x80000000, 0x3f60f78c, +0x0, 0xbf5e1e61, 0x80000000, 0x3f5d3336, +0x0, 0xbf59e464, 0x80000000, 0x3f58b51a, +0x0, 0xbf5564fa, 0x80000000, 0x3f5488aa, +0x0, 0xbf51ebbd, 0x80000000, 0x3f522b9c, +0x0, 0xbf5113f3, 0x80000000, 0x3f53388e, +0x0, 0xbf54549c, 0x80000000, 0x3f58e29a, +0x0, 0xbf5c7cd4, 0x80000000, 0x3f6378e5, +0x0, 0xbf6948ec, 0x80000000, 0x3f7216be, +0x0, 0xbf792709, 0x80000000, 0x3f8140b0, +0x0, 0xbf84ab0d, 0x80000000, 0x3f88ce45, +0x0, 0xbf8b478d, 0x80000000, 0x3f8e2359, +0x0, 0xbf8f15ad, 0x80000000, 0x3f9048db, +0x0, 0xbf8f9247, 0x80000000, 0x3f8f3afc, +0x0, 0xbf8d3320, 0x80000000, 0x3f8bd59a, +0x0, 0xbf891b04, 0x80000000, 0x3f875e82, +0x0, 0xbf849157, 0x80000000, 0x3f830265, +0x0, 0xbf809350, 0x80000000, 0x3f7f07d3, +0x0, 0xbf7b4900, 0x80000000, 0x3f7a51fd, +0x0, 0xbf77a651, 0x80000000, 0x3f77a35f, +0x0, 0xbf75b626, 0x80000000, 0x3f76424a, +0x0, 0xbf74a610, 0x80000000, 0x3f755948, +0x0, 0xbf73b40b, 0x80000000, 0x3f744784, +0x0, 0xbf72725c, 0x80000000, 0x3f72d3f1, +0x0, 0xbf70e4e0, 0x80000000, 0x3f713638, +0x0, 0xbf6f7216, 0x80000000, 0x3f6ff879, +0x0, 0xbf6eb679, 0x80000000, 0x3f6fc6ff, +0x0, 0xbf6f4ea9, 0x80000000, 0x3f7139dc, +0x0, 0xbf71adbd, 0x80000000, 0x3f74adab, +0x0, 0xbf760885, 0x80000000, 0x3f7a2950, +0x0, 0xbf7c4ce8, 0x80000000, 0x3f80aa62, +0x0, 0xbf820cad, 0x80000000, 0x3f84c644, +0x0, 0xbf865a25, 0x80000000, 0x3f89040e, +0x0, 0xbf8a89f0, 0x80000000, 0x3f8cf937, +0x0, 0xbf8e1272, 0x80000000, 0x3f902e0e, +0x0, 0xbf9092fc, 0x80000000, 0x3f922366, +0x0, 0xbf91dc2b, 0x80000000, 0x3f928e36, +0x0, 0xbf91c669, 0x80000000, 0x3f918c90, +0x0, 0xbf903642, 0x80000000, 0x3f8f6add, +0x0, 0xbf8d6677, 0x80000000, 0x3f8c575b, +0x0, 0xbf89dfd1, 0x80000000, 0x3f88906c, +0x0, 0xbf8605bc, 0x80000000, 0x3f849665, +0x0, 0xbf8210d7, 0x80000000, 0x3f80cf75, +0x0, 0xbf7ccb1f, 0x80000000, 0x3f7ab17c, +0x0, 0xbf76a732, 0x80000000, 0x3f74e29e, +0x0, 0xbf719ebf, 0x80000000, 0x3f70bd3c, +0x0, 0xbf6dd2a9, 0x80000000, 0x3f6df20a, +0x0, 0xbf6bc015, 0x80000000, 0x3f6c40a2, +0x0, 0xbf6b0f4a, 0x80000000, 0x3f6c0b52, +0x0, 0xbf6b3c0b, 0x80000000, 0x3f6d061f, +0x0, 0xbf6c7e92, 0x80000000, 0x3f6e9687, +0x0, 0xbf6e948e, 0x80000000, 0x3f70d031, +0x0, 0xbf70f4c1, 0x80000000, 0x3f736b54, +0x0, 0xbf739b96, 0x80000000, 0x3f760a68, +0x0, 0xbf7633fd, 0x80000000, 0x3f789f0b, +0x0, 0xbf789bb7, 0x80000000, 0x3f7acc6f, +0x0, 0xbf7abbe0, 0x80000000, 0x3f7caef9, +0x0, 0xbf7c427a, 0x80000000, 0x3f7e2100, +0x0, 0xbf7d7bc6, 0x80000000, 0x3f7ef0e4, +0x0, 0xbf7e2ec1, 0x80000000, 0x3f7f7f04, +0x0, 0xbf7e5cb4, 0x80000000, 0x3f7f871b, +0x0, 0xbf7e5482, 0x80000000, 0x3f7f3953, +0x0, 0xbf7ddc7c, 0x80000000, 0x3f7ebc47, +0x0, 0xbf7d3a64, 0x80000000, 0x3f7df5ab, +0x0, 0xbf7c6f74, 0x80000000, 0x3f7d1eb6, +0x0, 0xbf7b8247, 0x80000000, 0x3f7c2b7a, +0x0, 0xbf7a8d7b, 0x80000000, 0x3f7b2f43, +0x0, 0xbf798c3a, 0x80000000, 0x3f7a2e7a, +0x0, 0xbf788ac9, 0x80000000, 0x3f792def, +0x0, 0xbf778916, 0x80000000, 0x3f787c5b, +0x0, 0xbf776200, 0x80000000, 0x3f787f64, +0x0, 0xbf7760d4, 0x80000000, 0x3f787ffe, +0x0, 0xbf776078, 0x80000000, 0x3f78803b, +0x0, 0xbf77604c, 0x80000000, 0x3f78805c, +0x0, 0xbf776033, 0x80000000, 0x3f78806f, +0x0, 0xbf776023, 0x80000000, 0x3f78807c, +0x0, 0xbf776019, 0x80000000, 0x3f788085, +0x0, 0xbf776011, 0x80000000, 0x3f78808c, +0x0, 0xbf77600b, 0x80000000, 0x3f788091, +0x0, 0xbf776007, 0x80000000, 0x3f788095, +0x0, 0xbf776004, 0x80000000, 0x3f788097, +0x0, 0xbf776001, 0x80000000, 0x3f78809a, +0x0, 0xbf775fff, 0x80000000, 0x3f78809c, +0x0, 0xbf775ffd, 0x80000000, 0x3f78809d, +0x0, 0xbf775ffc, 0x80000000, 0x3f78809e, +0x0, 0xbf775ffb, 0x80000000, 0x3f78809f, +0x0, 0xbf775ffa, 0x80000000, 0x3f7880a0, +0x0, 0xbf775ff9, 0x80000000, 0x3f7880a0, +0x0, 0xbf775ff9, 0x80000000, 0x3f7880a1, +0x0, 0xbf775ff9, 0x80000000, 0x3f7880a1, +0x0, 0xbf775ff9, 0x80000000, 0x3fcb05b8, +0x80000000, 0xbeee4467, 0x80000000, 0x3e9932f9, +0x0, 0xbef0af71, 0x80000000, 0x3f1265c8, +0x0, 0xbee284be, 0x80000000, 0x3f198608, +0x0, 0xbf1a76c6, 0x80000000, 0x3f16b40c, +0x0, 0xbf0faae2, 0x80000000, 0x3f2cef0e, +0x0, 0xbf2d55b8, 0x80000000, 0x3f1ca946, +0x0, 0xbeeb4ea9, 0x80000000, 0x3ed11606, +0x0, 0xbeffebb9, 0x80000000, 0x3f0694f2, +0x0, 0xbeef1542, 0x80000000, 0x3ed02c5c, +0x0, 0xbebf66fa, 0x80000000, 0x3eb92770, +0x0, 0xbeaeead2, 0x80000000, 0x3ea08e82, +0x0, 0xbe936895, 0x80000000, 0x3e971575, +0x0, 0xbea9a969, 0x80000000, 0x3ecb418f, +0x0, 0xbeec6a8c, 0x80000000, 0x3f067b68, +0x0, 0xbf13ac79, 0x80000000, 0x3f22af6d, +0x0, 0xbf307174, 0x80000000, 0x3f3eea66, +0x0, 0xbf48805e, 0x80000000, 0x3f4fce7a, +0x0, 0xbf51e954, 0x80000000, 0x3f5411cd, +0x0, 0xbf53af02, 0x80000000, 0x3f552818, +0x0, 0xbf551cd4, 0x80000000, 0x3f5822c8, +0x0, 0xbf5af5dd, 0x80000000, 0x3f61b27c, +0x0, 0xbf67944c, 0x80000000, 0x3f6f0035, +0x0, 0xbf7210e6, 0x80000000, 0x3f739d04, +0x0, 0xbf6f84d2, 0x80000000, 0x3f6afa60, +0x0, 0xbf63773a, 0x80000000, 0x3f5ea1f7, +0x0, 0xbf595ca4, 0x80000000, 0x3f585d70, +0x0, 0xbf579672, 0x80000000, 0x3f5b1b71, +0x0, 0xbf5e5b2b, 0x80000000, 0x3f6517cf, +0x0, 0xbf6a69e6, 0x80000000, 0x3f71d855, +0x0, 0xbf764ffa, 0x80000000, 0x3f7b5e53, +0x0, 0xbf7c2bb3, 0x80000000, 0x3f7cc6b9, +0x0, 0xbf78ece7, 0x80000000, 0x3f7543e2, +0x0, 0xbf6dfa71, 0x80000000, 0x3f67fb41, +0x0, 0xbf5f799b, 0x80000000, 0x3f594ab7, +0x0, 0xbf516f56, 0x80000000, 0x3f4c8989, +0x0, 0xbf465eef, 0x80000000, 0x3f43673b, +0x0, 0xbf3f4611, 0x80000000, 0x3f3e5c37, +0x0, 0xbf3c3a5c, 0x80000000, 0x3f3d3d3e, +0x0, 0xbf3cedd9, 0x80000000, 0x3f3fabf5, +0x0, 0xbf410104, 0x80000000, 0x3f4552d6, +0x0, 0xbf482b39, 0x80000000, 0x3f4df2a4, +0x0, 0xbf5231c7, 0x80000000, 0x3f594b59, +0x0, 0xbf5eb903, 0x80000000, 0x3f66d9b8, +0x0, 0xbf6d148d, 0x80000000, 0x3f75b6dd, +0x0, 0xbf7c1753, 0x80000000, 0x3f823ef7, +0x0, 0xbf851d75, 0x80000000, 0x3f88ccb7, +0x0, 0xbf8af8b9, 0x80000000, 0x3f8dd423, +0x0, 0xbf8f194d, 0x80000000, 0x3f910a9a, +0x0, 0xbf91716a, 0x80000000, 0x3f92a03d, +0x0, 0xbf9268c2, 0x80000000, 0x3f9324d5, +0x0, 0xbf92a5a3, 0x80000000, 0x3f934371, +0x0, 0xbf92c65e, 0x80000000, 0x3f937f11, +0x0, 0xbf93280f, 0x80000000, 0x3f940915, +0x0, 0xbf93cf3d, 0x80000000, 0x3f94bc82, +0x0, 0xbf94749e, 0x80000000, 0x3f953979, +0x0, 0xbf94aca4, 0x80000000, 0x3f951632, +0x0, 0xbf941d55, 0x80000000, 0x3f94134e, +0x0, 0xbf92ab6b, 0x80000000, 0x3f923c83, +0x0, 0xbf908a86, 0x80000000, 0x3f8fe7c0, +0x0, 0xbf8e2c0c, 0x80000000, 0x3f8d9738, +0x0, 0xbf8c1699, 0x80000000, 0x3f8bcce1, +0x0, 0xbf8abc92, 0x80000000, 0x3f8ae855, +0x0, 0xbf8a5fe1, 0x80000000, 0x3f8b1165, +0x0, 0xbf8b06a9, 0x80000000, 0x3f8c3332, +0x0, 0xbf8c7dbb, 0x80000000, 0x3f8dff3a, +0x0, 0xbf8e6640, 0x80000000, 0x3f8ffd1e, +0x0, 0xbf90489f, 0x80000000, 0x3f91a29d, +0x0, 0xbf91a5bf, 0x80000000, 0x3f927453, +0x0, 0xbf920863, 0x80000000, 0x3f92247f, +0x0, 0xbf911e85, 0x80000000, 0x3f9098a5, +0x0, 0xbf8ed782, 0x80000000, 0x3f8dda10, +0x0, 0xbf8b6c05, 0x80000000, 0x3f8a0fa7, +0x0, 0xbf873d17, 0x80000000, 0x3f858ea4, +0x0, 0xbf82a361, 0x80000000, 0x3f80d106, +0x0, 0xbf7bd6bb, 0x80000000, 0x3f787da4, +0x0, 0xbf72e277, 0x80000000, 0x3f701bf8, +0x0, 0xbf6b220b, 0x80000000, 0x3f68d09d, +0x0, 0xbf64dbb2, 0x80000000, 0x3f631cc7, +0x0, 0xbf5ff96f, 0x80000000, 0x3f5f4a07, +0x0, 0xbf5ca224, 0x80000000, 0x3f5d12fb, +0x0, 0xbf5b2cfc, 0x80000000, 0x3f5c32e4, +0x0, 0xbf5b6b94, 0x80000000, 0x3f5ce3a3, +0x0, 0xbf5cd5a4, 0x80000000, 0x3f5f2996, +0x0, 0xbf5f6437, 0x80000000, 0x3f6270f9, +0x0, 0xbf633409, 0x80000000, 0x3f6676fd, +0x0, 0xbf67c675, 0x80000000, 0x3f6b4ed4, +0x0, 0xbf6cbdb0, 0x80000000, 0x3f708c31, +0x0, 0xbf72136b, 0x80000000, 0x3f75dd69, +0x0, 0xbf7762ea, 0x80000000, 0x3f7b2a9a, +0x0, 0xbf7c7f7f, 0x80000000, 0x3f8003a3, +0x0, 0xbf80a4ff, 0x80000000, 0x3f823dd6, +0x0, 0xbf82a7d1, 0x80000000, 0x3f843389, +0x0, 0xbf846917, 0x80000000, 0x3f85aef2, +0x0, 0xbf85d56f, 0x80000000, 0x3f86e9b0, +0x0, 0xbf86c542, 0x80000000, 0x3f87c8cd, +0x0, 0xbf877eba, 0x80000000, 0x3f883bdb, +0x0, 0xbf87de4f, 0x80000000, 0x3f8885fe, +0x0, 0xbf87efda, 0x80000000, 0x3f88813c, +0x0, 0xbf87e277, 0x80000000, 0x3f884eb1, +0x0, 0xbf879952, 0x80000000, 0x3f880311, +0x0, 0xbf873b65, 0x80000000, 0x3f879327, +0x0, 0xbf86c950, 0x80000000, 0x3f871ba9, +0x0, 0xbf8647a6, 0x80000000, 0x3f86973e, +0x0, 0xbf85c29b, 0x80000000, 0x3f860f3e, +0x0, 0xbf853879, 0x80000000, 0x3f858568, +0x0, 0xbf84ae87, 0x80000000, 0x3f84fc48, +0x0, 0xbf8424d4, 0x80000000, 0x3f849d66, +0x0, 0xbf840fef, 0x80000000, 0x3f849f07, +0x0, 0xbf840f4e, 0x80000000, 0x3f849f5b, +0x0, 0xbf840f1a, 0x80000000, 0x3f849f7e, +0x0, 0xbf840f01, 0x80000000, 0x3f849f90, +0x0, 0xbf840ef3, 0x80000000, 0x3f849f9c, +0x0, 0xbf840ee9, 0x80000000, 0x3f849fa5, +0x0, 0xbf840ee2, 0x80000000, 0x3f849fab, +0x0, 0xbf840edc, 0x80000000, 0x3f849fb0, +0x0, 0xbf840ed8, 0x80000000, 0x3f849fb3, +0x0, 0xbf840ed5, 0x80000000, 0x3f849fb6, +0x0, 0xbf840ed2, 0x80000000, 0x3f849fb9, +0x0, 0xbf840ed0, 0x80000000, 0x3f849fbb, +0x0, 0xbf840ece, 0x80000000, 0x3f849fbd, +0x0, 0xbf840ecc, 0x80000000, 0x3f849fbe, +0x0, 0xbf840ecb, 0x80000000, 0x3f849fbf, +0x0, 0xbf840eca, 0x80000000, 0x3f849fc0, +0x0, 0xbf840ec9, 0x80000000, 0x3f849fc1, +0x0, 0xbf840ec8, 0x80000000, 0x3f849fc2, +0x0, 0xbf840ec8, 0x80000000, 0x3f849fc2, +0x0, 0xbf840ec8, 0x80000000, 0x3f849fc2, +0x0, 0xbf840ec7, 0x80000000, 0x4c46584d, +0xefbeadde, 0x0, +}; +/*------ END OF FILE ------*/ diff --git a/sound/pci/hda/patch_ca0132/speakereq_y.h b/sound/pci/hda/patch_ca0132/speakereq_y.h new file mode 100644 index 0000000..5c2152d --- /dev/null +++ b/sound/pci/hda/patch_ca0132/speakereq_y.h @@ -0,0 +1,272 @@ +/*----------------------------------------------------------------------------- +// Generated by Coff2DspImage V0.4. (built on Thu Oct 28 02:57:27 2010) +// ---- +// Input file: coef_im.o +// Output file: Speaker_EQ_Y.cpp +// On: 2011/01/13 16:07:24 UTC +// ---- +// Copyright (c) 2011, Creative Technology Ltd. +//---------------------------------------------------------------------------*/ + + +const u32 Speaker_EQ_Y[] = { +0x4c46584d, 0x40000, 0x400, 0x3f7880a1, +0xbf8f6831, 0x80000000, 0x3e23112a, 0x0, +0xbee39f86, 0x80000000, 0x3eea1573, 0x0, +0xbf0aa258, 0x80000000, 0x3f3ad61e, 0x0, +0xbf4bc821, 0x80000000, 0x3f308d3f, 0x0, +0xbf431da8, 0x80000000, 0x3f36f372, 0x0, +0xbf5e497e, 0x80000000, 0x3f18cb4d, 0x0, +0xbf1e6872, 0x80000000, 0x3f0645df, 0x0, +0xbf1b97a9, 0x80000000, 0x3f19c10a, 0x0, +0xbf2047ba, 0x80000000, 0x3ef1754c, 0x0, +0xbec791b4, 0x80000000, 0x3e8b3d8b, 0x0, +0xbe91510f, 0x80000000, 0x3e816bb0, 0x0, +0xbe9c066b, 0x80000000, 0x3e9340f7, 0x0, +0xbeaac3d6, 0x80000000, 0x3eafce70, 0x0, +0xbeece184, 0x80000000, 0x3f12e9a5, 0x0, +0xbf38b044, 0x80000000, 0x3f39c7c5, 0x0, +0xbf33aced, 0x80000000, 0x3f20ddb4, 0x0, +0xbf265839, 0x80000000, 0x3f2f8f4f, 0x0, +0xbf4eaf17, 0x80000000, 0x3f650a29, 0x0, +0xbf7e1137, 0x80000000, 0x3f803d7f, 0x0, +0xbf80d55a, 0x80000000, 0x3f732104, 0x0, +0xbf6c460f, 0x80000000, 0x3f5deb83, 0x0, +0xbf5b76bc, 0x80000000, 0x3f540f11, 0x0, +0xbf584dc1, 0x80000000, 0x3f56d0db, 0x0, +0xbf5e67e9, 0x80000000, 0x3f5df17b, 0x0, +0xbf639414, 0x80000000, 0x3f5f95ef, 0x0, +0xbf60a5e1, 0x80000000, 0x3f5907a7, 0x0, +0xbf57d63c, 0x80000000, 0x3f507214, 0x0, +0xbf5141dc, 0x80000000, 0x3f4d97d2, 0x0, +0xbf527c2a, 0x80000000, 0x3f52e79e, 0x0, +0xbf5aa813, 0x80000000, 0x3f5cb50d, 0x0, +0xbf643ce2, 0x80000000, 0x3f64e061, 0x0, +0xbf69e39a, 0x80000000, 0x3f67f90b, 0x0, +0xbf6a8d44, 0x80000000, 0x3f67165f, 0x0, +0xbf68b9f5, 0x80000000, 0x3f652f13, 0x0, +0xbf670004, 0x80000000, 0x3f63f903, 0x0, +0xbf66137b, 0x80000000, 0x3f634ce0, 0x0, +0xbf653e5f, 0x80000000, 0x3f623a2d, 0x0, +0xbf639898, 0x80000000, 0x3f600b28, 0x0, +0xbf60b1d8, 0x80000000, 0x3f5c975a, 0x0, +0xbf5ca505, 0x80000000, 0x3f583c70, 0x0, +0xbf58148e, 0x80000000, 0x3f53e31b, 0x0, +0xbf542d3d, 0x80000000, 0x3f50f232, 0x0, +0xbf527ea1, 0x80000000, 0x3f510906, 0x0, +0xbf5495bc, 0x80000000, 0x3f5580a4, 0x0, +0xbf5b7799, 0x80000000, 0x3f5eeb19, 0x0, +0xbf672bd7, 0x80000000, 0x3f6cb5f8, 0x0, +0xbf76783c, 0x80000000, 0x3f7cf872, 0x0, +0xbf836c9b, 0x80000000, 0x3f865f70, 0x0, +0xbf8a8aa4, 0x80000000, 0x3f8c64b2, 0x0, +0xbf8f1f95, 0x80000000, 0x3f8f637a, 0x0, +0xbf906bda, 0x80000000, 0x3f8f1804, 0x0, +0xbf8eaa11, 0x80000000, 0x3f8c2e5f, 0x0, +0xbf8addfa, 0x80000000, 0x3f87df49, 0x0, +0xbf86520c, 0x80000000, 0x3f8367f7, 0x0, +0xbf821d36, 0x80000000, 0x3f7f527d, 0x0, +0xbf7dc58f, 0x80000000, 0x3f7a0ea9, 0x0, +0xbf7997c7, 0x80000000, 0x3f76f01a, 0x0, +0xbf774a84, 0x80000000, 0x3f755256, 0x0, +0xbf761531, 0x80000000, 0x3f745e3a, 0x0, +0xbf752a22, 0x80000000, 0x3f73602c, 0x0, +0xbf7400ab, 0x80000000, 0x3f7204c5, 0x0, +0xbf727d23, 0x80000000, 0x3f706c59, 0x0, +0xbf70ed99, 0x80000000, 0x3f6f1358, 0x0, +0xbf6fe456, 0x80000000, 0x3f6ea1ff, 0x0, +0xbf7006a4, 0x80000000, 0x3f6fb2c6, 0x0, +0xbf71de58, 0x80000000, 0x3f72a89e, 0x0, +0xbf75bc1c, 0x80000000, 0x3f7799b0, 0x0, +0xbf7ba127, 0x80000000, 0x3f7e4e21, 0x0, +0xbf819693, 0x80000000, 0x3f832684, 0x0, +0xbf85d0b3, 0x80000000, 0x3f8772c6, 0x0, +0xbf8a03f8, 0x80000000, 0x3f8b933b, 0x0, +0xbf8dbdbc, 0x80000000, 0x3f8ef83e, 0x0, +0xbf90a107, 0x80000000, 0x3f912756, 0x0, +0xbf925347, 0x80000000, 0x3f91f431, 0x0, +0xbf928097, 0x80000000, 0x3f917193, 0x0, +0xbf912274, 0x80000000, 0x3f8fab50, 0x0, +0xbf8e995b, 0x80000000, 0x3f8cb8fe, 0x0, +0xbf8b4fcf, 0x80000000, 0x3f890686, 0x0, +0xbf87800d, 0x80000000, 0x3f851c71, 0x0, +0xbf83807b, 0x80000000, 0x3f813e07, 0x0, +0xbf7f9422, 0x80000000, 0x3f7b47a9, 0x0, +0xbf790f10, 0x80000000, 0x3f7559b5, 0x0, +0xbf7384f8, 0x80000000, 0x3f70dd38, 0x0, +0xbf6f8543, 0x80000000, 0x3f6d7fa5, 0x0, +0xbf6d3355, 0x80000000, 0x3f6b8ebe, 0x0, +0xbf6bf9b4, 0x80000000, 0x3f6b38f0, 0x0, +0xbf6bde8b, 0x80000000, 0x3f6bd34c, 0x0, +0xbf6d0ca4, 0x80000000, 0x3f6d2f55, 0x0, +0xbf6ee485, 0x80000000, 0x3f6f6387, 0x0, +0xbf712799, 0x80000000, 0x3f71e785, 0x0, +0xbf73cb82, 0x80000000, 0x3f748d3c, 0x0, +0xbf76640d, 0x80000000, 0x3f77279b, 0x0, +0xbf78e726, 0x80000000, 0x3f796f48, 0x0, +0xbf7b09c2, 0x80000000, 0x3f7b7e17, 0x0, +0xbf7cb603, 0x80000000, 0x3f7cf67b, 0x0, +0xbf7e1629, 0x80000000, 0x3f7df91b, 0x0, +0xbf7ecc00, 0x80000000, 0x3f7ea63b, 0x0, +0xbf7f27fe, 0x80000000, 0x3f7eb8d3, 0x0, +0xbf7f2bbc, 0x80000000, 0x3f7e936a, 0x0, +0xbf7ebe6d, 0x80000000, 0x3f7e1bce, 0x0, +0xbf7e314c, 0x80000000, 0x3f7d651f, 0x0, +0xbf7d6480, 0x80000000, 0x3f7c9915, 0x0, +0xbf7c7f78, 0x80000000, 0x3f7ba8d0, 0x0, +0xbf7b8a32, 0x80000000, 0x3f7ab2b1, 0x0, +0xbf7a888a, 0x80000000, 0x3f79b396, 0x0, +0xbf79853e, 0x80000000, 0x3f78b53f, 0x0, +0xbf787f86, 0x80000000, 0x3f77cdd0, 0x0, +0xbf781632, 0x80000000, 0x3f77cb33, 0x0, +0xbf781469, 0x80000000, 0x3f77cd2f, 0x0, +0xbf78126e, 0x80000000, 0x3f77cf24, 0x0, +0xbf78107f, 0x80000000, 0x3f77d10f, 0x0, +0xbf780e99, 0x80000000, 0x3f77d2f2, 0x0, +0xbf780cb8, 0x80000000, 0x3f77d4d0, 0x0, +0xbf780adc, 0x80000000, 0x3f77d6ab, 0x0, +0xbf780903, 0x80000000, 0x3f77d882, 0x0, +0xbf78072d, 0x80000000, 0x3f77da56, 0x0, +0xbf78055a, 0x80000000, 0x3f77dc29, 0x0, +0xbf780389, 0x80000000, 0x3f77ddf9, 0x0, +0xbf7801b9, 0x80000000, 0x3f77dfc8, 0x0, +0xbf77ffeb, 0x80000000, 0x3f77e195, 0x0, +0xbf77fe1f, 0x80000000, 0x3f77e360, 0x0, +0xbf77fc54, 0x80000000, 0x3f77e52b, 0x0, +0xbf77fa8a, 0x80000000, 0x3f77e6f4, 0x0, +0xbf77f8c1, 0x80000000, 0x3f77e8bd, 0x0, +0xbf77f6f8, 0x80000000, 0x3f77ea85, 0x0, +0xbf77f531, 0x80000000, 0x3f77ec4d, 0x0, +0xbf77f369, 0x80000000, 0x3f77ee14, 0x0, +0xbf77f1a2, 0x80000000, 0x3f77efdb, 0x3f849fc2, +0xbf9849f7, 0x80000000, 0x3e170833, 0x0, +0xbeefd7c0, 0x80000000, 0x3efa10af, 0x0, +0xbf0dacc1, 0x80000000, 0x3ee69f0f, 0x0, +0xbf2cdda2, 0x80000000, 0x3f0c5634, 0x0, +0xbf1b925b, 0x80000000, 0x3f1256f6, 0x0, +0xbf3bcab5, 0x80000000, 0x3f1d71e0, 0x0, +0xbf136e78, 0x80000000, 0x3ec05881, 0x0, +0xbef584d1, 0x80000000, 0x3f00491b, 0x0, +0xbf0697d3, 0x80000000, 0x3ed25faa, 0x0, +0xbed0db4d, 0x80000000, 0x3eb1a6c7, 0x0, +0xbebe896f, 0x80000000, 0x3e9f01b6, 0x0, +0xbea164c7, 0x80000000, 0x3e8aca7b, 0x0, +0xbea635a9, 0x80000000, 0x3eb1fd43, 0x0, +0xbee34cc2, 0x80000000, 0x3ef64ed8, 0x0, +0xbf107cb1, 0x80000000, 0x3f17e0d3, 0x0, +0xbf2cab9a, 0x80000000, 0x3f34f26d, 0x0, +0xbf471972, 0x80000000, 0x3f49d928, 0x0, +0xbf53e77d, 0x80000000, 0x3f507d52, 0x0, +0xbf567925, 0x80000000, 0x3f51e982, 0x0, +0xbf5776bd, 0x80000000, 0x3f541525, 0x0, +0xbf5b979d, 0x80000000, 0x3f5be0d9, 0x0, +0xbf66c290, 0x80000000, 0x3f695853, 0x0, +0xbf72ffc2, 0x80000000, 0x3f714acc, 0x0, +0xbf73f22f, 0x80000000, 0x3f6b882a, 0x0, +0xbf691f83, 0x80000000, 0x3f5f0bf7, 0x0, +0xbf5d8e6e, 0x80000000, 0x3f56cdba, 0x0, +0xbf596c53, 0x80000000, 0x3f576483, 0x0, +0xbf5e3149, 0x80000000, 0x3f5ff56d, 0x0, +0xbf694f5c, 0x80000000, 0x3f6c9c66, 0x0, +0xbf75c5ac, 0x80000000, 0x3f778fe7, 0x0, +0xbf7d8a7d, 0x80000000, 0x3f7b4fea, 0x0, +0xbf7c8e59, 0x80000000, 0x3f75e7cd, 0x0, +0xbf7326a0, 0x80000000, 0x3f69b20f, 0x0, +0xbf6512ef, 0x80000000, 0x3f5b06b5, 0x0, +0xbf5692a7, 0x80000000, 0x3f4d9b51, 0x0, +0xbf4a9554, 0x80000000, 0x3f4386fe, 0x0, +0xbf426bc1, 0x80000000, 0x3f3d7fda, 0x0, +0xbf3e58f4, 0x80000000, 0x3f3b76b9, 0x0, +0xbf3e1d58, 0x80000000, 0x3f3d1393, 0x0, +0xbf415820, 0x80000000, 0x3f41fb0c, 0x0, +0xbf47ba4a, 0x80000000, 0x3f49e9e5, 0x0, +0xbf51076c, 0x80000000, 0x3f54a4f3, 0x0, +0xbf5cf484, 0x80000000, 0x3f61bce1, 0x0, +0xbf6aeabe, 0x80000000, 0x3f706adf, 0x0, +0xbf79dfca, 0x80000000, 0x3f7f6325, 0x0, +0xbf842dbd, 0x80000000, 0x3f868abf, 0x0, +0xbf8a6442, 0x80000000, 0x3f8c0270, 0x0, +0xbf8ef69f, 0x80000000, 0x3f8fb073, 0x0, +0xbf91b868, 0x80000000, 0x3f91a610, 0x0, +0xbf92f709, 0x80000000, 0x3f926138, 0x0, +0xbf934fc0, 0x80000000, 0x3f928cda, 0x0, +0xbf93694a, 0x80000000, 0x3f92bb30, 0x0, +0xbf93b4c9, 0x80000000, 0x3f9333de, 0x0, +0xbf944d12, 0x80000000, 0x3f93e5eb, 0x0, +0xbf94fb01, 0x80000000, 0x3f947c4b, 0x0, +0xbf95573c, 0x80000000, 0x3f948a85, 0x0, +0xbf94fe52, 0x80000000, 0x3f93c2a7, 0x0, +0xbf93c210, 0x80000000, 0x3f921cd4, 0x0, +0xbf91c22d, 0x80000000, 0x3f8fdf01, 0x0, +0xbf8f62f4, 0x80000000, 0x3f8d8504, 0x0, +0xbf8d29a3, 0x80000000, 0x3f8b94ec, 0x0, +0xbf8b90d3, 0x80000000, 0x3f8a78e5, 0x0, +0xbf8ae9ce, 0x80000000, 0x3f8a657a, 0x0, +0xbf8b4cb1, 0x80000000, 0x3f8b516b, 0x0, +0xbf8c97b9, 0x80000000, 0x3f8cf87b, 0x0, +0xbf8e7651, 0x80000000, 0x3f8eecb7, 0x0, +0xbf906fb4, 0x80000000, 0x3f90af10, 0x0, +0xbf91f90e, 0x80000000, 0x3f91c8ec, 0x0, +0xbf929161, 0x80000000, 0x3f91ddcc, 0x0, +0xbf91e788, 0x80000000, 0x3f90b1ae, 0x0, +0xbf8ff10e, 0x80000000, 0x3f8e3384, 0x0, +0xbf8cdabb, 0x80000000, 0x3f8a8f03, 0x0, +0xbf88e420, 0x80000000, 0x3f862cd2, 0x0, +0xbf845586, 0x80000000, 0x3f81818d, 0x0, +0xbf7f23b8, 0x80000000, 0x3f79bc98, 0x0, +0xbf761436, 0x80000000, 0x3f7101b5, 0x0, +0xbf6e1043, 0x80000000, 0x3f697015, 0x0, +0xbf673eec, 0x80000000, 0x3f638972, 0x0, +0xbf61d331, 0x80000000, 0x3f5f47bc, 0x0, +0xbf5e387c, 0x80000000, 0x3f5c7056, 0x0, +0xbf5c7fcc, 0x80000000, 0x3f5b2f5d, 0x0, +0xbf5c32f4, 0x80000000, 0x3f5bbc24, 0x0, +0xbf5d2302, 0x80000000, 0x3f5dacd2, 0x0, +0xbf5f8bd1, 0x80000000, 0x3f608aa7, 0x0, +0xbf632be9, 0x80000000, 0x3f64703b, 0x0, +0xbf6771ae, 0x80000000, 0x3f693726, 0x0, +0xbf6c50a3, 0x80000000, 0x3f6e5492, 0x0, +0xbf719f32, 0x80000000, 0x3f73aabb, 0x0, +0xbf76ec72, 0x80000000, 0x3f78fd88, 0x0, +0xbf7c26f1, 0x80000000, 0x3f7df6d8, 0x0, +0xbf807bb9, 0x80000000, 0x3f815331, 0x0, +0xbf829420, 0x80000000, 0x3f834ed1, 0x0, +0xbf847751, 0x80000000, 0x3f84e85a, 0x0, +0xbf85e6b5, 0x80000000, 0x3f864657, 0x0, +0xbf86f5e8, 0x80000000, 0x3f8729b5, 0x0, +0xbf87c9a5, 0x80000000, 0x3f87be49, 0x0, +0xbf882b8a, 0x80000000, 0x3f881a64, 0x0, +0xbf885856, 0x80000000, 0x3f881bae, 0x0, +0xbf885154, 0x80000000, 0x3f87fea2, 0x0, +0xbf880e01, 0x80000000, 0x3f87b5a5, 0x0, +0xbf87ba6e, 0x80000000, 0x3f874d99, 0x0, +0xbf874768, 0x80000000, 0x3f86db29, 0x0, +0xbf86c960, 0x80000000, 0x3f865830, 0x0, +0xbf8643ee, 0x80000000, 0x3f85d2d9, 0x0, +0xbf85b97a, 0x80000000, 0x3f8549d5, 0x0, +0xbf852e6f, 0x80000000, 0x3f84c1af, 0x0, +0xbf84a2a5, 0x80000000, 0x3f8445f7, 0x0, +0xbf846a6c, 0x80000000, 0x3f844483, 0x0, +0xbf846987, 0x80000000, 0x3f844584, 0x0, +0xbf846886, 0x80000000, 0x3f844682, 0x0, +0xbf84678b, 0x80000000, 0x3f84477a, 0x0, +0xbf846695, 0x80000000, 0x3f84486e, 0x0, +0xbf8465a2, 0x80000000, 0x3f844960, 0x0, +0xbf8464b2, 0x80000000, 0x3f844a50, 0x0, +0xbf8463c3, 0x80000000, 0x3f844b3e, 0x0, +0xbf8462d5, 0x80000000, 0x3f844c2b, 0x0, +0xbf8461e9, 0x80000000, 0x3f844d16, 0x0, +0xbf8460fe, 0x80000000, 0x3f844e01, 0x0, +0xbf846014, 0x80000000, 0x3f844eeb, 0x0, +0xbf845f2a, 0x80000000, 0x3f844fd4, 0x0, +0xbf845e42, 0x80000000, 0x3f8450bc, 0x0, +0xbf845d5a, 0x80000000, 0x3f8451a4, 0x0, +0xbf845c72, 0x80000000, 0x3f84528b, 0x0, +0xbf845b8b, 0x80000000, 0x3f845372, 0x0, +0xbf845aa4, 0x80000000, 0x3f845459, 0x0, +0xbf8459be, 0x80000000, 0x3f84553f, 0x0, +0xbf8458d8, 0x80000000, 0x3f845625, 0x0, +0xbf8457f1, 0x80000000, 0x3f84570b, 0x4c46584d, +0xefbeadde, 0x0, +}; +/*------ END OF FILE ------*/
At Fri, 11 May 2012 19:33:33 -0700, Ian Minett wrote:
Please find attached a patch to update the CA0132 HDA ALSA codec. We would appreciate any feedback or comments.
Thanks for the patch.
For merging to the upstream, could you try the following?
- Split this giant patch into separate patches in the logical order. That is, create a single patch for each changed item you wrote below.
- Don't mix up the current code; CTHDA fix in hda_intel.c is already in the upstream tree. Check topic/hda branch of sound git tree and work your patches based on that branch. git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound.git
- The spinlock change in the trigger callback is superfluous. The trigger callback is guaranteed to be atomic (in this context, non-schedulabe) in ALSA core side.
- I guess moving the code into a sub-directory will break the built-in kernel case. When you build HD-audio driver in kernel instead of modules, the order of the object linking becomes important. snd-hda-codec.o and snd-hda-intel.o must be linked at last after other codec drivers.
So, if you use a sub-directory, please check whether it still work as a built-in kernel.
- If a sub-directory is OK, choose a name like "ca0132". patch_ prefix doesn't look sexy as a directory name.
- try to make the coding-style consistent with others. You should check the code via scripts/checkpatch.pl. Fix all errors (and possibly warnings). A variable name like DspImage_dsp_os[] is no-go.
- When the size of a DSP code is significant large, consider using request_firmware() instead of a built-in binary blob. I guess one when the DSP arrays are moved to separate firmware files, no big reason to keep patch_ca0132.c in a separate sub-directory.
thanks,
Takashi
Thanks very much, Ian
ALSA: Update Creative CA0132 HDA codec to introduce DSP features.
patch_ca0132.c:
- Add DSP support to codec.
- 3 capture subdevices supported: Analog Mic1/Digital Mic,
Analog Mic2 and What U Hear.
Makefile:
- Move CA0132 to subdirectory to collect source files together.
hda_intel.c:
- Add CTHDA chip support
- in azx_pcm_trigger(), change spin_lock()/spin_unlock() pair to
spin_lock_irqsave()/spin_unlock_irqrestore(). Reason is that if interrupt occurs after azx_stream_start() and before spin_unlock(), it will cause deadlock as azx_interrupt() also acquires chip->reg_lock.
hda_codec.c:
- in snd_hda_calc_stream_format(), change max channels to 16 to
facilitate DSP download.
Developed and maintained by Creative Labs, Inc.
Signed-off-by: Ian Minett ian_minett@creativelabs.com
diff --git a/sound/pci/hda/Makefile b/sound/pci/hda/Makefile index ace157c..ed91188 100644 --- a/sound/pci/hda/Makefile +++ b/sound/pci/hda/Makefile @@ -16,7 +16,6 @@ snd-hda-codec-idt-objs := patch_sigmatel.o snd-hda-codec-si3054-objs := patch_si3054.o snd-hda-codec-cirrus-objs := patch_cirrus.o snd-hda-codec-ca0110-objs := patch_ca0110.o -snd-hda-codec-ca0132-objs := patch_ca0132.o snd-hda-codec-conexant-objs := patch_conexant.o snd-hda-codec-via-objs := patch_via.o snd-hda-codec-hdmi-objs := patch_hdmi.o hda_eld.o @@ -47,7 +46,7 @@ ifdef CONFIG_SND_HDA_CODEC_CA0110 obj-$(CONFIG_SND_HDA_INTEL) += snd-hda-codec-ca0110.o endif ifdef CONFIG_SND_HDA_CODEC_CA0132 -obj-$(CONFIG_SND_HDA_INTEL) += snd-hda-codec-ca0132.o +obj-$(CONFIG_SND_HDA_INTEL) += patch_ca0132/ endif ifdef CONFIG_SND_HDA_CODEC_CONEXANT obj-$(CONFIG_SND_HDA_INTEL) += snd-hda-codec-conexant.o diff --git a/sound/pci/hda/hda_codec.c b/sound/pci/hda/hda_codec.c index 0c0ac0e..5db9988 100644 --- a/sound/pci/hda/hda_codec.c +++ b/sound/pci/hda/hda_codec.c @@ -3525,7 +3525,7 @@ unsigned int snd_hda_calc_stream_format(unsigned int rate, return 0; }
- if (channels == 0 || channels > 8) {
- if (channels == 0 || channels > 16) { snd_printdd("invalid channels %d\n", channels); return 0; }
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index c19e71a..44bd409 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c @@ -497,6 +497,7 @@ enum { AZX_DRIVER_NVIDIA, AZX_DRIVER_TERA, AZX_DRIVER_CTX,
- AZX_DRIVER_CTHDA, AZX_DRIVER_GENERIC, AZX_NUM_DRIVERS, /* keep this as last entry */
}; @@ -533,6 +534,10 @@ enum { (AZX_DCAPS_NVIDIA_SNOOP | AZX_DCAPS_RIRB_DELAY | AZX_DCAPS_NO_MSI |\ AZX_DCAPS_ALIGN_BUFSIZE)
+/* quirks for Creative CTHDA */ +#define AZX_DCAPS_PRESET_CTHDA \
- (AZX_DCAPS_NO_MSI | AZX_DCAPS_POSFIX_LPIB | AZX_DCAPS_ALIGN_BUFSIZE)
static char *driver_short_names[] __devinitdata = { [AZX_DRIVER_ICH] = "HDA Intel", [AZX_DRIVER_PCH] = "HDA Intel PCH", @@ -546,6 +551,7 @@ static char *driver_short_names[] __devinitdata = { [AZX_DRIVER_NVIDIA] = "HDA NVidia", [AZX_DRIVER_TERA] = "HDA Teradici", [AZX_DRIVER_CTX] = "HDA Creative",
- [AZX_DRIVER_CTHDA] = "HDA Creative", [AZX_DRIVER_GENERIC] = "HD-Audio Generic",
};
@@ -1283,7 +1289,7 @@ static irqreturn_t azx_interrupt(int irq, void *dev_id) /*
- set up a BDL entry
*/ -static int setup_bdle(struct snd_pcm_substream *substream, +static int setup_bdle(struct azx *chip, struct snd_pcm_substream *substream, struct azx_dev *azx_dev, u32 **bdlp, int ofs, int size, int with_ioc) { @@ -1302,6 +1308,12 @@ static int setup_bdle(struct snd_pcm_substream *substream, bdl[1] = cpu_to_le32(upper_32_bits(addr)); /* program the size field of the BDL entry */ chunk = snd_pcm_sgbuf_get_chunk_size(substream, ofs, size);
/* one BDLE cannot cross 4K boundary on CTHDA chips */
if (chip->driver_type == AZX_DRIVER_CTHDA) {
u32 remain = 0x1000 - (ofs & 0xfff);
if (chunk > remain)
chunk = remain;
bdl[2] = cpu_to_le32(chunk); /* program the IOC to enable interrupt}
- only when the whole fragment is processed
@@ -1354,7 +1366,7 @@ static int azx_setup_periods(struct azx *chip, bdl_pos_adj[chip->dev_index]); pos_adj = 0; } else {
ofs = setup_bdle(substream, azx_dev,
ofs = setup_bdle(chip, substream, azx_dev, &bdl, ofs, pos_adj, !substream->runtime->no_period_wakeup); if (ofs < 0)
@@ -1364,10 +1376,10 @@ static int azx_setup_periods(struct azx *chip, pos_adj = 0; for (i = 0; i < periods; i++) { if (i == periods - 1 && pos_adj)
ofs = setup_bdle(substream, azx_dev, &bdl, ofs,
elseofs = setup_bdle(chip, substream, azx_dev, &bdl, ofs, period_bytes - pos_adj, 0);
ofs = setup_bdle(substream, azx_dev, &bdl, ofs,
if (ofs < 0)ofs = setup_bdle(chip, substream, azx_dev, &bdl, ofs, period_bytes, !substream->runtime->no_period_wakeup);
@@ -1877,6 +1889,7 @@ static int azx_pcm_trigger(struct snd_pcm_substream *substream, int cmd) struct snd_pcm_substream *s; int rstart = 0, start, nsync = 0, sbits = 0; int nwait, timeout;
unsigned long flags;
switch (cmd) { case SNDRV_PCM_TRIGGER_START:
@@ -1903,7 +1916,7 @@ static int azx_pcm_trigger(struct snd_pcm_substream *substream, int cmd) snd_pcm_trigger_done(s, substream); }
- spin_lock(&chip->reg_lock);
- spin_lock_irqsave(&chip->reg_lock, flags); if (nsync > 1) { /* first, set SYNC bits of corresponding streams */ if (chip->driver_caps & AZX_DCAPS_OLD_SSYNC)
@@ -1927,7 +1940,7 @@ static int azx_pcm_trigger(struct snd_pcm_substream *substream, int cmd) } azx_dev->running = start; }
- spin_unlock(&chip->reg_lock);
- spin_unlock_irqrestore(&chip->reg_lock, flags); if (start) { if (nsync == 1) return 0;
@@ -2611,7 +2624,7 @@ static void __devinit check_msi(struct azx *chip) return; }
- /* NVidia chipsets seem to cause troubles with MSI */
- /* NVidia and CTHDA chipsets seem to cause troubles with MSI */ if (chip->driver_caps & AZX_DCAPS_NO_MSI) { printk(KERN_INFO "hda_intel: Disabling MSI\n"); chip->msi = 0;
@@ -3116,6 +3129,11 @@ static DEFINE_PCI_DEVICE_TABLE(azx_ids) = { .driver_data = AZX_DRIVER_CTX | AZX_DCAPS_CTX_WORKAROUND | AZX_DCAPS_RIRB_PRE_DELAY | AZX_DCAPS_POSFIX_LPIB }, #endif
- /* CTHDA chips */
- { PCI_DEVICE(0x1102, 0x0010),
.driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
- { PCI_DEVICE(0x1102, 0x0012),
/* Vortex86MX */ { PCI_DEVICE(0x17f3, 0x3010), .driver_data = AZX_DRIVER_GENERIC }, /* VMware HDAudio */.driver_data = AZX_DRIVER_CTHDA | AZX_DCAPS_PRESET_CTHDA },
diff --git a/sound/pci/hda/patch_ca0132.c b/sound/pci/hda/patch_ca0132.c deleted file mode 100644 index 21d91d5..0000000 --- a/sound/pci/hda/patch_ca0132.c +++ /dev/null @@ -1,1103 +0,0 @@ -/*
- HD audio interface patch for Creative CA0132 chip
- Copyright (c) 2011, Creative Technology Ltd.
- Based on patch_ca0110.c
- Copyright (c) 2008 Takashi Iwai tiwai@suse.de
- This driver is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
- This driver is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
-#include <linux/init.h> -#include <linux/delay.h> -#include <linux/slab.h> -#include <linux/pci.h> -#include <linux/mutex.h> -#include <linux/module.h> -#include <sound/core.h> -#include "hda_codec.h" -#include "hda_local.h"
-#define WIDGET_CHIP_CTRL 0x15 -#define WIDGET_DSP_CTRL 0x16
-#define WUH_MEM_CONNID 10 -#define DSP_MEM_CONNID 16
-enum hda_cmd_vendor_io {
- /* for DspIO node */
- VENDOR_DSPIO_SCP_WRITE_DATA_LOW = 0x000,
- VENDOR_DSPIO_SCP_WRITE_DATA_HIGH = 0x100,
- VENDOR_DSPIO_STATUS = 0xF01,
- VENDOR_DSPIO_SCP_POST_READ_DATA = 0x702,
- VENDOR_DSPIO_SCP_READ_DATA = 0xF02,
- VENDOR_DSPIO_DSP_INIT = 0x703,
- VENDOR_DSPIO_SCP_POST_COUNT_QUERY = 0x704,
- VENDOR_DSPIO_SCP_READ_COUNT = 0xF04,
- /* for ChipIO node */
- VENDOR_CHIPIO_ADDRESS_LOW = 0x000,
- VENDOR_CHIPIO_ADDRESS_HIGH = 0x100,
- VENDOR_CHIPIO_STREAM_FORMAT = 0x200,
- VENDOR_CHIPIO_DATA_LOW = 0x300,
- VENDOR_CHIPIO_DATA_HIGH = 0x400,
- VENDOR_CHIPIO_GET_PARAMETER = 0xF00,
- VENDOR_CHIPIO_STATUS = 0xF01,
- VENDOR_CHIPIO_HIC_POST_READ = 0x702,
- VENDOR_CHIPIO_HIC_READ_DATA = 0xF03,
- VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE = 0x70A,
- VENDOR_CHIPIO_PLL_PMU_WRITE = 0x70C,
- VENDOR_CHIPIO_PLL_PMU_READ = 0xF0C,
- VENDOR_CHIPIO_8051_ADDRESS_LOW = 0x70D,
- VENDOR_CHIPIO_8051_ADDRESS_HIGH = 0x70E,
- VENDOR_CHIPIO_FLAG_SET = 0x70F,
- VENDOR_CHIPIO_FLAGS_GET = 0xF0F,
- VENDOR_CHIPIO_PARAMETER_SET = 0x710,
- VENDOR_CHIPIO_PARAMETER_GET = 0xF10,
- VENDOR_CHIPIO_PORT_ALLOC_CONFIG_SET = 0x711,
- VENDOR_CHIPIO_PORT_ALLOC_SET = 0x712,
- VENDOR_CHIPIO_PORT_ALLOC_GET = 0xF12,
- VENDOR_CHIPIO_PORT_FREE_SET = 0x713,
- VENDOR_CHIPIO_PARAMETER_EX_ID_GET = 0xF17,
- VENDOR_CHIPIO_PARAMETER_EX_ID_SET = 0x717,
- VENDOR_CHIPIO_PARAMETER_EX_VALUE_GET = 0xF18,
- VENDOR_CHIPIO_PARAMETER_EX_VALUE_SET = 0x718
-};
-/*
- Control flag IDs
- */
-enum control_flag_id {
- /* Connection manager stream setup is bypassed/enabled */
- CONTROL_FLAG_C_MGR = 0,
- /* DSP DMA is bypassed/enabled */
- CONTROL_FLAG_DMA = 1,
- /* 8051 'idle' mode is disabled/enabled */
- CONTROL_FLAG_IDLE_ENABLE = 2,
- /* Tracker for the SPDIF-in path is bypassed/enabled */
- CONTROL_FLAG_TRACKER = 3,
- /* DigitalOut to Spdif2Out connection is disabled/enabled */
- CONTROL_FLAG_SPDIF2OUT = 4,
- /* Digital Microphone is disabled/enabled */
- CONTROL_FLAG_DMIC = 5,
- /* ADC_B rate is 48 kHz/96 kHz */
- CONTROL_FLAG_ADC_B_96KHZ = 6,
- /* ADC_C rate is 48 kHz/96 kHz */
- CONTROL_FLAG_ADC_C_96KHZ = 7,
- /* DAC rate is 48 kHz/96 kHz (affects all DACs) */
- CONTROL_FLAG_DAC_96KHZ = 8,
- /* DSP rate is 48 kHz/96 kHz */
- CONTROL_FLAG_DSP_96KHZ = 9,
- /* SRC clock is 98 MHz/196 MHz (196 MHz forces rate to 96 KHz) */
- CONTROL_FLAG_SRC_CLOCK_196MHZ = 10,
- /* SRC rate is 48 kHz/96 kHz (48 kHz disabled when clock is 196 MHz) */
- CONTROL_FLAG_SRC_RATE_96KHZ = 11,
- /* Decode Loop (DSP->SRC->DSP) is disabled/enabled */
- CONTROL_FLAG_DECODE_LOOP = 12,
- /* De-emphasis filter on DAC-1 disabled/enabled */
- CONTROL_FLAG_DAC1_DEEMPHASIS = 13,
- /* De-emphasis filter on DAC-2 disabled/enabled */
- CONTROL_FLAG_DAC2_DEEMPHASIS = 14,
- /* De-emphasis filter on DAC-3 disabled/enabled */
- CONTROL_FLAG_DAC3_DEEMPHASIS = 15,
- /* High-pass filter on ADC_B disabled/enabled */
- CONTROL_FLAG_ADC_B_HIGH_PASS = 16,
- /* High-pass filter on ADC_C disabled/enabled */
- CONTROL_FLAG_ADC_C_HIGH_PASS = 17,
- /* Common mode on Port_A disabled/enabled */
- CONTROL_FLAG_PORT_A_COMMON_MODE = 18,
- /* Common mode on Port_D disabled/enabled */
- CONTROL_FLAG_PORT_D_COMMON_MODE = 19,
- /* Impedance for ramp generator on Port_A 16 Ohm/10K Ohm */
- CONTROL_FLAG_PORT_A_10KOHM_LOAD = 20,
- /* Impedance for ramp generator on Port_D, 16 Ohm/10K Ohm */
- CONTROL_FLAG_PORT_D_10K0HM_LOAD = 21,
- /* ASI rate is 48kHz/96kHz */
- CONTROL_FLAG_ASI_96KHZ = 22,
- /* DAC power settings able to control attached ports no/yes */
- CONTROL_FLAG_DACS_CONTROL_PORTS = 23,
- /* Clock Stop OK reporting is disabled/enabled */
- CONTROL_FLAG_CONTROL_STOP_OK_ENABLE = 24,
- /* Number of control flags */
- CONTROL_FLAGS_MAX = (CONTROL_FLAG_CONTROL_STOP_OK_ENABLE+1)
-};
-/*
- Control parameter IDs
- */
-enum control_parameter_id {
- /* 0: force HDA, 1: allow DSP if HDA Spdif1Out stream is idle */
- CONTROL_PARAM_SPDIF1_SOURCE = 2,
- /* Stream Control */
- /* Select stream with the given ID */
- CONTROL_PARAM_STREAM_ID = 24,
- /* Source connection point for the selected stream */
- CONTROL_PARAM_STREAM_SOURCE_CONN_POINT = 25,
- /* Destination connection point for the selected stream */
- CONTROL_PARAM_STREAM_DEST_CONN_POINT = 26,
- /* Number of audio channels in the selected stream */
- CONTROL_PARAM_STREAMS_CHANNELS = 27,
- /*Enable control for the selected stream */
- CONTROL_PARAM_STREAM_CONTROL = 28,
- /* Connection Point Control */
- /* Select connection point with the given ID */
- CONTROL_PARAM_CONN_POINT_ID = 29,
- /* Connection point sample rate */
- CONTROL_PARAM_CONN_POINT_SAMPLE_RATE = 30,
- /* Node Control */
- /* Select HDA node with the given ID */
- CONTROL_PARAM_NODE_ID = 31
-};
-/*
- Dsp Io Status codes
- */
-enum hda_vendor_status_dspio {
- /* Success */
- VENDOR_STATUS_DSPIO_OK = 0x00,
- /* Busy, unable to accept new command, the host must retry */
- VENDOR_STATUS_DSPIO_BUSY = 0x01,
- /* SCP command queue is full */
- VENDOR_STATUS_DSPIO_SCP_COMMAND_QUEUE_FULL = 0x02,
- /* SCP response queue is empty */
- VENDOR_STATUS_DSPIO_SCP_RESPONSE_QUEUE_EMPTY = 0x03
-};
-/*
- Chip Io Status codes
- */
-enum hda_vendor_status_chipio {
- /* Success */
- VENDOR_STATUS_CHIPIO_OK = 0x00,
- /* Busy, unable to accept new command, the host must retry */
- VENDOR_STATUS_CHIPIO_BUSY = 0x01
-};
-/*
- CA0132 sample rate
- */
-enum ca0132_sample_rate {
- SR_6_000 = 0x00,
- SR_8_000 = 0x01,
- SR_9_600 = 0x02,
- SR_11_025 = 0x03,
- SR_16_000 = 0x04,
- SR_22_050 = 0x05,
- SR_24_000 = 0x06,
- SR_32_000 = 0x07,
- SR_44_100 = 0x08,
- SR_48_000 = 0x09,
- SR_88_200 = 0x0A,
- SR_96_000 = 0x0B,
- SR_144_000 = 0x0C,
- SR_176_400 = 0x0D,
- SR_192_000 = 0x0E,
- SR_384_000 = 0x0F,
- SR_COUNT = 0x10,
- SR_RATE_UNKNOWN = 0x1F
-};
-/*
- Scp Helper function
- */
-enum get_set {
- IS_SET = 0,
- IS_GET = 1,
-};
-/*
- Duplicated from ca0110 codec
- */
-static void init_output(struct hda_codec *codec, hda_nid_t pin, hda_nid_t dac) -{
- if (pin) {
snd_hda_codec_write(codec, pin, 0,
AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP);
if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
snd_hda_codec_write(codec, pin, 0,
AC_VERB_SET_AMP_GAIN_MUTE,
AMP_OUT_UNMUTE);
- }
- if (dac)
snd_hda_codec_write(codec, dac, 0,
AC_VERB_SET_AMP_GAIN_MUTE, AMP_OUT_ZERO);
-}
-static void init_input(struct hda_codec *codec, hda_nid_t pin, hda_nid_t adc) -{
- if (pin) {
snd_hda_codec_write(codec, pin, 0,
AC_VERB_SET_PIN_WIDGET_CONTROL,
PIN_VREF80);
if (get_wcaps(codec, pin) & AC_WCAP_IN_AMP)
snd_hda_codec_write(codec, pin, 0,
AC_VERB_SET_AMP_GAIN_MUTE,
AMP_IN_UNMUTE(0));
- }
- if (adc)
snd_hda_codec_write(codec, adc, 0, AC_VERB_SET_AMP_GAIN_MUTE,
AMP_IN_UNMUTE(0));
-}
-static char *dirstr[2] = { "Playback", "Capture" };
-static int _add_switch(struct hda_codec *codec, hda_nid_t nid, const char *pfx,
int chan, int dir)
-{
- char namestr[44];
- int type = dir ? HDA_INPUT : HDA_OUTPUT;
- struct snd_kcontrol_new knew =
HDA_CODEC_MUTE_MONO(namestr, nid, chan, 0, type);
- sprintf(namestr, "%s %s Switch", pfx, dirstr[dir]);
- return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec));
-}
-static int _add_volume(struct hda_codec *codec, hda_nid_t nid, const char *pfx,
int chan, int dir)
-{
- char namestr[44];
- int type = dir ? HDA_INPUT : HDA_OUTPUT;
- struct snd_kcontrol_new knew =
HDA_CODEC_VOLUME_MONO(namestr, nid, chan, 0, type);
- sprintf(namestr, "%s %s Volume", pfx, dirstr[dir]);
- return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec));
-}
-#define add_out_switch(codec, nid, pfx) _add_switch(codec, nid, pfx, 3, 0) -#define add_out_volume(codec, nid, pfx) _add_volume(codec, nid, pfx, 3, 0) -#define add_in_switch(codec, nid, pfx) _add_switch(codec, nid, pfx, 3, 1) -#define add_in_volume(codec, nid, pfx) _add_volume(codec, nid, pfx, 3, 1) -#define add_mono_switch(codec, nid, pfx, chan) \
- _add_switch(codec, nid, pfx, chan, 0)
-#define add_mono_volume(codec, nid, pfx, chan) \
- _add_volume(codec, nid, pfx, chan, 0)
-#define add_in_mono_switch(codec, nid, pfx, chan) \
- _add_switch(codec, nid, pfx, chan, 1)
-#define add_in_mono_volume(codec, nid, pfx, chan) \
- _add_volume(codec, nid, pfx, chan, 1)
-/*
- CA0132 specific
- */
-struct ca0132_spec {
- struct auto_pin_cfg autocfg;
- struct hda_multi_out multiout;
- hda_nid_t out_pins[AUTO_CFG_MAX_OUTS];
- hda_nid_t dacs[AUTO_CFG_MAX_OUTS];
- hda_nid_t hp_dac;
- hda_nid_t input_pins[AUTO_PIN_LAST];
- hda_nid_t adcs[AUTO_PIN_LAST];
- hda_nid_t dig_out;
- hda_nid_t dig_in;
- unsigned int num_inputs;
- long curr_hp_switch;
- long curr_hp_volume[2];
- long curr_speaker_switch;
- struct mutex chipio_mutex;
- const char *input_labels[AUTO_PIN_LAST];
- struct hda_pcm pcm_rec[2]; /* PCM information */
-};
-/* Chip access helper function */ -static int chipio_send(struct hda_codec *codec,
unsigned int reg,
unsigned int data)
-{
- unsigned int res;
- int retry = 50;
- /* send bits of data specified by reg */
- do {
res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0,
reg, data);
if (res == VENDOR_STATUS_CHIPIO_OK)
return 0;
- } while (--retry);
- return -EIO;
-}
-/*
- Write chip address through the vendor widget -- NOT protected by the Mutex!
- */
-static int chipio_write_address(struct hda_codec *codec,
unsigned int chip_addx)
-{
- int res;
- /* send low 16 bits of the address */
- res = chipio_send(codec, VENDOR_CHIPIO_ADDRESS_LOW,
chip_addx & 0xffff);
- if (res != -EIO) {
/* send high 16 bits of the address */
res = chipio_send(codec, VENDOR_CHIPIO_ADDRESS_HIGH,
chip_addx >> 16);
- }
- return res;
-}
-/*
- Write data through the vendor widget -- NOT protected by the Mutex!
- */
-static int chipio_write_data(struct hda_codec *codec, unsigned int data) -{
- int res;
- /* send low 16 bits of the data */
- res = chipio_send(codec, VENDOR_CHIPIO_DATA_LOW, data & 0xffff);
- if (res != -EIO) {
/* send high 16 bits of the data */
res = chipio_send(codec, VENDOR_CHIPIO_DATA_HIGH,
data >> 16);
- }
- return res;
-}
-/*
- Read data through the vendor widget -- NOT protected by the Mutex!
- */
-static int chipio_read_data(struct hda_codec *codec, unsigned int *data) -{
- int res;
- /* post read */
- res = chipio_send(codec, VENDOR_CHIPIO_HIC_POST_READ, 0);
- if (res != -EIO) {
/* read status */
res = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0);
- }
- if (res != -EIO) {
/* read data */
*data = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0,
VENDOR_CHIPIO_HIC_READ_DATA,
0);
- }
- return res;
-}
-/*
- Write given value to the given address through the chip I/O widget.
- protected by the Mutex
- */
-static int chipio_write(struct hda_codec *codec,
unsigned int chip_addx, const unsigned int data)
-{
- struct ca0132_spec *spec = codec->spec;
- int err;
- mutex_lock(&spec->chipio_mutex);
- /* write the address, and if successful proceed to write data */
- err = chipio_write_address(codec, chip_addx);
- if (err < 0)
goto exit;
- err = chipio_write_data(codec, data);
- if (err < 0)
goto exit;
-exit:
- mutex_unlock(&spec->chipio_mutex);
- return err;
-}
-/*
- Read the given address through the chip I/O widget
- protected by the Mutex
- */
-static int chipio_read(struct hda_codec *codec,
unsigned int chip_addx, unsigned int *data)
-{
- struct ca0132_spec *spec = codec->spec;
- int err;
- mutex_lock(&spec->chipio_mutex);
- /* write the address, and if successful proceed to write data */
- err = chipio_write_address(codec, chip_addx);
- if (err < 0)
goto exit;
- err = chipio_read_data(codec, data);
- if (err < 0)
goto exit;
-exit:
- mutex_unlock(&spec->chipio_mutex);
- return err;
-}
-/*
- PCM stuffs
- */
-static void ca0132_setup_stream(struct hda_codec *codec, hda_nid_t nid,
u32 stream_tag,
int channel_id, int format)
-{
- unsigned int oldval, newval;
- if (!nid)
return;
- snd_printdd("ca0132_setup_stream: "
"NID=0x%x, stream=0x%x, channel=%d, format=0x%x\n",
nid, stream_tag, channel_id, format);
- /* update the format-id if changed */
- oldval = snd_hda_codec_read(codec, nid, 0,
AC_VERB_GET_STREAM_FORMAT,
0);
- if (oldval != format) {
msleep(20);
snd_hda_codec_write(codec, nid, 0,
AC_VERB_SET_STREAM_FORMAT,
format);
- }
- oldval = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_CONV, 0);
- newval = (stream_tag << 4) | channel_id;
- if (oldval != newval) {
snd_hda_codec_write(codec, nid, 0,
AC_VERB_SET_CHANNEL_STREAMID,
newval);
- }
-}
-static void ca0132_cleanup_stream(struct hda_codec *codec, hda_nid_t nid) -{
- snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_STREAM_FORMAT, 0);
- snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
-}
-/*
- PCM callbacks
- */
-static int ca0132_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
unsigned int stream_tag,
unsigned int format,
struct snd_pcm_substream *substream)
-{
- struct ca0132_spec *spec = codec->spec;
- ca0132_setup_stream(codec, spec->dacs[0], stream_tag, 0, format);
- return 0;
-}
-static int ca0132_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
struct snd_pcm_substream *substream)
-{
- struct ca0132_spec *spec = codec->spec;
- ca0132_cleanup_stream(codec, spec->dacs[0]);
- return 0;
-}
-/*
- Digital out
- */
-static int ca0132_dig_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
unsigned int stream_tag,
unsigned int format,
struct snd_pcm_substream *substream)
-{
- struct ca0132_spec *spec = codec->spec;
- ca0132_setup_stream(codec, spec->dig_out, stream_tag, 0, format);
- return 0;
-}
-static int ca0132_dig_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
struct snd_pcm_substream *substream)
-{
- struct ca0132_spec *spec = codec->spec;
- ca0132_cleanup_stream(codec, spec->dig_out);
- return 0;
-}
-/*
- Analog capture
- */
-static int ca0132_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
unsigned int stream_tag,
unsigned int format,
struct snd_pcm_substream *substream)
-{
- struct ca0132_spec *spec = codec->spec;
- ca0132_setup_stream(codec, spec->adcs[substream->number],
stream_tag, 0, format);
- return 0;
-}
-static int ca0132_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
struct snd_pcm_substream *substream)
-{
- struct ca0132_spec *spec = codec->spec;
- ca0132_cleanup_stream(codec, spec->adcs[substream->number]);
- return 0;
-}
-/*
- Digital capture
- */
-static int ca0132_dig_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
unsigned int stream_tag,
unsigned int format,
struct snd_pcm_substream *substream)
-{
- struct ca0132_spec *spec = codec->spec;
- ca0132_setup_stream(codec, spec->dig_in, stream_tag, 0, format);
- return 0;
-}
-static int ca0132_dig_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
struct snd_pcm_substream *substream)
-{
- struct ca0132_spec *spec = codec->spec;
- ca0132_cleanup_stream(codec, spec->dig_in);
- return 0;
-}
-/*
- */
-static struct hda_pcm_stream ca0132_pcm_analog_playback = {
- .substreams = 1,
- .channels_min = 2,
- .channels_max = 2,
- .ops = {
.prepare = ca0132_playback_pcm_prepare,
.cleanup = ca0132_playback_pcm_cleanup
- },
-};
-static struct hda_pcm_stream ca0132_pcm_analog_capture = {
- .substreams = 1,
- .channels_min = 2,
- .channels_max = 2,
- .ops = {
.prepare = ca0132_capture_pcm_prepare,
.cleanup = ca0132_capture_pcm_cleanup
- },
-};
-static struct hda_pcm_stream ca0132_pcm_digital_playback = {
- .substreams = 1,
- .channels_min = 2,
- .channels_max = 2,
- .ops = {
.prepare = ca0132_dig_playback_pcm_prepare,
.cleanup = ca0132_dig_playback_pcm_cleanup
- },
-};
-static struct hda_pcm_stream ca0132_pcm_digital_capture = {
- .substreams = 1,
- .channels_min = 2,
- .channels_max = 2,
- .ops = {
.prepare = ca0132_dig_capture_pcm_prepare,
.cleanup = ca0132_dig_capture_pcm_cleanup
- },
-};
-static int ca0132_build_pcms(struct hda_codec *codec) -{
- struct ca0132_spec *spec = codec->spec;
- struct hda_pcm *info = spec->pcm_rec;
- codec->pcm_info = info;
- codec->num_pcms = 0;
- info->name = "CA0132 Analog";
- info->stream[SNDRV_PCM_STREAM_PLAYBACK] = ca0132_pcm_analog_playback;
- info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dacs[0];
- info->stream[SNDRV_PCM_STREAM_PLAYBACK].channels_max =
spec->multiout.max_channels;
- info->stream[SNDRV_PCM_STREAM_CAPTURE] = ca0132_pcm_analog_capture;
- info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = spec->num_inputs;
- info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[0];
- codec->num_pcms++;
- if (!spec->dig_out && !spec->dig_in)
return 0;
- info++;
- info->name = "CA0132 Digital";
- info->pcm_type = HDA_PCM_TYPE_SPDIF;
- if (spec->dig_out) {
info->stream[SNDRV_PCM_STREAM_PLAYBACK] =
ca0132_pcm_digital_playback;
info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dig_out;
- }
- if (spec->dig_in) {
info->stream[SNDRV_PCM_STREAM_CAPTURE] =
ca0132_pcm_digital_capture;
info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->dig_in;
- }
- codec->num_pcms++;
- return 0;
-}
-#define REG_CODEC_MUTE 0x18b014 -#define REG_CODEC_HP_VOL_L 0x18b070 -#define REG_CODEC_HP_VOL_R 0x18b074
-static int ca0132_hp_switch_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
-{
- struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
- struct ca0132_spec *spec = codec->spec;
- long *valp = ucontrol->value.integer.value;
- *valp = spec->curr_hp_switch;
- return 0;
-}
-static int ca0132_hp_switch_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
-{
- struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
- struct ca0132_spec *spec = codec->spec;
- long *valp = ucontrol->value.integer.value;
- unsigned int data;
- int err;
- /* any change? */
- if (spec->curr_hp_switch == *valp)
return 0;
- snd_hda_power_up(codec);
- err = chipio_read(codec, REG_CODEC_MUTE, &data);
- if (err < 0)
goto exit;
- /* *valp 0 is mute, 1 is unmute */
- data = (data & 0x7f) | (*valp ? 0 : 0x80);
- err = chipio_write(codec, REG_CODEC_MUTE, data);
- if (err < 0)
goto exit;
- spec->curr_hp_switch = *valp;
- exit:
- snd_hda_power_down(codec);
- return err < 0 ? err : 1;
-}
-static int ca0132_speaker_switch_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
-{
- struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
- struct ca0132_spec *spec = codec->spec;
- long *valp = ucontrol->value.integer.value;
- *valp = spec->curr_speaker_switch;
- return 0;
-}
-static int ca0132_speaker_switch_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
-{
- struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
- struct ca0132_spec *spec = codec->spec;
- long *valp = ucontrol->value.integer.value;
- unsigned int data;
- int err;
- /* any change? */
- if (spec->curr_speaker_switch == *valp)
return 0;
- snd_hda_power_up(codec);
- err = chipio_read(codec, REG_CODEC_MUTE, &data);
- if (err < 0)
goto exit;
- /* *valp 0 is mute, 1 is unmute */
- data = (data & 0xef) | (*valp ? 0 : 0x10);
- err = chipio_write(codec, REG_CODEC_MUTE, data);
- if (err < 0)
goto exit;
- spec->curr_speaker_switch = *valp;
- exit:
- snd_hda_power_down(codec);
- return err < 0 ? err : 1;
-}
-static int ca0132_hp_volume_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
-{
- struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
- struct ca0132_spec *spec = codec->spec;
- long *valp = ucontrol->value.integer.value;
- *valp++ = spec->curr_hp_volume[0];
- *valp = spec->curr_hp_volume[1];
- return 0;
-}
-static int ca0132_hp_volume_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
-{
- struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
- struct ca0132_spec *spec = codec->spec;
- long *valp = ucontrol->value.integer.value;
- long left_vol, right_vol;
- unsigned int data;
- int val;
- int err;
- left_vol = *valp++;
- right_vol = *valp;
- /* any change? */
- if ((spec->curr_hp_volume[0] == left_vol) &&
(spec->curr_hp_volume[1] == right_vol))
return 0;
- snd_hda_power_up(codec);
- err = chipio_read(codec, REG_CODEC_HP_VOL_L, &data);
- if (err < 0)
goto exit;
- val = 31 - left_vol;
- data = (data & 0xe0) | val;
- err = chipio_write(codec, REG_CODEC_HP_VOL_L, data);
- if (err < 0)
goto exit;
- val = 31 - right_vol;
- data = (data & 0xe0) | val;
- err = chipio_write(codec, REG_CODEC_HP_VOL_R, data);
- if (err < 0)
goto exit;
- spec->curr_hp_volume[0] = left_vol;
- spec->curr_hp_volume[1] = right_vol;
- exit:
- snd_hda_power_down(codec);
- return err < 0 ? err : 1;
-}
-static int add_hp_switch(struct hda_codec *codec, hda_nid_t nid) -{
- struct snd_kcontrol_new knew =
HDA_CODEC_MUTE_MONO("Headphone Playback Switch",
nid, 1, 0, HDA_OUTPUT);
- knew.get = ca0132_hp_switch_get;
- knew.put = ca0132_hp_switch_put;
- return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec));
-}
-static int add_hp_volume(struct hda_codec *codec, hda_nid_t nid) -{
- struct snd_kcontrol_new knew =
HDA_CODEC_VOLUME_MONO("Headphone Playback Volume",
nid, 3, 0, HDA_OUTPUT);
- knew.get = ca0132_hp_volume_get;
- knew.put = ca0132_hp_volume_put;
- return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec));
-}
-static int add_speaker_switch(struct hda_codec *codec, hda_nid_t nid) -{
- struct snd_kcontrol_new knew =
HDA_CODEC_MUTE_MONO("Speaker Playback Switch",
nid, 1, 0, HDA_OUTPUT);
- knew.get = ca0132_speaker_switch_get;
- knew.put = ca0132_speaker_switch_put;
- return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec));
-}
-static void ca0132_fix_hp_caps(struct hda_codec *codec) -{
- struct ca0132_spec *spec = codec->spec;
- struct auto_pin_cfg *cfg = &spec->autocfg;
- unsigned int caps;
- /* set mute-capable, 1db step, 32 steps, ofs 6 */
- caps = 0x80031f06;
- snd_hda_override_amp_caps(codec, cfg->hp_pins[0], HDA_OUTPUT, caps);
-}
-static int ca0132_build_controls(struct hda_codec *codec) -{
- struct ca0132_spec *spec = codec->spec;
- struct auto_pin_cfg *cfg = &spec->autocfg;
- int i, err;
- if (spec->multiout.num_dacs) {
err = add_speaker_switch(codec, spec->out_pins[0]);
if (err < 0)
return err;
- }
- if (cfg->hp_outs) {
ca0132_fix_hp_caps(codec);
err = add_hp_switch(codec, cfg->hp_pins[0]);
if (err < 0)
return err;
err = add_hp_volume(codec, cfg->hp_pins[0]);
if (err < 0)
return err;
- }
- for (i = 0; i < spec->num_inputs; i++) {
const char *label = spec->input_labels[i];
err = add_in_switch(codec, spec->adcs[i], label);
if (err < 0)
return err;
err = add_in_volume(codec, spec->adcs[i], label);
if (err < 0)
return err;
if (cfg->inputs[i].type == AUTO_PIN_MIC) {
/* add Mic-Boost */
err = add_in_mono_volume(codec, spec->input_pins[i],
"Mic Boost", 1);
if (err < 0)
return err;
}
- }
- if (spec->dig_out) {
err = snd_hda_create_spdif_out_ctls(codec, spec->dig_out,
spec->dig_out);
if (err < 0)
return err;
err = add_out_volume(codec, spec->dig_out, "IEC958");
if (err < 0)
return err;
- }
- if (spec->dig_in) {
err = snd_hda_create_spdif_in_ctls(codec, spec->dig_in);
if (err < 0)
return err;
err = add_in_volume(codec, spec->dig_in, "IEC958");
if (err < 0)
return err;
- }
- return 0;
-}
-static void ca0132_set_ct_ext(struct hda_codec *codec, int enable) -{
- /* Set Creative extension */
- snd_printdd("SET CREATIVE EXTENSION\n");
- snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE,
enable);
- msleep(20);
-}
-static void ca0132_config(struct hda_codec *codec) -{
- struct ca0132_spec *spec = codec->spec;
- struct auto_pin_cfg *cfg = &spec->autocfg;
- /* line-outs */
- cfg->line_outs = 1;
- cfg->line_out_pins[0] = 0x0b; /* front */
- cfg->line_out_type = AUTO_PIN_LINE_OUT;
- spec->dacs[0] = 0x02;
- spec->out_pins[0] = 0x0b;
- spec->multiout.dac_nids = spec->dacs;
- spec->multiout.num_dacs = 1;
- spec->multiout.max_channels = 2;
- /* headphone */
- cfg->hp_outs = 1;
- cfg->hp_pins[0] = 0x0f;
- spec->hp_dac = 0;
- spec->multiout.hp_nid = 0;
- /* inputs */
- cfg->num_inputs = 2; /* Mic-in and line-in */
- cfg->inputs[0].pin = 0x12;
- cfg->inputs[0].type = AUTO_PIN_MIC;
- cfg->inputs[1].pin = 0x11;
- cfg->inputs[1].type = AUTO_PIN_LINE_IN;
- /* Mic-in */
- spec->input_pins[0] = 0x12;
- spec->input_labels[0] = "Mic-In";
- spec->adcs[0] = 0x07;
- /* Line-In */
- spec->input_pins[1] = 0x11;
- spec->input_labels[1] = "Line-In";
- spec->adcs[1] = 0x08;
- spec->num_inputs = 2;
-}
-static void ca0132_init_chip(struct hda_codec *codec) -{
- struct ca0132_spec *spec = codec->spec;
- mutex_init(&spec->chipio_mutex);
-}
-static void ca0132_exit_chip(struct hda_codec *codec) -{
- /* put any chip cleanup stuffs here. */
-}
-static int ca0132_init(struct hda_codec *codec) -{
- struct ca0132_spec *spec = codec->spec;
- struct auto_pin_cfg *cfg = &spec->autocfg;
- int i;
- for (i = 0; i < spec->multiout.num_dacs; i++) {
init_output(codec, spec->out_pins[i],
spec->multiout.dac_nids[i]);
- }
- init_output(codec, cfg->hp_pins[0], spec->hp_dac);
- init_output(codec, cfg->dig_out_pins[0], spec->dig_out);
- for (i = 0; i < spec->num_inputs; i++)
init_input(codec, spec->input_pins[i], spec->adcs[i]);
- init_input(codec, cfg->dig_in_pin, spec->dig_in);
- ca0132_set_ct_ext(codec, 1);
- return 0;
-}
-static void ca0132_free(struct hda_codec *codec) -{
- ca0132_set_ct_ext(codec, 0);
- ca0132_exit_chip(codec);
- kfree(codec->spec);
-}
-static struct hda_codec_ops ca0132_patch_ops = {
- .build_controls = ca0132_build_controls,
- .build_pcms = ca0132_build_pcms,
- .init = ca0132_init,
- .free = ca0132_free,
-};
-static int patch_ca0132(struct hda_codec *codec) -{
- struct ca0132_spec *spec;
- snd_printdd("patch_ca0132\n");
- spec = kzalloc(sizeof(*spec), GFP_KERNEL);
- if (!spec)
return -ENOMEM;
- codec->spec = spec;
- ca0132_init_chip(codec);
- ca0132_config(codec);
- codec->patch_ops = ca0132_patch_ops;
- return 0;
-}
-/*
- patch entries
- */
-static struct hda_codec_preset snd_hda_preset_ca0132[] = {
- { .id = 0x11020011, .name = "CA0132", .patch = patch_ca0132 },
- {} /* terminator */
-};
-MODULE_ALIAS("snd-hda-codec-id:11020011");
-MODULE_LICENSE("GPL"); -MODULE_DESCRIPTION("Creative CA0132, CA0132 HD-audio codec");
-static struct hda_codec_preset_list ca0132_list = {
- .preset = snd_hda_preset_ca0132,
- .owner = THIS_MODULE,
-};
-static int __init patch_ca0132_init(void) -{
- return snd_hda_add_codec_preset(&ca0132_list);
-}
-static void __exit patch_ca0132_exit(void) -{
- snd_hda_delete_codec_preset(&ca0132_list);
-}
-module_init(patch_ca0132_init) -module_exit(patch_ca0132_exit) diff --git a/sound/pci/hda/patch_ca0132/Makefile b/sound/pci/hda/patch_ca0132/Makefile new file mode 100644 index 0000000..8f6f167 --- /dev/null +++ b/sound/pci/hda/patch_ca0132/Makefile @@ -0,0 +1,5 @@ +snd-hda-codec-ca0132-objs := patch_ca0132.o
+ifdef CONFIG_SND_HDA_CODEC_CA0132 +obj-$(CONFIG_SND_HDA_INTEL) += snd-hda-codec-ca0132.o +endif diff --git a/sound/pci/hda/patch_ca0132/ca0132_regs.h b/sound/pci/hda/patch_ca0132/ca0132_regs.h new file mode 100644 index 0000000..831ca9c --- /dev/null +++ b/sound/pci/hda/patch_ca0132/ca0132_regs.h @@ -0,0 +1,409 @@ +/*
- HD audio interface patch for Creative CA0132 chip.
- CA0132 registers defines.
- Copyright (c) 2011, Creative Technology Ltd.
- This driver is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
- This driver is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
+#ifndef __CA0132_REGS_H +#define __CA0312_REGS_H
+#define DSP_CHIP_OFFSET 0x100000 +#define DSP_DBGCNTL_MODULE_OFFSET 0xE30 +#define DSP_DBGCNTL_INST_OFFSET \
- (DSP_CHIP_OFFSET + DSP_DBGCNTL_MODULE_OFFSET)
+#define DSP_DBGCNTL_EXEC_LOBIT 0x0 +#define DSP_DBGCNTL_EXEC_HIBIT 0x3 +#define DSP_DBGCNTL_EXEC_MASK 0xF
+#define DSP_DBGCNTL_SS_LOBIT 0x4 +#define DSP_DBGCNTL_SS_HIBIT 0x7 +#define DSP_DBGCNTL_SS_MASK 0xF0
+#define DSP_DBGCNTL_STATE_LOBIT 0xA +#define DSP_DBGCNTL_STATE_HIBIT 0xD +#define DSP_DBGCNTL_STATE_MASK 0x3C00
+#define XRAM_CHIP_OFFSET 0x0 +#define XRAM_XRAM_CHANNEL_COUNT 0xE000 +#define XRAM_XRAM_MODULE_OFFSET 0x0 +#define XRAM_XRAM_CHAN_INCR 4 +#define XRAM_XRAM_INST_OFFSET(_chan) \
- (XRAM_CHIP_OFFSET + XRAM_XRAM_MODULE_OFFSET + \
- (_chan * XRAM_XRAM_CHAN_INCR))
+#define YRAM_CHIP_OFFSET 0x40000 +#define YRAM_YRAM_CHANNEL_COUNT 0x8000 +#define YRAM_YRAM_MODULE_OFFSET 0x0 +#define YRAM_YRAM_CHAN_INCR 4 +#define YRAM_YRAM_INST_OFFSET(_chan) \
- (YRAM_CHIP_OFFSET + YRAM_YRAM_MODULE_OFFSET + \
- (_chan * YRAM_YRAM_CHAN_INCR))
+#define UC_CHIP_OFFSET 0x80000 +#define UC_UC_CHANNEL_COUNT 0x10000 +#define UC_UC_MODULE_OFFSET 0x0 +#define UC_UC_CHAN_INCR 4 +#define UC_UC_INST_OFFSET(_chan) \
- (UC_CHIP_OFFSET + UC_UC_MODULE_OFFSET + \
- (_chan * UC_UC_CHAN_INCR))
+#define AXRAM_CHIP_OFFSET 0x3C000 +#define AXRAM_AXRAM_CHANNEL_COUNT 0x1000 +#define AXRAM_AXRAM_MODULE_OFFSET 0x0 +#define AXRAM_AXRAM_CHAN_INCR 4 +#define AXRAM_AXRAM_INST_OFFSET(_chan) \
- (AXRAM_CHIP_OFFSET + AXRAM_AXRAM_MODULE_OFFSET + \
- (_chan * AXRAM_AXRAM_CHAN_INCR))
+#define AYRAM_CHIP_OFFSET 0x78000 +#define AYRAM_AYRAM_CHANNEL_COUNT 0x1000 +#define AYRAM_AYRAM_MODULE_OFFSET 0x0 +#define AYRAM_AYRAM_CHAN_INCR 4 +#define AYRAM_AYRAM_INST_OFFSET(_chan) \
- (AYRAM_CHIP_OFFSET + AYRAM_AYRAM_MODULE_OFFSET + \
- (_chan * AYRAM_AYRAM_CHAN_INCR))
+#define DSPDMAC_CHIP_OFFSET 0x110000 +#define DSPDMAC_DMA_CFG_CHANNEL_COUNT 12 +#define DSPDMAC_DMACFG_MODULE_OFFSET 0xF00 +#define DSPDMAC_DMACFG_CHAN_INCR 0x10 +#define DSPDMAC_DMACFG_INST_OFFSET(_chan) \
- (DSPDMAC_CHIP_OFFSET + DSPDMAC_DMACFG_MODULE_OFFSET + \
- (_chan * DSPDMAC_DMACFG_CHAN_INCR))
+#define DSPDMAC_DMACFG_DBADR_LOBIT 0x0 +#define DSPDMAC_DMACFG_DBADR_HIBIT 0x10 +#define DSPDMAC_DMACFG_DBADR_MASK 0x1FFFF +#define DSPDMAC_DMACFG_LP_LOBIT 0x11 +#define DSPDMAC_DMACFG_LP_HIBIT 0x11 +#define DSPDMAC_DMACFG_LP_MASK 0x20000
+#define DSPDMAC_DMACFG_AINCR_LOBIT 0x12 +#define DSPDMAC_DMACFG_AINCR_HIBIT 0x12 +#define DSPDMAC_DMACFG_AINCR_MASK 0x40000
+#define DSPDMAC_DMACFG_DWR_LOBIT 0x13 +#define DSPDMAC_DMACFG_DWR_HIBIT 0x13 +#define DSPDMAC_DMACFG_DWR_MASK 0x80000
+#define DSPDMAC_DMACFG_AJUMP_LOBIT 0x14 +#define DSPDMAC_DMACFG_AJUMP_HIBIT 0x17 +#define DSPDMAC_DMACFG_AJUMP_MASK 0xF00000
+#define DSPDMAC_DMACFG_AMODE_LOBIT 0x18 +#define DSPDMAC_DMACFG_AMODE_HIBIT 0x19 +#define DSPDMAC_DMACFG_AMODE_MASK 0x3000000
+#define DSPDMAC_DMACFG_LK_LOBIT 0x1A +#define DSPDMAC_DMACFG_LK_HIBIT 0x1A +#define DSPDMAC_DMACFG_LK_MASK 0x4000000
+#define DSPDMAC_DMACFG_AICS_LOBIT 0x1B +#define DSPDMAC_DMACFG_AICS_HIBIT 0x1F +#define DSPDMAC_DMACFG_AICS_MASK 0xF8000000
+#define DSPDMAC_DMACFG_LP_SINGLE 0 +#define DSPDMAC_DMACFG_LP_LOOPING 1
+#define DSPDMAC_DMACFG_AINCR_XANDY 0 +#define DSPDMAC_DMACFG_AINCR_XORY 1
+#define DSPDMAC_DMACFG_DWR_DMA_RD 0 +#define DSPDMAC_DMACFG_DWR_DMA_WR 1
+#define DSPDMAC_DMACFG_AMODE_LINEAR 0 +#define DSPDMAC_DMACFG_AMODE_RSV1 1 +#define DSPDMAC_DMACFG_AMODE_WINTLV 2 +#define DSPDMAC_DMACFG_AMODE_GINTLV 3
+#define DSPDMAC_DSP_ADR_OFS_CHANNEL_COUNT 12 +#define DSPDMAC_DSPADROFS_MODULE_OFFSET 0xF04 +#define DSPDMAC_DSPADROFS_CHAN_INCR 0x10 +#define DSPDMAC_DSPADROFS_INST_OFFSET(_chan) \
- (DSPDMAC_CHIP_OFFSET + DSPDMAC_DSPADROFS_MODULE_OFFSET + \
- (_chan * DSPDMAC_DSPADROFS_CHAN_INCR))
+#define DSPDMAC_DSPADROFS_COFS_LOBIT 0x0 +#define DSPDMAC_DSPADROFS_COFS_HIBIT 0xF +#define DSPDMAC_DSPADROFS_COFS_MASK 0xFFFF
+#define DSPDMAC_DSPADROFS_BOFS_LOBIT 0x10 +#define DSPDMAC_DSPADROFS_BOFS_HIBIT 0x1F +#define DSPDMAC_DSPADROFS_BOFS_MASK 0xFFFF0000
+#define DSPDMAC_DSP_ADR_WOFS_CHANNEL_COUNT 12 +#define DSPDMAC_DSPADRWOFS_MODULE_OFFSET 0xF04 +#define DSPDMAC_DSPADRWOFS_CHAN_INCR 0x10
+#define DSPDMAC_DSPADRWOFS_INST_OFFSET(_chan) \
- (DSPDMAC_CHIP_OFFSET + DSPDMAC_DSPADRWOFS_MODULE_OFFSET + \
- (_chan * DSPDMAC_DSPADRWOFS_CHAN_INCR))
+#define DSPDMAC_DSPADRWOFS_WCOFS_LOBIT 0x0 +#define DSPDMAC_DSPADRWOFS_WCOFS_HIBIT 0xA +#define DSPDMAC_DSPADRWOFS_WCOFS_MASK 0x7FF
+#define DSPDMAC_DSPADRWOFS_WCBFR_LOBIT 0xB +#define DSPDMAC_DSPADRWOFS_WCBFR_HIBIT 0xF +#define DSPDMAC_DSPADRWOFS_WCBFR_MASK 0xF800
+#define DSPDMAC_DSPADRWOFS_WBOFS_LOBIT 0x10 +#define DSPDMAC_DSPADRWOFS_WBOFS_HIBIT 0x1A +#define DSPDMAC_DSPADRWOFS_WBOFS_MASK 0x7FF0000
+#define DSPDMAC_DSPADRWOFS_WBBFR_LOBIT 0x1B +#define DSPDMAC_DSPADRWOFS_WBBFR_HIBIT 0x1F +#define DSPDMAC_DSPADRWOFS_WBBFR_MASK 0xF8000000
+#define DSPDMAC_DSP_ADR_GOFS_CHANNEL_COUNT 12 +#define DSPDMAC_DSPADRGOFS_MODULE_OFFSET 0xF04 +#define DSPDMAC_DSPADRGOFS_CHAN_INCR 0x10 +#define DSPDMAC_DSPADRGOFS_INST_OFFSET(_chan) \
- (DSPDMAC_CHIP_OFFSET + DSPDMAC_DSPADRGOFS_MODULE_OFFSET + \
- (_chan * DSPDMAC_DSPADRGOFS_CHAN_INCR))
+#define DSPDMAC_DSPADRGOFS_GCOFS_LOBIT 0x0 +#define DSPDMAC_DSPADRGOFS_GCOFS_HIBIT 0x9 +#define DSPDMAC_DSPADRGOFS_GCOFS_MASK 0x3FF
+#define DSPDMAC_DSPADRGOFS_GCS_LOBIT 0xA +#define DSPDMAC_DSPADRGOFS_GCS_HIBIT 0xC +#define DSPDMAC_DSPADRGOFS_GCS_MASK 0x1C00
+#define DSPDMAC_DSPADRGOFS_GCBFR_LOBIT 0xD +#define DSPDMAC_DSPADRGOFS_GCBFR_HIBIT 0xF +#define DSPDMAC_DSPADRGOFS_GCBFR_MASK 0xE000
+#define DSPDMAC_DSPADRGOFS_GBOFS_LOBIT 0x10 +#define DSPDMAC_DSPADRGOFS_GBOFS_HIBIT 0x19 +#define DSPDMAC_DSPADRGOFS_GBOFS_MASK 0x3FF0000
+#define DSPDMAC_DSPADRGOFS_GBS_LOBIT 0x1A +#define DSPDMAC_DSPADRGOFS_GBS_HIBIT 0x1C +#define DSPDMAC_DSPADRGOFS_GBS_MASK 0x1C000000
+#define DSPDMAC_DSPADRGOFS_GBBFR_LOBIT 0x1D +#define DSPDMAC_DSPADRGOFS_GBBFR_HIBIT 0x1F +#define DSPDMAC_DSPADRGOFS_GBBFR_MASK 0xE0000000
+#define DSPDMAC_XFR_CNT_CHANNEL_COUNT 12 +#define DSPDMAC_XFRCNT_MODULE_OFFSET 0xF08 +#define DSPDMAC_XFRCNT_CHAN_INCR 0x10
+#define DSPDMAC_XFRCNT_INST_OFFSET(_chan) \
- (DSPDMAC_CHIP_OFFSET + DSPDMAC_XFRCNT_MODULE_OFFSET + \
- (_chan * DSPDMAC_XFRCNT_CHAN_INCR))
+#define DSPDMAC_XFRCNT_CCNT_LOBIT 0x0 +#define DSPDMAC_XFRCNT_CCNT_HIBIT 0xF +#define DSPDMAC_XFRCNT_CCNT_MASK 0xFFFF
+#define DSPDMAC_XFRCNT_BCNT_LOBIT 0x10 +#define DSPDMAC_XFRCNT_BCNT_HIBIT 0x1F +#define DSPDMAC_XFRCNT_BCNT_MASK 0xFFFF0000
+#define DSPDMAC_IRQ_CNT_CHANNEL_COUNT 12 +#define DSPDMAC_IRQCNT_MODULE_OFFSET 0xF0C +#define DSPDMAC_IRQCNT_CHAN_INCR 0x10 +#define DSPDMAC_IRQCNT_INST_OFFSET(_chan) \
- (DSPDMAC_CHIP_OFFSET + DSPDMAC_IRQCNT_MODULE_OFFSET + \
- (_chan * DSPDMAC_IRQCNT_CHAN_INCR))
+#define DSPDMAC_IRQCNT_CICNT_LOBIT 0x0 +#define DSPDMAC_IRQCNT_CICNT_HIBIT 0xF +#define DSPDMAC_IRQCNT_CICNT_MASK 0xFFFF
+#define DSPDMAC_IRQCNT_BICNT_LOBIT 0x10 +#define DSPDMAC_IRQCNT_BICNT_HIBIT 0x1F +#define DSPDMAC_IRQCNT_BICNT_MASK 0xFFFF0000
+#define DSPDMAC_AUD_CHSEL_CHANNEL_COUNT 12 +#define DSPDMAC_AUDCHSEL_MODULE_OFFSET 0xFC0 +#define DSPDMAC_AUDCHSEL_CHAN_INCR 0x4 +#define DSPDMAC_AUDCHSEL_INST_OFFSET(_chan) \
- (DSPDMAC_CHIP_OFFSET + DSPDMAC_AUDCHSEL_MODULE_OFFSET + \
- (_chan * DSPDMAC_AUDCHSEL_CHAN_INCR))
+#define DSPDMAC_AUDCHSEL_ACS_LOBIT 0x0 +#define DSPDMAC_AUDCHSEL_ACS_HIBIT 0x1F +#define DSPDMAC_AUDCHSEL_ACS_MASK 0xFFFFFFFF
+#define DSPDMAC_CHNLSTART_MODULE_OFFSET 0xFF0 +#define DSPDMAC_CHNLSTART_INST_OFFSET \
- (DSPDMAC_CHIP_OFFSET + DSPDMAC_CHNLSTART_MODULE_OFFSET)
+#define DSPDMAC_CHNLSTART_EN_LOBIT 0x0 +#define DSPDMAC_CHNLSTART_EN_HIBIT 0xB +#define DSPDMAC_CHNLSTART_EN_MASK 0xFFF
+#define DSPDMAC_CHNLSTART_VAI1_LOBIT 0xC +#define DSPDMAC_CHNLSTART_VAI1_HIBIT 0xF +#define DSPDMAC_CHNLSTART_VAI1_MASK 0xF000
+#define DSPDMAC_CHNLSTART_DIS_LOBIT 0x10 +#define DSPDMAC_CHNLSTART_DIS_HIBIT 0x1B +#define DSPDMAC_CHNLSTART_DIS_MASK 0xFFF0000
+#define DSPDMAC_CHNLSTART_VAI2_LOBIT 0x1C +#define DSPDMAC_CHNLSTART_VAI2_HIBIT 0x1F +#define DSPDMAC_CHNLSTART_VAI2_MASK 0xF0000000
+#define DSPDMAC_CHNLSTATUS_MODULE_OFFSET 0xFF4 +#define DSPDMAC_CHNLSTATUS_INST_OFFSET \
- (DSPDMAC_CHIP_OFFSET + DSPDMAC_CHNLSTATUS_MODULE_OFFSET)
+#define DSPDMAC_CHNLSTATUS_ISC_LOBIT 0x0 +#define DSPDMAC_CHNLSTATUS_ISC_HIBIT 0xB +#define DSPDMAC_CHNLSTATUS_ISC_MASK 0xFFF
+#define DSPDMAC_CHNLSTATUS_AOO_LOBIT 0xC +#define DSPDMAC_CHNLSTATUS_AOO_HIBIT 0xC +#define DSPDMAC_CHNLSTATUS_AOO_MASK 0x1000
+#define DSPDMAC_CHNLSTATUS_AOU_LOBIT 0xD +#define DSPDMAC_CHNLSTATUS_AOU_HIBIT 0xD +#define DSPDMAC_CHNLSTATUS_AOU_MASK 0x2000
+#define DSPDMAC_CHNLSTATUS_AIO_LOBIT 0xE +#define DSPDMAC_CHNLSTATUS_AIO_HIBIT 0xE +#define DSPDMAC_CHNLSTATUS_AIO_MASK 0x4000
+#define DSPDMAC_CHNLSTATUS_AIU_LOBIT 0xF +#define DSPDMAC_CHNLSTATUS_AIU_HIBIT 0xF +#define DSPDMAC_CHNLSTATUS_AIU_MASK 0x8000
+#define DSPDMAC_CHNLSTATUS_IEN_LOBIT 0x10 +#define DSPDMAC_CHNLSTATUS_IEN_HIBIT 0x1B +#define DSPDMAC_CHNLSTATUS_IEN_MASK 0xFFF0000
+#define DSPDMAC_CHNLSTATUS_VAI0_LOBIT 0x1C +#define DSPDMAC_CHNLSTATUS_VAI0_HIBIT 0x1F +#define DSPDMAC_CHNLSTATUS_VAI0_MASK 0xF0000000
+#define DSPDMAC_CHNLPROP_MODULE_OFFSET 0xFF8 +#define DSPDMAC_CHNLPROP_INST_OFFSET \
- (DSPDMAC_CHIP_OFFSET + DSPDMAC_CHNLPROP_MODULE_OFFSET)
+#define DSPDMAC_CHNLPROP_DCON_LOBIT 0x0 +#define DSPDMAC_CHNLPROP_DCON_HIBIT 0xB +#define DSPDMAC_CHNLPROP_DCON_MASK 0xFFF
+#define DSPDMAC_CHNLPROP_FFS_LOBIT 0xC +#define DSPDMAC_CHNLPROP_FFS_HIBIT 0xC +#define DSPDMAC_CHNLPROP_FFS_MASK 0x1000
+#define DSPDMAC_CHNLPROP_NAJ_LOBIT 0xD +#define DSPDMAC_CHNLPROP_NAJ_HIBIT 0xD +#define DSPDMAC_CHNLPROP_NAJ_MASK 0x2000
+#define DSPDMAC_CHNLPROP_ENH_LOBIT 0xE +#define DSPDMAC_CHNLPROP_ENH_HIBIT 0xE +#define DSPDMAC_CHNLPROP_ENH_MASK 0x4000
+#define DSPDMAC_CHNLPROP_MSPCE_LOBIT 0x10 +#define DSPDMAC_CHNLPROP_MSPCE_HIBIT 0x1B +#define DSPDMAC_CHNLPROP_MSPCE_MASK 0xFFF0000
+#define DSPDMAC_CHNLPROP_AC_LOBIT 0x1C +#define DSPDMAC_CHNLPROP_AC_HIBIT 0x1F +#define DSPDMAC_CHNLPROP_AC_MASK 0xF0000000
+#define DSPDMAC_ACTIVE_MODULE_OFFSET 0xFFC +#define DSPDMAC_ACTIVE_INST_OFFSET \
- (DSPDMAC_CHIP_OFFSET + DSPDMAC_ACTIVE_MODULE_OFFSET)
+#define DSPDMAC_ACTIVE_AAR_LOBIT 0x0 +#define DSPDMAC_ACTIVE_AAR_HIBIT 0xB +#define DSPDMAC_ACTIVE_AAR_MASK 0xFFF
+#define DSPDMAC_ACTIVE_WFR_LOBIT 0xC +#define DSPDMAC_ACTIVE_WFR_HIBIT 0x17 +#define DSPDMAC_ACTIVE_WFR_MASK 0xFFF000
+#define DSP_AUX_MEM_BASE 0xE000 +#define INVALID_CHIP_ADDRESS (~0UL)
+#define X_SIZE (XRAM_XRAM_CHANNEL_COUNT * XRAM_XRAM_CHAN_INCR) +#define Y_SIZE (YRAM_YRAM_CHANNEL_COUNT * YRAM_YRAM_CHAN_INCR) +#define AX_SIZE (AXRAM_AXRAM_CHANNEL_COUNT * AXRAM_AXRAM_CHAN_INCR) +#define AY_SIZE (AYRAM_AYRAM_CHANNEL_COUNT * AYRAM_AYRAM_CHAN_INCR) +#define UC_SIZE (UC_UC_CHANNEL_COUNT * UC_UC_CHAN_INCR)
+#define XEXT_SIZE (X_SIZE + AX_SIZE) +#define YEXT_SIZE (Y_SIZE + AY_SIZE)
+#define U64K 0x10000UL
+#define X_END (XRAM_CHIP_OFFSET + X_SIZE) +#define X_EXT (XRAM_CHIP_OFFSET + XEXT_SIZE) +#define AX_END (XRAM_CHIP_OFFSET + U64K*4)
+#define Y_END (YRAM_CHIP_OFFSET + Y_SIZE) +#define Y_EXT (YRAM_CHIP_OFFSET + YEXT_SIZE) +#define AY_END (YRAM_CHIP_OFFSET + U64K*4)
+#define UC_END (UC_CHIP_OFFSET + UC_SIZE)
+#define X_RANGE_MAIN(a, s) \
- (((a)+((s)-1)*XRAM_XRAM_CHAN_INCR < X_END))
+#define X_RANGE_AUX(a, s) \
- (((a) >= X_END) && ((a)+((s)-1)*XRAM_XRAM_CHAN_INCR < AX_END))
+#define X_RANGE_EXT(a, s) \
- (((a)+((s)-1)*XRAM_XRAM_CHAN_INCR < X_EXT))
+#define X_RANGE_ALL(a, s) \
- (((a)+((s)-1)*XRAM_XRAM_CHAN_INCR < AX_END))
+#define Y_RANGE_MAIN(a, s) \
- (((a) >= YRAM_CHIP_OFFSET) && \
- ((a)+((s)-1)*YRAM_YRAM_CHAN_INCR < Y_END))
+#define Y_RANGE_AUX(a, s) \
- (((a) >= Y_END) && \
- ((a)+((s)-1)*YRAM_YRAM_CHAN_INCR < AY_END))
+#define Y_RANGE_EXT(a, s) \
- (((a) >= YRAM_CHIP_OFFSET) && \
- ((a)+((s)-1)*YRAM_YRAM_CHAN_INCR < Y_EXT))
+#define Y_RANGE_ALL(a, s) \
- (((a) >= YRAM_CHIP_OFFSET) && \
- ((a)+((s)-1)*YRAM_YRAM_CHAN_INCR < AY_END))
+#define UC_RANGE(a, s) \
- (((a) >= UC_CHIP_OFFSET) && \
- ((a)+((s)-1)*UC_UC_CHAN_INCR < UC_END))
+#define X_OFF(a) \
- (((a) - XRAM_CHIP_OFFSET) / XRAM_XRAM_CHAN_INCR)
+#define AX_OFF(a) \
- (((a) % (AXRAM_AXRAM_CHANNEL_COUNT * \
- AXRAM_AXRAM_CHAN_INCR)) / AXRAM_AXRAM_CHAN_INCR)
+#define Y_OFF(a) \
- (((a) - YRAM_CHIP_OFFSET) / YRAM_YRAM_CHAN_INCR)
+#define AY_OFF(a) \
- (((a) % (AYRAM_AYRAM_CHANNEL_COUNT * \
- AYRAM_AYRAM_CHAN_INCR)) / AYRAM_AYRAM_CHAN_INCR)
+#define UC_OFF(a) (((a) - UC_CHIP_OFFSET) / UC_UC_CHAN_INCR)
+#define X_EXT_MAIN_SIZE(a) (XRAM_XRAM_CHANNEL_COUNT - X_OFF(a)) +#define X_EXT_AUX_SIZE(a, s) ((s) - X_EXT_MAIN_SIZE(a))
+#define Y_EXT_MAIN_SIZE(a) (YRAM_YRAM_CHANNEL_COUNT - Y_OFF(a)) +#define Y_EXT_AUX_SIZE(a, s) ((s) - Y_EXT_MAIN_SIZE(a))
+#endif diff --git a/sound/pci/hda/patch_ca0132/dsp_os.h b/sound/pci/hda/patch_ca0132/dsp_os.h new file mode 100644 index 0000000..b23eb4e --- /dev/null +++ b/sound/pci/hda/patch_ca0132/dsp_os.h @@ -0,0 +1,40981 @@ +/*----------------------------------------------------------------------------- +// Generated by Coff2DspImage V0.3. (built on Thu Oct 7 14:48:09 2010) +// ---- +// Input file: DspOS.x +// Output file: dsp_os.h +// On: 2011/09/14 05:13:02 UTC +// ---- +// Copyright (c) 2011, Creative Technology Ltd. +//---------------------------------------------------------------------------*/
+const u32 DspImage_dsp_os[] = { +0x4c46584d, 0xffffff01, 0x8, 0x100d24, +0xc, 0x100d34, 0xd, 0x100d38, +0xe, 0x100d3c, 0xf, 0x4c46584d, +0x80020, 0xfff8, 0x1e08000, 0xdd9100, +0x64, 0x1883af, 0x100f0f, 0x1e08000, +0xddd100, 0x64a, 0x1883af, 0x100f0a, +0x1e08000, 0xde1100, 0xc30, 0x1883af, +0x100f05, 0x1e08000, 0xde5100, 0x1216, +0x1883af, 0x1e47fff, 0x1ffe000, 0x190190, +0x400310, 0x1e08000, 0x2f34f, 0x1000000, +0x1dbc0a, 0x1620000, 0x58fbb9, 0x1020001, +0x1c0002c, 0x250000, 0x230000, 0x100fff, +0xc8004c, 0x70000, 0xc80400, 0x1020001, +0x1c0002a, 0xb00000, 0x108102, 0xc80002, +0x1e08000, 0xde9200, 0x2, 0x188300, +0xc82420, 0x1020001, 0x1c02bf2, 0x1008001, +0x1c00028, 0xc80021, 0x1008001, 0x1c00028, +0x240000, 0x1020001, 0x1c00845, 0xb00000, +0x1181fd, 0x1020001, 0x1c0225f, 0xc80020, +0x1020001, 0x1c01cd5, 0x0, 0x100ff6, +0x240000, 0xc80021, 0x1020001, 0x1c01cd5, +0x0, 0x100ffc, 0x240000, 0xc80022, +0x1020001, 0x1c01cd5, 0x0, 0x100ffc, +0x240000, 0xc80023, 0x1020001, 0x1c01cd5, +0x0, 0x100ffc, 0x1e6ffff, 0x1ffc000, +0x7f, 0x11803fc, 0x70000, 0xd10000, +0x1e77fff, 0x1ffc000, 0x7f, 0x11803fc, +0x70000, 0x1f30000, 0x610c, 0x1332160, +0x193300, 0x130ff1, 0x1e77fff, 0x1ffc000, +0x60, 0x9803fc, 0x110103, 0x771008, +0x1081fa, 0xc80008, 0x70000, 0x1e08000, +0x300, 0x102, 0x184310, 0x1b47fff, +0x1fffc00, 0x31061, 0x180310, 0xd40c04, +0xc0500, 0xc80030, 0x70000, 0x1647fff, +0x1f00781, 0x70000, 0x1647fff, 0x1f00789, +0x70000, 0x1647fff, 0x1f00791, 0x70000, +0x1647fff, 0x1f00799, 0x70000, 0x1647fff, +0x1f007a1, 0x70000, 0x1647fff, 0x1f007a9, +0x70000, 0x1647fff, 0x1f007b1, 0x70000, +0x1647fff, 0x1f007b9, 0x70000, 0x1647fff, +0x1f007c1, 0x70000, 0x1647fff, 0x1f007c9, +0x70000, 0x1647fff, 0x1f007d1, 0x70000, +0x1647fff, 0x1f007d9, 0x70000, 0x1e08000, +0x300, 0x162, 0x184310, 0x1b47fff, +0x1fffc00, 0x31061, 0x180310, 0xd40c04, +0xc0500, 0xc80030, 0x70000, 0x1647fff, +0x1f00783, 0x70000, 0x1647fff, 0x1f0078b, +0x70000, 0x1647fff, 0x1f00793, 0x70000, +0x1647fff, 0x1f0079b, 0x70000, 0x1647fff, +0x1f007a3, 0x70000, 0x1647fff, 0x1f007ab, +0x70000, 0x1647fff, 0x1f007b3, 0x70000, +0x1647fff, 0x1f007bb, 0x70000, 0x1647fff, +0x1f007c3, 0x70000, 0x1647fff, 0x1f007cb, +0x70000, 0x1647fff, 0x1f007d3, 0x70000, +0x1647fff, 0x1f007db, 0x70000, 0x1b80000, +0x604c, 0x1232761, 0x1903fe, 0x1fc0c81, +0x120640c, 0x123fe61, 0x181300, 0x70000, +0x1647fff, 0x1f007fb, 0x70000, 0x1647fff, +0x1f007f9, 0x70000, 0xe81000, 0xb00022, +0x100106, 0x1e6ffff, 0x1ffc000, 0x7f, +0x15803fd, 0x70000, 0xd10000, 0x1e77fff, +0x1ffc000, 0x7f, 0x15803fd, 0x70000, +0xe81000, 0xb00022, 0x100106, 0x1e6ffff, +0x1ffc000, 0x7f, 0x19803fe, 0x70000, +0xd10000, 0x1e77fff, 0x1ffc000, 0x7f, +0x19803fe, 0x70000, 0x16201ff, 0x1dfebfd, +0x1647fff, 0x1ffe601, 0x1620000, 0x1ffbff, +0x70000, 0x250000, 0x1620000, 0x58c318, +0x0, 0x0, 0x1647fff, 0x1f00783, +0x1647500, 0x30078b, 0x1647500, 0x300793, +0x1647500, 0x30079b, 0x1647500, 0x3007a3, +0x1647500, 0x3007ab, 0x1647500, 0x3007b3, +0x1647500, 0x3007bb, 0x1647500, 0x3007c3, +0x1647500, 0x3007cb, 0x1647500, 0x3007d3, +0x1647500, 0x3007db, 0x1007400, 0x0, +0x240000, 0x70000, 0x1e08000, 0x300, +0x268, 0x184310, 0x1b47fff, 0x1fffc00, +0x31061, 0x180310, 0xd40c04, 0xc0500, +0xc80030, 0x70000, 0x1647fff, 0x1fc2605, +0x70000, 0x1647fff, 0x1fc6605, 0x70000, +0x1647fff, 0x1fca605, 0x70000, 0x1647fff, +0x1fce605, 0x70000, 0x1647fff, 0x1fd2605, +0x70000, 0x1647fff, 0x1fd6605, 0x70000, +0x1647fff, 0x1fda605, 0x70000, 0x1647fff, +0x1fde605, 0x70000, 0x1647fff, 0x1fe2605, +0x70000, 0x1647fff, 0x1fe6605, 0x70000, +0x1647fff, 0x1fea605, 0x70000, 0x1647fff, +0x1fee605, 0x70000, 0x1e08000, 0x300, +0x2c8, 0x184310, 0x1b47fff, 0x1fffc00, +0x31061, 0x180310, 0xd40c04, 0xc0500, +0xc80030, 0x70000, 0x1647fff, 0x1ff0605, +0x70000, 0x1647fff, 0x1ff1605, 0x70000, +0x1647fff, 0x1ff2605, 0x70000, 0x1647fff, +0x1ff3605, 0x70000, 0x1647fff, 0x1ff4605, +0x70000, 0x1647fff, 0x1ff5605, 0x70000, +0x1647fff, 0x1ff6605, 0x70000, 0x1647fff, +0x1ff7605, 0x70000, 0x1647fff, 0x1ff8605, +0x70000, 0x1647fff, 0x1ff9605, 0x70000, +0x1647fff, 0x1ffa605, 0x70000, 0x1647fff, +0x1ffb605, 0x70000, 0x1e08000, 0x300, +0x328, 0x184310, 0x1b47fff, 0x1fffc00, +0x31061, 0x180310, 0xd40c04, 0xc0500, +0xc80030, 0x70000, 0x1647fff, 0x1fc1605, +0x70000, 0x1647fff, 0x1fc5605, 0x70000, +0x1647fff, 0x1fc9605, 0x70000, 0x1647fff, +0x1fcd605, 0x70000, 0x1647fff, 0x1fd1605, +0x70000, 0x1647fff, 0x1fd5605, 0x70000, +0x1647fff, 0x1fd9605, 0x70000, 0x1647fff, +0x1fdd605, 0x70000, 0x1647fff, 0x1fe1605, +0x70000, 0x1647fff, 0x1fe5605, 0x70000, +0x1647fff, 0x1fe9605, 0x70000, 0x1647fff, +0x1fed605, 0x70000, 0x1e08000, 0x300, +0x388, 0x184310, 0x1b47fff, 0x1fffc00, +0x31061, 0x180310, 0xd40c04, 0xc0500, +0xc80030, 0x70000, 0x1647fff, 0x1fc3605, +0x70000, 0x1647fff, 0x1fc7605, 0x70000, +0x1647fff, 0x1fcb605, 0x70000, 0x1647fff, +0x1fcf605, 0x70000, 0x1647fff, 0x1fd3605, +0x70000, 0x1647fff, 0x1fd7605, 0x70000, +0x1647fff, 0x1fdb605, 0x70000, 0x1647fff, +0x1fdf605, 0x70000, 0x1647fff, 0x1fe3605, +0x70000, 0x1647fff, 0x1fe7605, 0x70000, +0x1647fff, 0x1feb605, 0x70000, 0x1647fff, +0x1fef605, 0x70000, 0xc80420, 0x1d0007, +0x1447fff, 0x1c46020, 0x1b77f00, 0x1ffd0, +0x7e261, 0x190320, 0x1007981, 0x1800000, +0xc80002, 0x70000, 0x0, 0x0, +0x0, 0x0, 0x0, 0x0, +0x0, 0x0, 0x0, 0x0, +0x0, 0x0, 0x0, 0x1008001, +0x1c0d661, 0x0, 0x0, 0x0, +0x1020001, 0x1c0003b, 0x0, 0x0, +0x1020001, 0x1c0003b, 0x0, 0x1008001, +0x1c0d654, 0x0, 0x0, 0x0, +0x1020001, 0x1c0003b, 0x0, 0x0, +0x1020001, 0x1c0003b, 0x0, 0x0, +0x1020001, 0x1c0003b, 0x0, 0x1008001, +0x1c004ac, 0x0, 0x0, 0x0, +0x1020001, 0x1c0003b, 0x0, 0x0, +0x1020001, 0x1c0003b, 0x0, 0x1008001, +0x1c00464, 0x0, 0x0, 0x1008001, +0x1c00469, 0x0, 0x0, 0x1008001, +0x1c0046e, 0x0, 0x0, 0x1008001, +0x1c00473, 0x0, 0x0, 0x1008001, +0x1c00478, 0x0, 0x0, 0x1008001, +0x1c0047d, 0x0, 0x0, 0x1008001, +0x1c00482, 0x0, 0x0, 0x1008001, +0x1c00487, 0x0, 0x0, 0x0, +0x1020001, 0x1c0003b, 0x0, 0x1008001, +0x1c004a0, 0x0, 0x0, 0x1008001, +0x1c004a4, 0x0, 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- HD audio interface patch for Creative Sound Core3D chip
- Copyright (c) 2011, Creative Technology Ltd.
- Based on patch_ca0110.c
- Copyright (c) 2008 Takashi Iwai tiwai@suse.de
- This driver is free software; you can redistribute it and/or modify
- it under the terms of the GNU General Public License as published by
- the Free Software Foundation; either version 2 of the License, or
- (at your option) any later version.
- This driver is distributed in the hope that it will be useful,
- but WITHOUT ANY WARRANTY; without even the implied warranty of
- MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- GNU General Public License for more details.
- You should have received a copy of the GNU General Public License
- along with this program; if not, write to the Free Software
- Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
- */
+#include <linux/init.h> +#include <linux/delay.h> +#include <linux/slab.h> +#include <linux/pci.h> +#include <linux/module.h> +#include <sound/core.h> +#include <sound/tlv.h> +#include "../hda_codec.h" +#include "../hda_local.h"
+#include "ca0132_regs.h" +#include "dsp_os.h"
+#include "speakereq_x.h" +#include "speakereq_y.h"
+/* Enable this to see more debug messages. */ +/*#define ENABLE_CA0132_DEBUG*/ +/* Enable this to manual select HP/Speaker and AMic1/DMic. */ +#define ENABLE_MANUAL_SELECT +/* Enable this to see controls for tuning purpose. */ +/*#define ENABLE_TUNING_CONTROLS*/
+#define FLOAT_ZERO 0x00000000 +#define FLOAT_ONE 0x3f800000 +#define FLOAT_TWO 0x40000000 +#define FLOAT_MINUS_5 0xc0a00000
+#define UNSOL_TAG_HP 0x0f +#define UNSOL_TAG_DMIC 0x14 +#define UNSOL_TAG_AMIC1 0x15 +#define UNSOL_TAG_DSP 0x16
+#define SUCCEEDED(_x) (((int)(_x)) >= 0) +#define FAILED(_x) (((int)(_x)) < 0) +#define CT_OK (0) +#define CT_FAIL (-1)
+#define MIN(x, y) (((x) < (y)) ? (x) : (y)) +#define MAX(x, y) (((x) > (y)) ? (x) : (y))
+#define DSP_DMA_WRITE_BUFLEN_INIT (1UL<<18) +#define DSP_DMA_WRITE_BUFLEN_OVLY (1UL<<15)
+#define DMA_TRANSFER_FRAME_SIZE_NWORDS 8 +#define DMA_TRANSFER_MAX_FRAME_SIZE_NWORDS 32 +#define DMA_OVERLAY_FRAME_SIZE_NWORDS 2
+#define MASTERCONTROL 0x80 +#define MASTERCONTROL_ALLOC_DMA_CHAN 9 +#define MASTERCONTROL_QUERY_SPEAKER_EQ_ADDRESS 22
+#define WIDGET_CHIP_CTRL 0x15 +#define WIDGET_DSP_CTRL 0x16
+#define MEM_CONNID_MICIN1 3 +#define MEM_CONNID_MICIN2 5 +#define MEM_CONNID_MICOUT1 12 +#define MEM_CONNID_MICOUT2 14 +#define MEM_CONNID_WUH 10 +#define MEM_CONNID_DSP 16
+#define SCP_SET 0 +#define SCP_GET 1
+/* Debug message controls */ +#ifdef ENABLE_CA0132_DEBUG
+#define CTASSERT(x) \
- { if (!(x)) snd_printdd(KERN_ERR "CTASSERT failed.\n"); }
+#define CA0132_LOG(fmt, args...) snd_printdd(fmt, ##args) +#define CA0132_DSP_LOG(msg) snd_printdd(KERN_INFO "[%s]\n", msg) +#define FAIL_MSG(n, s) fail_debug_out(n, s)
+static int fail_debug_out(int status, const char *s) +{
- snd_printdd(KERN_ERR "[%s]\n", s);
- return status;
+} +#else
+#define CTASSERT(x) do { } while (0) +#define CA0132_LOG(fmt, args...) do { } while (0) +#define CA0132_DSP_LOG(msg) do { } while (0) +#define FAIL_MSG(n, s) fail_debug_out(n, s)
+static int fail_debug_out(int status, const char *s) +{
- return status;
+} +#endif
+static char *dirstr[2] = { "Playback", "Capture" };
+enum {
- SPEAKER_OUT,
- HEADPHONE_OUT
+};
+enum {
- DIGITAL_MIC,
- LINE_MIC_IN
+};
+enum { +#define VNODE_START_NID 0x80
- VNID_HP = VNODE_START_NID, /* Headphone vnid */
- VNID_SPK, /* Speaker vnid */
- VNID_DMIC,
- VNID_AMIC1,
+#ifdef ENABLE_MANUAL_SELECT
- VNID_HP_SEL,
- VNID_AMIC1_SEL,
+#endif
- VNODE_END_NID,
+#define VNODES_COUNT (VNODE_END_NID - VNODE_START_NID)
+#define EFFECT_START_NID 0x90 +#define OUT_EFFECT_START_NID EFFECT_START_NID
- SURROUND = OUT_EFFECT_START_NID,
- CRYSTALIZER,
- DIALOG_PLUS,
- SMART_VOLUME,
- X_BASS,
- EQUALIZER,
- OUT_EFFECT_END_NID,
+#define OUT_EFFECTS_COUNT (OUT_EFFECT_END_NID - OUT_EFFECT_START_NID)
+#define IN_EFFECT_START_NID OUT_EFFECT_END_NID
- ECHO_CANCELLATION = IN_EFFECT_START_NID,
- VOICE_FOCUS,
- MIC_SVM,
- IN_EFFECT_END_NID,
+#define IN_EFFECTS_COUNT (IN_EFFECT_END_NID - IN_EFFECT_START_NID)
- VOICEFX = IN_EFFECT_END_NID,
- PLAY_ENHANCEMENT,
- CRYSTAL_VOICE,
- EFFECT_END_NID
+#define EFFECTS_COUNT (EFFECT_END_NID - EFFECT_START_NID) +};
+/* Effects values size*/ +#define EFFECT_VALS_MAX_COUNT 12
+struct ct_effect {
- char name[44];
- hda_nid_t nid;
- int mid; /*effect module ID*/
- int reqs[EFFECT_VALS_MAX_COUNT]; /*effect module request*/
- int direct; /* 0:output; 1:input*/
- int params; /* number of default non-on/off params */
- /*effect default values, 1st is on/off. */
- float def_vals[EFFECT_VALS_MAX_COUNT];
+};
+static struct ct_effect ca0132_effects[EFFECTS_COUNT] = {
- { "Surround",
SURROUND,
0x96,
{0, 1},
0,
1,
{1.00, 0.67}
- },
- { "Crystalizer",
CRYSTALIZER,
0x96,
{7, 8},
0,
1,
{1.00, 0.65}
- },
- { "Dialog Plus",
DIALOG_PLUS,
0x96,
{2, 3},
0,
1,
{0.00, 0.50}
- },
- { "Smart Volume",
SMART_VOLUME,
0x96,
{4, 5, 6},
0,
2,
{1.00, 0.74, 0.00}
- },
- { "X-Bass",
X_BASS,
0x96,
{24, 23, 25},
0,
2,
{1.00, 80.00, 0.50}
- },
- { "Equalizer",
EQUALIZER,
0x96,
{9, 10, 11, 12, 13, 14,
15, 16, 17, 18, 19, 20},
0,
11,
{0.00, 0.00, 0.00, 0.00, 0.00, 0.00,
0.00, 0.00, 0.00, 0.00, 0.00, 0.00}
- },
- { "Echo Cancellation",
ECHO_CANCELLATION,
0x95,
{0, 1, 2, 3},
1,
3,
{0.00, 0.72886, 0.00, 0.00}
- },
- { "Voice Focus",
VOICE_FOCUS,
0x95,
{6, 7, 8, 9},
1,
3,
{1.00, 0.50, 30.00, 30.00}
- },
- { "Mic SVM",
MIC_SVM,
0x95,
{44, 45},
1,
1,
{0.00, 0.74}
- },
- { "VoiceFX",
VOICEFX,
0x95,
{10, 11, 12, 13, 14, 15, 16, 17, 18},
1,
8,
{0.00, 400.00, 1400.00, 2000.00, 1.00, 1.00, 1.00, 0.00, 0.00}
- }
+};
+/* Tuning controls */ +#ifdef ENABLE_TUNING_CONTROLS
+enum { +#define TUNING_CTL_START_NID 0xC0
- WEDGE_ANGLE = TUNING_CTL_START_NID,
- SVM_LEVEL,
- EQUALIZER_BAND_0,
- EQUALIZER_BAND_1,
- EQUALIZER_BAND_2,
- EQUALIZER_BAND_3,
- EQUALIZER_BAND_4,
- EQUALIZER_BAND_5,
- EQUALIZER_BAND_6,
- EQUALIZER_BAND_7,
- EQUALIZER_BAND_8,
- EQUALIZER_BAND_9,
- TUNING_CTL_END_NID
+#define TUNING_CTLS_COUNT (TUNING_CTL_END_NID - TUNING_CTL_START_NID) +};
+struct ct_tuning_ctl {
- char name[44];
- hda_nid_t parent_nid;
- hda_nid_t nid;
- int mid; /*effect module ID*/
- int req; /*effect module request*/
- int direct; /* 0:output; 1:input*/
- float def_val;/*effect default values*/
+};
+static struct ct_tuning_ctl ca0132_tuning_ctls[] = {
- { "Wedge Angle",
VOICE_FOCUS,
WEDGE_ANGLE,
0x95,
8,
1,
30.00
- },
- { "SVM Level",
MIC_SVM,
SVM_LEVEL,
0x95,
45,
1,
0.74
- },
- { "EQ Band0",
EQUALIZER,
EQUALIZER_BAND_0,
0x96,
11,
0,
0
- },
- { "EQ Band1",
EQUALIZER,
EQUALIZER_BAND_1,
0x96,
12,
0,
0
- },
- { "EQ Band2",
EQUALIZER,
EQUALIZER_BAND_2,
0x96,
13,
0,
0
- },
- { "EQ Band3",
EQUALIZER,
EQUALIZER_BAND_3,
0x96,
14,
0,
0
- },
- { "EQ Band4",
EQUALIZER,
EQUALIZER_BAND_4,
0x96,
15,
0,
0
- },
- { "EQ Band5",
EQUALIZER,
EQUALIZER_BAND_5,
0x96,
16,
0,
0
- },
- { "EQ Band6",
EQUALIZER,
EQUALIZER_BAND_6,
0x96,
17,
0,
0
- },
- { "EQ Band7",
EQUALIZER,
EQUALIZER_BAND_7,
0x96,
18,
0,
0
- },
- { "EQ Band8",
EQUALIZER,
EQUALIZER_BAND_8,
0x96,
19,
0,
0
- },
- { "EQ Band9",
EQUALIZER,
EQUALIZER_BAND_9,
0x96,
20,
0,
0
- }
+}; +#endif
+/* Voice FX Presets */ +#define VOICEFX_MAX_PARAM_COUNT 9
+struct ct_voicefx {
- char *name;
- hda_nid_t nid;
- int mid;
- int reqs[VOICEFX_MAX_PARAM_COUNT]; /*effect module request*/
+};
+struct ct_voicefx_preset {
- char *name; /*preset name*/
- float vals[VOICEFX_MAX_PARAM_COUNT];
+};
+struct ct_voicefx ca0132_voicefx = {
- "VoiceFX Capture Switch",
- VOICEFX,
- 0x95,
- {10, 11, 12, 13, 14, 15, 16, 17, 18}
+};
+struct ct_voicefx_preset ca0132_voicefx_presets[] = {
- { "Neutral",
{ 0.000000E+000, 4.000000E+002, 1.400000E+003,
2.000000E+003, 1.000000E+000, 1.000000E+000,
1.000000E+000, 0.000000E+000, 0.000000E+000 }
- },
- { "Female2Male",
{ 1.000000E+000, 4.000000E+002, 1.400000E+003,
2.000000E+003, 6.000000E-001, 1.050000E+000,
1.000000E+000, 0.000000E+000, 0.000000E+000 }
- },
- { "Male2Female",
{ 1.000000E+000, 4.000000E+002, 1.400000E+003,
2.220000E+003, 2.370000E+000, 9.200000E-001,
1.000000E+000, 0.000000E+000, 0.000000E+000 }
- },
- { "ScrappyKid",
{ 1.000000E+000, 4.000000E+002, 1.400000E+003,
2.000000E+003, 3.000000E+000, 6.600000E-001,
1.000000E+000, 0.000000E+000, 0.000000E+000 }
- },
- { "Elderly",
{ 1.000000E+000, 7.130000E+002, 1.500000E+003,
1.800000E+003, 1.400000E+000, 1.450000E+000,
1.000000E+000, 1.818171E-001, 0.000000E+000 }
- },
- { "Org",
{ 1.000000E+000, 4.680000E+002, 1.321000E+003,
2.200000E+003, 6.500000E-001, 1.500000E+000,
1.000000E+000, 0.000000E+000, 0.000000E+000 }
- },
- { "Elf",
{ 1.000000E+000, 3.980000E+002, 1.395000E+003,
2.451000E+003, 1.110000E+000, 9.600000E-001,
1.000000E+000, 0.000000E+000, 0.000000E+000 }
- },
- { "Dwarf",
{ 1.000000E+000, 2.940000E+002, 1.527000E+003,
2.055000E+003, 7.700000E-001, 9.700000E-001,
1.000000E+000, 0.000000E+000, 0.000000E+000 }
- },
- { "AlienBrute",
{ 1.000000E+000, 3.835443E+002, 1.428496E+003,
2.550000E+003, 6.500000E-001, 1.311318E+000,
1.000000E+000, 3.000000E-002, 0.000000E+000 }
- },
- { "Robot",
{ 1.000000E+000, 4.000000E+002, 1.400000E+003,
2.000000E+003, 1.394090E+000, 1.000000E+000,
-8.239998E-003, 0.000000E+000, 0.000000E+000 }
- },
- { "Marine",
{ 1.000000E+000, 3.880000E+002, 1.155000E+003,
1.848000E+003, 8.000000E-001, 1.080000E+000,
5.400000E-001, 0.000000E+000, 0.000000E+000 }
- },
- { "Emo",
{ 1.000000E+000, 4.000000E+002, 1.400000E+003,
2.000000E+003, 1.000000E+000, 1.000000E+000,
2.000000E-001, 0.000000E+000, 0.000000E+000 }
- },
- { "DeepVoice",
{ 1.000000E+000, 3.395443E+002, 1.362496E+003,
2.046000E+003, 4.291186E-001, 1.201318E+000,
1.000000E+000, 0.000000E+000, 0.000000E+000 }
- },
- { "Munchkin",
{ 1.000000E+000, 4.000000E+002, 1.400000E+003,
2.000000E+003, 6.016271E-001, 1.000000E+000,
1.000000E+000, 0.000000E+000, 0.000000E+000 }
- }
+};
+enum hda_cmd_vendor_io {
- /* for DspIO node */
- VENDOR_DSPIO_SCP_WRITE_DATA_LOW = 0x000,
- VENDOR_DSPIO_SCP_WRITE_DATA_HIGH = 0x100,
- VENDOR_DSPIO_STATUS = 0xF01,
- VENDOR_DSPIO_SCP_POST_READ_DATA = 0x702,
- VENDOR_DSPIO_SCP_READ_DATA = 0xF02,
- VENDOR_DSPIO_DSP_INIT = 0x703,
- VENDOR_DSPIO_SCP_POST_COUNT_QUERY = 0x704,
- VENDOR_DSPIO_SCP_READ_COUNT = 0xF04,
- /* for ChipIO node */
- VENDOR_CHIPIO_ADDRESS_LOW = 0x000,
- VENDOR_CHIPIO_ADDRESS_HIGH = 0x100,
- VENDOR_CHIPIO_STREAM_FORMAT = 0x200,
- VENDOR_CHIPIO_DATA_LOW = 0x300,
- VENDOR_CHIPIO_DATA_HIGH = 0x400,
- VENDOR_CHIPIO_GET_PARAMETER = 0xF00,
- VENDOR_CHIPIO_STATUS = 0xF01,
- VENDOR_CHIPIO_HIC_POST_READ = 0x702,
- VENDOR_CHIPIO_HIC_READ_DATA = 0xF03,
- VENDOR_CHIPIO_8051_DATA_WRITE = 0x707,
- VENDOR_CHIPIO_8051_DATA_READ = 0xF07,
- VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE = 0x70A,
- VENDOR_CHIPIO_CT_EXTENSIONS_GET = 0xF0A,
- VENDOR_CHIPIO_PLL_PMU_WRITE = 0x70C,
- VENDOR_CHIPIO_PLL_PMU_READ = 0xF0C,
- VENDOR_CHIPIO_8051_ADDRESS_LOW = 0x70D,
- VENDOR_CHIPIO_8051_ADDRESS_HIGH = 0x70E,
- VENDOR_CHIPIO_FLAG_SET = 0x70F,
- VENDOR_CHIPIO_FLAGS_GET = 0xF0F,
- VENDOR_CHIPIO_PARAM_SET = 0x710,
- VENDOR_CHIPIO_PARAM_GET = 0xF10,
- VENDOR_CHIPIO_PORT_ALLOC_CONFIG_SET = 0x711,
- VENDOR_CHIPIO_PORT_ALLOC_SET = 0x712,
- VENDOR_CHIPIO_PORT_ALLOC_GET = 0xF12,
- VENDOR_CHIPIO_PORT_FREE_SET = 0x713,
- VENDOR_CHIPIO_PARAM_EX_ID_GET = 0xF17,
- VENDOR_CHIPIO_PARAM_EX_ID_SET = 0x717,
- VENDOR_CHIPIO_PARAM_EX_VALUE_GET = 0xF18,
- VENDOR_CHIPIO_PARAM_EX_VALUE_SET = 0x718,
- VENDOR_CHIPIO_DMIC_CTL_SET = 0x788,
- VENDOR_CHIPIO_DMIC_CTL_GET = 0xF88,
- VENDOR_CHIPIO_DMIC_PIN_SET = 0x789,
- VENDOR_CHIPIO_DMIC_PIN_GET = 0xF89,
- VENDOR_CHIPIO_DMIC_MCLK_SET = 0x78A,
- VENDOR_CHIPIO_DMIC_MCLK_GET = 0xF8A
+};
+enum control_flag_id {
- /* Connection manager stream setup is bypassed/enabled */
- CONTROL_FLAG_C_MGR = 0,
- /* DSP DMA is bypassed/enabled */
- CONTROL_FLAG_DMA = 1,
- /* 8051 'idle' mode is disabled/enabled */
- CONTROL_FLAG_IDLE_ENABLE = 2,
- /* Tracker for the SPDIF-in path is bypassed/enabled */
- CONTROL_FLAG_TRACKER = 3,
- /* DigitalOut to Spdif2Out connection is disabled/enabled */
- CONTROL_FLAG_SPDIF2OUT = 4,
- /* Digital Microphone is disabled/enabled */
- CONTROL_FLAG_DMIC = 5,
- /* ADC_B rate is 48 kHz/96 kHz */
- CONTROL_FLAG_ADC_B_96KHZ = 6,
- /* ADC_C rate is 48 kHz/96 kHz */
- CONTROL_FLAG_ADC_C_96KHZ = 7,
- /* DAC rate is 48 kHz/96 kHz (affects all DACs) */
- CONTROL_FLAG_DAC_96KHZ = 8,
- /* DSP rate is 48 kHz/96 kHz */
- CONTROL_FLAG_DSP_96KHZ = 9,
- /* SRC clock is 98 MHz/196 MHz (196 MHz forces rate to 96 KHz) */
- CONTROL_FLAG_SRC_CLOCK_196MHZ = 10,
- /* SRC rate is 48 kHz/96 kHz (48 kHz disabled when clock is 196 MHz) */
- CONTROL_FLAG_SRC_RATE_96KHZ = 11,
- /* Decode Loop (DSP->SRC->DSP) is disabled/enabled */
- CONTROL_FLAG_DECODE_LOOP = 12,
- /* De-emphasis filter on DAC-1 disabled/enabled */
- CONTROL_FLAG_DAC1_DEEMPHASIS = 13,
- /* De-emphasis filter on DAC-2 disabled/enabled */
- CONTROL_FLAG_DAC2_DEEMPHASIS = 14,
- /* De-emphasis filter on DAC-3 disabled/enabled */
- CONTROL_FLAG_DAC3_DEEMPHASIS = 15,
- /* High-pass filter on ADC_B disabled/enabled */
- CONTROL_FLAG_ADC_B_HIGH_PASS = 16,
- /* High-pass filter on ADC_C disabled/enabled */
- CONTROL_FLAG_ADC_C_HIGH_PASS = 17,
- /* Common mode on Port_A disabled/enabled */
- CONTROL_FLAG_PORT_A_COMMON_MODE = 18,
- /* Common mode on Port_D disabled/enabled */
- CONTROL_FLAG_PORT_D_COMMON_MODE = 19,
- /* Impedance for ramp generator on Port_A 16 Ohm/10K Ohm */
- CONTROL_FLAG_PORT_A_10KOHM_LOAD = 20,
- /* Impedance for ramp generator on Port_D, 16 Ohm/10K Ohm */
- CONTROL_FLAG_PORT_D_10KOHM_LOAD = 21,
- /* ASI rate is 48kHz/96kHz */
- CONTROL_FLAG_ASI_96KHZ = 22,
- /* DAC power settings able to control attached ports no/yes */
- CONTROL_FLAG_DACS_CONTROL_PORTS = 23,
- /* Clock Stop OK reporting is disabled/enabled */
- CONTROL_FLAG_CONTROL_STOP_OK_ENABLE = 24,
- /* Number of control flags */
- CONTROL_FLAGS_MAX = (CONTROL_FLAG_CONTROL_STOP_OK_ENABLE+1)
+};
+enum control_param_id {
- /* 0: force HDA, 1: allow DSP if HDA Spdif1Out stream is idle */
- CONTROL_PARAM_SPDIF1_SOURCE = 2,
- /* Stream Control */
- /* Select stream with the given ID */
- CONTROL_PARAM_STREAM_ID = 24,
- /* Source connection point for the selected stream */
- CONTROL_PARAM_STREAM_SOURCE_CONN_POINT = 25,
- /* Destination connection point for the selected stream */
- CONTROL_PARAM_STREAM_DEST_CONN_POINT = 26,
- /* Number of audio channels in the selected stream */
- CONTROL_PARAM_STREAMS_CHANNELS = 27,
- /*Enable control for the selected stream */
- CONTROL_PARAM_STREAM_CONTROL = 28,
- /* Connection Point Control */
- /* Select connection point with the given ID */
- CONTROL_PARAM_CONN_POINT_ID = 29,
- /* Connection point sample rate */
- CONTROL_PARAM_CONN_POINT_SAMPLE_RATE = 30,
- /* Node Control */
- /* Select HDA node with the given ID */
- CONTROL_PARAM_NODE_ID = 31
+};
+enum hda_vendor_status_dspio {
- /* Success */
- VENDOR_STATUS_DSPIO_OK = 0x00,
- /* Busy, unable to accept new command, the host must retry */
- VENDOR_STATUS_DSPIO_BUSY = 0x01,
- /* SCP command queue is full */
- VENDOR_STATUS_DSPIO_SCP_COMMAND_QUEUE_FULL = 0x02,
- /* SCP response queue is empty */
- VENDOR_STATUS_DSPIO_SCP_RESPONSE_QUEUE_EMPTY = 0x03
+};
+enum hda_vendor_status_chipio {
- /* Success */
- VENDOR_STATUS_CHIPIO_OK = 0x00,
- /* Busy, unable to accept new command, the host must retry */
- VENDOR_STATUS_CHIPIO_BUSY = 0x01
+};
+enum ca0132_sample_rate {
- SR_6_000 = 0x00,
- SR_8_000 = 0x01,
- SR_9_600 = 0x02,
- SR_11_025 = 0x03,
- SR_16_000 = 0x04,
- SR_22_050 = 0x05,
- SR_24_000 = 0x06,
- SR_32_000 = 0x07,
- SR_44_100 = 0x08,
- SR_48_000 = 0x09,
- SR_88_200 = 0x0A,
- SR_96_000 = 0x0B,
- SR_144_000 = 0x0C,
- SR_176_400 = 0x0D,
- SR_192_000 = 0x0E,
- SR_384_000 = 0x0F,
- SR_COUNT = 0x10,
- SR_RATE_UNKNOWN = 0x1F
+};
+enum dsp_download_state {
- DSP_DOWNLOAD_FAILED = -1,
- DSP_DOWNLOAD_INIT = 0,
- DSP_DOWNLOADING = 1,
- DSP_DOWNLOADED = 2
+};
+struct hda_stream_format {
- unsigned int sample_rate;
- unsigned short valid_bits_per_sample;
- unsigned short container_size;
- unsigned short number_channels;
+};
+/* retrieve parameters from hda format */ +#define get_hdafmt_chs(fmt) (fmt & 0xf) +#define get_hdafmt_bits(fmt) ((fmt >> 4) & 0x7) +#define get_hdafmt_rate(fmt) ((fmt >> 8) & 0x7f) +#define get_hdafmt_type(fmt) ((fmt >> 15) & 0x1)
+struct ca0132_spec {
- struct snd_kcontrol_new *mixers[5];
- unsigned int num_mixers;
- const struct hda_verb *base_init_verbs;
- const struct hda_verb *base_exit_verbs;
- const struct hda_verb *init_verbs[5];
- unsigned int num_init_verbs; /* exclude base init verbs */
- /* Nodes configurations */
- struct hda_multi_out multiout;
- hda_nid_t out_pins[5];
- hda_nid_t dacs[5];
- unsigned int num_outputs;
- hda_nid_t input_pins[5];
- hda_nid_t adcs[5];
- unsigned int num_inputs;
- hda_nid_t shared_mic_nid;
- hda_nid_t shared_out_nid;
- struct hda_pcm pcm_rec[5]; /* PCM information */
- /* chip access */
- struct mutex chipio_mutex; /* chip access mutex */
- u32 curr_chip_addx;
- /* DSP download related */
- enum dsp_download_state dsp_state;
- unsigned int dsp_stream_id;
- unsigned int wait_scp;
- unsigned int wait_scp_header;
- unsigned int wait_num_data;
- unsigned int scp_resp_header;
- unsigned int scp_resp_data[4];
- unsigned int scp_resp_count;
- /* mixer and effects related */
- unsigned char dmic_ctl;
- int cur_out_type;
- int cur_mic_type;
- long vnode_lvol[VNODES_COUNT];
- long vnode_rvol[VNODES_COUNT];
- long vnode_lswitch[VNODES_COUNT];
- long vnode_rswitch[VNODES_COUNT];
- long effects_switch[EFFECTS_COUNT];
- long voicefx_val;
- long cur_mic_boost;
- #ifdef ENABLE_TUNING_CONTROLS
- long cur_ctl_vals[TUNING_CTLS_COUNT];
- #endif
+};
+/*
- CA0132 codec access
- */
+unsigned int codec_send_command(struct hda_codec *codec, hda_nid_t nid,
unsigned int verb, unsigned int parm, unsigned int *res)
+{
- unsigned int response;
- response = snd_hda_codec_read(codec, nid, 0, verb, parm);
- *res = response;
- return ((response == -1) ? CT_FAIL : CT_OK);
+}
+static int codec_set_converter_format(struct hda_codec *codec, hda_nid_t nid,
unsigned short converter_format, unsigned int *res)
+{
- return codec_send_command(codec, nid, VENDOR_CHIPIO_STREAM_FORMAT,
converter_format & 0xffff, res);
+}
+static int codec_set_converter_stream_channel(struct hda_codec *codec,
hda_nid_t nid, unsigned char stream,
unsigned char channel, unsigned int *res)
+{
- unsigned char converter_stream_channel = 0;
- converter_stream_channel = (stream << 4) | (channel & 0x0f);
- return codec_send_command(codec, nid, AC_VERB_SET_CHANNEL_STREAMID,
converter_stream_channel, res);
+}
+/*
- CA0132 chip access stuffs
- */
+static int chipio_send(struct hda_codec *codec,
unsigned int reg,
u32 data)
+{
- unsigned int res;
- int retry = 50;
- /* send bits of data specified by reg */
- do {
res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0,
reg, data);
if (res == VENDOR_STATUS_CHIPIO_OK)
return CT_OK;
- } while (--retry);
- CTASSERT(0);
- return CT_FAIL;
+}
+static int chipio_write_addx(struct hda_codec *codec, u32 chip_addx) +{
- struct ca0132_spec *spec = codec->spec;
- int status = CT_OK;
- if (spec->curr_chip_addx == chip_addx)
return CT_OK;
- /* send low 16 bits of the address */
- status = chipio_send(codec, VENDOR_CHIPIO_ADDRESS_LOW,
chip_addx & 0xffff);
- if (SUCCEEDED(status)) {
/* send high 16 bits of the address */
status = chipio_send(codec, VENDOR_CHIPIO_ADDRESS_HIGH,
chip_addx >> 16);
- }
- CTASSERT(SUCCEEDED(status));
- spec->curr_chip_addx = SUCCEEDED(status) ? chip_addx : ~0UL;
- return status;
+}
+static int chipio_write_data(struct hda_codec *codec, u32 data) +{
- struct ca0132_spec *spec = codec->spec;
- int status = CT_OK;
- /* send low 16 bits of the data */
- status = chipio_send(codec, VENDOR_CHIPIO_DATA_LOW, data & 0xffff);
- if (SUCCEEDED(status)) {
/* send high 16 bits of the data */
status = chipio_send(codec, VENDOR_CHIPIO_DATA_HIGH,
data >> 16);
- }
- CTASSERT(SUCCEEDED(status));
- spec->curr_chip_addx = SUCCEEDED(status) ?
(spec->curr_chip_addx + 4) : ~0UL;
- return status;
+}
+static int chipio_write_data_multiple(struct hda_codec *codec,
const u32 *data,
unsigned int count)
+{
- int status = CT_OK;
- if (data == NULL)
return FAIL_MSG(CT_FAIL, "chipio_write_data null ptr");
- while ((count-- != 0) && (status == CT_OK))
status = chipio_write_data(codec, *data++);
- return status;
+}
+static int chipio_read_data(struct hda_codec *codec, unsigned int *data) +{
- struct ca0132_spec *spec = codec->spec;
- int status = CT_OK;
- /* post read */
- status = chipio_send(codec, VENDOR_CHIPIO_HIC_POST_READ, 0);
- if (SUCCEEDED(status)) {
/* read status */
status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0);
- }
- if (SUCCEEDED(status)) {
/* read data */
*data = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0,
VENDOR_CHIPIO_HIC_READ_DATA, 0);
- }
- CTASSERT(SUCCEEDED(status));
- spec->curr_chip_addx = SUCCEEDED(status) ?
(spec->curr_chip_addx + 4) : ~0UL;
- return status;
+}
+static int chipio_write(struct hda_codec *codec, u32 chip_addx,
const u32 data)
+{
- struct ca0132_spec *spec = codec->spec;
- int status;
- mutex_lock(&spec->chipio_mutex);
- status = chipio_write_addx(codec, chip_addx);
- if (SUCCEEDED(status))
status = chipio_write_data(codec, data);
- mutex_unlock(&spec->chipio_mutex);
- return status;
+}
+static int chipio_write_multiple(struct hda_codec *codec,
u32 chip_addx,
const u32 *data,
unsigned int count)
+{
- struct ca0132_spec *spec = codec->spec;
- int status;
- mutex_lock(&spec->chipio_mutex);
- status = chipio_write_addx(codec, chip_addx);
- if (SUCCEEDED(status))
status = chipio_write_data_multiple(codec, data, count);
- mutex_unlock(&spec->chipio_mutex);
- return status;
+}
+static int chipio_read(struct hda_codec *codec, u32 chip_addx,
unsigned int *data)
+{
- struct ca0132_spec *spec = codec->spec;
- int status;
- mutex_lock(&spec->chipio_mutex);
- status = chipio_write_addx(codec, chip_addx);
- if (SUCCEEDED(status))
status = chipio_read_data(codec, data);
- mutex_unlock(&spec->chipio_mutex);
- return status;
+}
+static void chipio_set_control_flag(struct hda_codec *codec,
enum control_flag_id flag_id,
bool flag_state)
+{
- unsigned int val;
- unsigned int flag_bit;
- flag_bit = (flag_state ? 1 : 0);
- val = (flag_bit << 7) | (flag_id);
- snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
VENDOR_CHIPIO_FLAG_SET, val);
+}
+static void chipio_set_control_param(struct hda_codec *codec,
enum control_param_id param_id, int param_val)
+{
- struct ca0132_spec *spec = codec->spec;
- int val;
- if ((param_id < 32) && (param_val < 8)) {
val = (param_val << 5) | (param_id);
snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
VENDOR_CHIPIO_PARAM_SET, val);
- } else {
mutex_lock(&spec->chipio_mutex);
if (chipio_send(codec, VENDOR_CHIPIO_STATUS, 0) == CT_OK) {
snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
VENDOR_CHIPIO_PARAM_EX_ID_SET,
param_id);
snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
VENDOR_CHIPIO_PARAM_EX_VALUE_SET,
param_val);
} else
CA0132_LOG("set_control_param:FAIL! id=0x%x, val=%d\n",
param_id, param_val);
mutex_unlock(&spec->chipio_mutex);
- }
+}
+static void chipio_set_conn_rate(struct hda_codec *codec,
int connid, enum ca0132_sample_rate rate)
+{
- chipio_set_control_param(codec, CONTROL_PARAM_CONN_POINT_ID, connid);
- chipio_set_control_param(codec, CONTROL_PARAM_CONN_POINT_SAMPLE_RATE,
rate);
+}
+static void chipio_enable_clocks(struct hda_codec *codec) +{
- struct ca0132_spec *spec = codec->spec;
- mutex_lock(&spec->chipio_mutex);
- snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
VENDOR_CHIPIO_8051_ADDRESS_LOW, 0);
- snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
VENDOR_CHIPIO_PLL_PMU_WRITE, 0xff);
- snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
VENDOR_CHIPIO_8051_ADDRESS_LOW, 5);
- snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
VENDOR_CHIPIO_PLL_PMU_WRITE, 0x0b);
- snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
VENDOR_CHIPIO_8051_ADDRESS_LOW, 6);
- snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
VENDOR_CHIPIO_PLL_PMU_WRITE, 0xff);
- mutex_unlock(&spec->chipio_mutex);
+}
+/*
- CA0132 DSP IO stuffs
- */
+static int dspio_send(struct hda_codec *codec, unsigned int reg,
unsigned int data)
+{
- unsigned int res;
- int retry = 50;
- /* send bits of data specified by reg to dsp */
- do {
res = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0, reg, data);
if ((res >= 0) && (res != VENDOR_STATUS_DSPIO_BUSY))
return res;
- } while (--retry);
- CTASSERT(retry);
- return CT_FAIL;
+}
+static void dspio_write_wait(struct hda_codec *codec) +{
- int cur_val, prv_val;
- int retry = 50;
- cur_val = 0;
- do {
prv_val = cur_val;
msleep(20);
dspio_send(codec, VENDOR_DSPIO_SCP_POST_COUNT_QUERY, 1);
dspio_send(codec, VENDOR_DSPIO_STATUS, 0);
cur_val = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0,
VENDOR_DSPIO_SCP_READ_COUNT, 0);
- } while (cur_val && (cur_val == prv_val) && --retry);
+}
+static int dspio_write(struct hda_codec *codec, unsigned int scp_data) +{
- struct ca0132_spec *spec = codec->spec;
- int status;
- dspio_write_wait(codec);
- mutex_lock(&spec->chipio_mutex);
- status = dspio_send(codec, VENDOR_DSPIO_SCP_WRITE_DATA_LOW,
scp_data & 0xffff);
- if (SUCCEEDED(status))
status = dspio_send(codec, VENDOR_DSPIO_SCP_WRITE_DATA_HIGH,
scp_data >> 16);
- mutex_unlock(&spec->chipio_mutex);
- /* OK, now check if the write itself has executed*/
- if (SUCCEEDED(status))
status = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0,
VENDOR_DSPIO_STATUS, 0);
- if (status == VENDOR_STATUS_DSPIO_SCP_COMMAND_QUEUE_FULL)
CA0132_LOG("dspio_write: SCP_COMMAND_QUEUE_FULL!!!\n\n");
- return (status == VENDOR_STATUS_DSPIO_SCP_COMMAND_QUEUE_FULL) ?
CT_FAIL : CT_OK;
+}
+static int dspio_write_multiple(struct hda_codec *codec,
unsigned int *buffer, unsigned int size)
+{
- int status = CT_OK;
- unsigned int count;
- if ((buffer == NULL))
return CT_FAIL;
- count = 0;
- while (count < size) {
status = dspio_write(codec, *buffer++);
if (status != CT_OK)
break;
count++;
- }
- return status;
+}
+static int dspio_read(struct hda_codec *codec, unsigned int *data) +{
- int status;
- status = dspio_send(codec, VENDOR_DSPIO_SCP_POST_READ_DATA, 0);
- if (SUCCEEDED(status))
status = dspio_send(codec, VENDOR_DSPIO_STATUS, 0);
- if (FAILED(status)
|| (status == VENDOR_STATUS_DSPIO_SCP_RESPONSE_QUEUE_EMPTY))
return CT_FAIL;
- *data = snd_hda_codec_read(codec, WIDGET_DSP_CTRL, 0,
VENDOR_DSPIO_SCP_READ_DATA, 0);
- return CT_OK;
+}
+static int dspio_read_multiple(struct hda_codec *codec, unsigned int *buffer,
unsigned int *buf_size, unsigned int size_count)
+{
- int status = CT_OK;
- unsigned int size = *buf_size;
- unsigned int count;
- unsigned int skip_count;
- unsigned int dummy;
- if ((buffer == NULL))
return CT_FAIL;
- count = 0;
- while (count < size && count < size_count) {
status = dspio_read(codec, buffer++);
if (status != CT_OK)
break;
count++;
- }
- skip_count = count;
- if (SUCCEEDED(status)) {
while (skip_count < size) {
status = dspio_read(codec, &dummy);
if (status != CT_OK)
break;
skip_count++;
}
- }
- *buf_size = count;
- return status;
+}
+static inline unsigned int +make_scp_header(unsigned int target_id, unsigned int source_id,
unsigned int get_flag, unsigned int req,
unsigned int device_flag, unsigned int resp_flag,
unsigned int error_flag, unsigned int data_size)
+{
- unsigned int header = 0;
- header = (data_size & 0x1f) << 27;
- header |= (error_flag & 0x01) << 26;
- header |= (resp_flag & 0x01) << 25;
- header |= (device_flag & 0x01) << 24;
- header |= (req & 0x7f) << 17;
- header |= (get_flag & 0x01) << 16;
- header |= (source_id & 0xff) << 8;
- header |= target_id & 0xff;
- return header;
+}
+static inline void +extract_scp_header(unsigned int header,
unsigned int *target_id, unsigned int *source_id,
unsigned int *get_flag, unsigned int *req,
unsigned int *device_flag, unsigned int *resp_flag,
unsigned int *error_flag, unsigned int *data_size)
+{
- if (data_size)
*data_size = (header >> 27) & 0x1f;
- if (error_flag)
*error_flag = (header >> 26) & 0x01;
- if (resp_flag)
*resp_flag = (header >> 25) & 0x01;
- if (device_flag)
*device_flag = (header >> 24) & 0x01;
- if (req)
*req = (header >> 17) & 0x7f;
- if (get_flag)
*get_flag = (header >> 16) & 0x01;
- if (source_id)
*source_id = (header >> 8) & 0xff;
- if (target_id)
*target_id = header & 0xff;
+}
+#define SCP_MAX_DATA_WORDS (16)
+/* Data type to simplify using floats and integers */ +union _scp_data {
- float f;
- unsigned int ui;
+};
+/* Structure to contain any SCP message */ +struct scp_msg {
- unsigned int hdr;
- union _scp_data data[SCP_MAX_DATA_WORDS];
+};
+static void dspio_clear_response_queue(struct hda_codec *codec) +{
- unsigned int dummy = 0;
- int status = CT_FAIL;
- /* clear all from the response queue */
- do {
status = dspio_read(codec, &dummy);
- } while (status == CT_OK);
+}
+static int dspio_get_response_data(struct hda_codec *codec) +{
- struct ca0132_spec *spec = codec->spec;
- unsigned int data = 0;
- unsigned int count;
- if (FAILED(dspio_read(codec, &data)))
return CT_FAIL;
- CA0132_LOG("dspio_get_response_data: 0x%08x\n", data);
- if ((data & 0x00ffffff) == spec->wait_scp_header) {
spec->scp_resp_header = data;
spec->scp_resp_count = data >> 27;
count = spec->wait_num_data;
dspio_read_multiple(codec, spec->scp_resp_data,
&spec->scp_resp_count, count);
return CT_OK;
- }
- return CT_FAIL;
+}
+static int dspio_send_scp_message(struct hda_codec *codec,
unsigned char *send_buf,
unsigned int send_buf_size,
unsigned char *return_buf,
unsigned int return_buf_size,
unsigned int *bytes_returned)
+{
- struct ca0132_spec *spec = codec->spec;
- int retry;
- int status = CT_FAIL;
- unsigned int scp_send_size = 0;
- unsigned int total_size;
- bool waiting_for_resp = false;
- unsigned int header;
- struct scp_msg *ret_msg;
- unsigned int resp_src_id, resp_target_id;
- unsigned int data_size, src_id, target_id, get_flag, device_flag;
- if (bytes_returned)
*bytes_returned = 0;
- /* get scp header from buffer */
- header = *((unsigned int *)send_buf);
- extract_scp_header(header, &target_id, &src_id, &get_flag, NULL,
&device_flag, NULL, NULL, &data_size);
- scp_send_size = data_size + 1;
- total_size = (scp_send_size * 4);
- CTASSERT(send_buf_size >= total_size);
- if (send_buf_size < total_size)
return CT_FAIL;
- if (get_flag || device_flag) {
if (!return_buf || return_buf_size < 4 || !bytes_returned) {
CTASSERT(0);
return CT_FAIL;
}
spec->wait_scp_header = *((unsigned int *)send_buf);
/* swap source id with target id */
resp_target_id = src_id;
resp_src_id = target_id;
spec->wait_scp_header &= 0xffff0000;
spec->wait_scp_header |= (resp_src_id << 8) | (resp_target_id);
spec->wait_num_data = return_buf_size/sizeof(unsigned int) - 1;
spec->wait_scp = 1;
waiting_for_resp = true;
- }
- status = dspio_write_multiple(codec, (unsigned int *)send_buf,
scp_send_size);
- if (FAILED(status)) {
CTASSERT(0);
spec->wait_scp = 0;
return status;
- }
- if (waiting_for_resp) {
memset(return_buf, 0, return_buf_size);
retry = 50;
do {
msleep(20);
} while (spec->wait_scp && (--retry != 0));
waiting_for_resp = false;
if (retry != 0) {
ret_msg = (struct scp_msg *)return_buf;
memcpy(&ret_msg->hdr, &spec->scp_resp_header, 4);
memcpy(&ret_msg->data, spec->scp_resp_data,
spec->wait_num_data);
*bytes_returned = (spec->scp_resp_count + 1) * 4;
status = CT_OK;
} else {
CTASSERT(*bytes_returned == 0);
status = CT_FAIL;
}
spec->wait_scp = 0;
- }
- return status;
+}
+static int dspio_scp(struct hda_codec *codec,
int mod_id, int req, int dir, void *data, unsigned int len,
void *reply, unsigned int *reply_len)
+{
- int status = CT_OK;
- struct scp_msg scp_send, scp_reply;
- unsigned int ret_bytes, send_size, ret_size;
- unsigned int send_get_flag, reply_resp_flag, reply_error_flag;
- unsigned int reply_data_size;
- memset(&scp_send, 0, sizeof(scp_send));
- memset(&scp_reply, 0, sizeof(scp_reply));
- CTASSERT((len == 0 || data != NULL) && len <= SCP_MAX_DATA_WORDS);
- if ((len != 0 && data == NULL) || (len > SCP_MAX_DATA_WORDS))
return CT_FAIL;
- CTASSERT(dir != SCP_GET || reply != NULL);
- if (dir == SCP_GET && reply == NULL)
return FAIL_MSG(CT_FAIL, "dspio_scp get but has no buffer");
- CTASSERT((reply == NULL) || (reply_len != NULL && (*reply_len > 0)));
- if (reply != NULL && (reply_len == NULL || (*reply_len == 0)))
return FAIL_MSG(CT_FAIL, "dspio_scp bad resp buf len parms");
- scp_send.hdr = make_scp_header(mod_id, 0x20, (dir == SCP_GET), req,
0, 0, 0, len/sizeof(unsigned int));
- if (data != NULL && len > 0) {
len = MIN(sizeof(scp_send.data), len);
memcpy(scp_send.data, data, len);
- }
- ret_bytes = 0;
- send_size = sizeof(unsigned int) + len;
- status = dspio_send_scp_message(codec, (unsigned char *)&scp_send,
send_size, (unsigned char *)&scp_reply,
sizeof(scp_reply), &ret_bytes);
+/* for debugging */ +#ifdef ENABLE_CA0132_DEBUG +{
- unsigned int x, *p, i;
- unsigned int source_id;
- unsigned int target_id;
- unsigned int req;
- unsigned int get_flag;
- unsigned int resp_flag;
- unsigned int device_flag;
- unsigned int error_flag;
- unsigned int data_size;
- memcpy(&x, &scp_send.hdr, sizeof(unsigned int));
- extract_scp_header(x, &target_id, &source_id,
&get_flag, &req, &device_flag, &resp_flag,
&error_flag, &data_size);
- snd_printdd("ScpDispatch ----- REQ: "
"HDR=0x%08x "
"SID=%04x "
"TID=%04x "
"Req=%04x "
"GRDE=%d %d %d %d "
"Siz=%d [ ",
x,
source_id,
target_id,
req,
get_flag,
resp_flag,
device_flag,
error_flag,
data_size);
- for (x = 0; x < data_size; x++)
snd_printdd("0x%08x ", scp_send.data[x].ui);
- snd_printdd("]\n");
- if (get_flag) {
if (ret_bytes >= sizeof(scp_reply.hdr)) {
memcpy(&x, &scp_reply.hdr, sizeof(unsigned int));
extract_scp_header(x, &target_id, &source_id,
&get_flag, &req, &device_flag, &resp_flag,
&error_flag, &data_size);
snd_printdd(
" ----- REP: "
"HDR=0x%08x "
"SID=%04x "
"TID=%04x "
"Req=%04x "
"GRDE=%d %d %d %d "
"Siz=%d [ ",
x,
source_id,
target_id,
req,
get_flag,
resp_flag,
device_flag,
error_flag,
data_size);
for (x = 0; x < data_size; x++)
snd_printdd("0x%08x ", scp_reply.data[x].ui);
} else {
snd_printdd("REP: (too short,nbytes=%d) [", ret_bytes);
for (p = (unsigned int *)&scp_reply, i = 0;
i < ret_bytes; p++, i++) {
snd_printdd("0x%04x ", *p);
}
}
snd_printdd("]\n");
- }
+} +#endif
- if (FAILED(status))
return FAIL_MSG(status, "dspio_scp: send scp msg failed");
- /* extract send and reply headers members */
- extract_scp_header(scp_send.hdr, NULL, NULL, &send_get_flag,
NULL, NULL, NULL, NULL, NULL);
- extract_scp_header(scp_reply.hdr, NULL, NULL, NULL, NULL, NULL,
&reply_resp_flag, &reply_error_flag,
&reply_data_size);
- if (!send_get_flag)
return CT_OK;
- if (reply_resp_flag && !reply_error_flag) {
ret_size = (ret_bytes - sizeof(scp_reply.hdr))
/ sizeof(unsigned int);
CTASSERT(dir == SCP_GET && reply != NULL && reply_len != NULL);
if (*reply_len < ret_size*sizeof(unsigned int)) {
status = FAIL_MSG(CT_FAIL, "reply too long for buf");
} else if (ret_size != reply_data_size) {
status = FAIL_MSG(CT_FAIL, "RetLen and HdrLen .NE.");
} else {
*reply_len = ret_size*sizeof(unsigned int);
memcpy(reply, scp_reply.data, *reply_len);
}
- } else
status = FAIL_MSG(CT_FAIL, "reply ill-formed or errflag set");
- return status;
+}
+static int dspio_set_param(struct hda_codec *codec, int mod_id,
int req, void *data, unsigned int len)
+{
- return dspio_scp(codec, mod_id, req, SCP_SET, data, len, NULL, NULL);
+}
+static int dspio_alloc_dma_chan(struct hda_codec *codec, unsigned int *dma_chan) +{
- int status = CT_OK;
- unsigned int size = sizeof(dma_chan);
- CA0132_DSP_LOG(" dspio_alloc_dma_chan() -- begin");
- status = dspio_scp(codec, MASTERCONTROL, MASTERCONTROL_ALLOC_DMA_CHAN,
SCP_GET, NULL, 0, dma_chan, &size);
- if (FAILED(status)) {
CA0132_DSP_LOG("dspio_alloc_dma_chan: SCP Failed");
return CT_FAIL;
- }
- if ((*dma_chan + 1) == 0) {
CA0132_DSP_LOG("no free dma channels to allocate");
return CT_FAIL;
- }
- CA0132_LOG("dspio_alloc_dma_chan: chan=%d\n", *dma_chan);
- CA0132_DSP_LOG(" dspio_alloc_dma_chan() -- complete");
- return status;
+}
+static int dspio_free_dma_chan(struct hda_codec *codec, unsigned int dma_chan) +{
- int status = CT_OK;
- unsigned int dummy = 0;
- CA0132_DSP_LOG(" dspio_free_dma_chan() -- begin");
- CA0132_LOG("dspio_free_dma_chan: chan=%d\n", dma_chan);
- status = dspio_scp(codec, MASTERCONTROL, MASTERCONTROL_ALLOC_DMA_CHAN,
SCP_SET, &dma_chan, sizeof(dma_chan), NULL, &dummy);
- if (FAILED(status)) {
CA0132_DSP_LOG("dspio_free_dma_chan: SCP Failed");
return CT_FAIL;
- }
- CA0132_DSP_LOG(" dspio_free_dma_chan() -- complete");
- return status;
+}
+/*
- CA0132 DSP access stuffs
- */
+static int dsp_set_run_state(struct hda_codec *codec) +{
- unsigned int dbg_ctrl_reg;
- unsigned int halt_state;
- int err;
- err = chipio_read(codec, DSP_DBGCNTL_INST_OFFSET, &dbg_ctrl_reg);
- if (err < 0)
return err;
- halt_state = (dbg_ctrl_reg & DSP_DBGCNTL_STATE_MASK) >>
DSP_DBGCNTL_STATE_LOBIT;
- if (halt_state != 0) {
dbg_ctrl_reg &= ~((halt_state << DSP_DBGCNTL_SS_LOBIT) &
DSP_DBGCNTL_SS_MASK);
err = chipio_write(codec, DSP_DBGCNTL_INST_OFFSET,
dbg_ctrl_reg);
if (err < 0)
return err;
dbg_ctrl_reg |= (halt_state << DSP_DBGCNTL_EXEC_LOBIT) &
DSP_DBGCNTL_EXEC_MASK;
err = chipio_write(codec, DSP_DBGCNTL_INST_OFFSET,
dbg_ctrl_reg);
if (err < 0)
return err;
- }
- return CT_OK;
+}
+static int dsp_reset(struct hda_codec *codec) +{
- unsigned int res;
- int retry = 20;
- CA0132_LOG("dsp_reset\n");
- do {
res = dspio_send(codec, VENDOR_DSPIO_DSP_INIT, 0);
retry--;
- } while (res == CT_FAIL && retry);
- if (!retry) {
CA0132_LOG("dsp_reset timeout\n");
return CT_FAIL;
- }
- return CT_OK;
+}
+static unsigned int dsp_chip_to_dsp_addx(unsigned int chip_addx,
bool *code, bool *yram)
+{
- *code = *yram = false;
- if (UC_RANGE(chip_addx, 1)) {
*code = true;
return UC_OFF(chip_addx);
- } else if (X_RANGE_ALL(chip_addx, 1)) {
return X_OFF(chip_addx);
- } else if (Y_RANGE_ALL(chip_addx, 1)) {
*yram = true;
return Y_OFF(chip_addx);
- }
- return INVALID_CHIP_ADDRESS;
+}
+static bool dsp_is_dma_active(struct hda_codec *codec, unsigned int dma_chan) +{
- unsigned int dma_chnlstart_reg;
- chipio_read(codec, DSPDMAC_CHNLSTART_INST_OFFSET, &dma_chnlstart_reg);
- return ((dma_chnlstart_reg & (1 <<
(DSPDMAC_CHNLSTART_EN_LOBIT + dma_chan))) != 0);
+}
+static int dsp_dma_setup_common(struct hda_codec *codec,
unsigned int chip_addx,
unsigned int dma_chan,
unsigned int port_map_mask,
bool ovly)
+{
- int status = CT_OK;
- unsigned int chnl_prop;
- unsigned int dsp_addx;
- unsigned int active;
- bool code, yram;
- CA0132_DSP_LOG("-- dsp_dma_setup_common() -- Begin ---------");
- CTASSERT(dma_chan < DSPDMAC_DMA_CFG_CHANNEL_COUNT);
- if (dma_chan >= DSPDMAC_DMA_CFG_CHANNEL_COUNT)
return FAIL_MSG(CT_FAIL, "dma chan num invalid");
- if (dsp_is_dma_active(codec, dma_chan))
return FAIL_MSG(CT_FAIL, "dma already active");
- dsp_addx = dsp_chip_to_dsp_addx(chip_addx, &code, &yram);
- if (dsp_addx == INVALID_CHIP_ADDRESS)
return FAIL_MSG(CT_FAIL, "invalid chip addr");
- chnl_prop = DSPDMAC_CHNLPROP_AC_MASK;
- active = 0;
- CA0132_DSP_LOG(" dsp_dma_setup_common() start reg pgm");
- if (ovly) {
status = chipio_read(codec, DSPDMAC_CHNLPROP_INST_OFFSET,
&chnl_prop);
if (FAILED(status))
return FAIL_MSG(CT_FAIL, "read CHNLPROP Reg fail");
CA0132_DSP_LOG(" dsp_dma_setup_common() Read CHNLPROP");
- }
- if (!code)
chnl_prop &= ~(1 << (DSPDMAC_CHNLPROP_MSPCE_LOBIT + dma_chan));
- else
chnl_prop |= (1 << (DSPDMAC_CHNLPROP_MSPCE_LOBIT + dma_chan));
- chnl_prop &= ~(1 << (DSPDMAC_CHNLPROP_DCON_LOBIT + dma_chan));
- status = chipio_write(codec, DSPDMAC_CHNLPROP_INST_OFFSET, chnl_prop);
- if (FAILED(status))
return FAIL_MSG(CT_FAIL, "write CHNLPROP Reg fail");
- CA0132_DSP_LOG(" dsp_dma_setup_common() Write CHNLPROP");
- if (ovly) {
status = chipio_read(codec, DSPDMAC_ACTIVE_INST_OFFSET,
&active);
if (FAILED(status))
return FAIL_MSG(CT_FAIL, "read ACTIVE Reg fail");
CA0132_DSP_LOG(" dsp_dma_setup_common() Read ACTIVE");
- }
- active &= (~(1 << (DSPDMAC_ACTIVE_AAR_LOBIT + dma_chan))) &
DSPDMAC_ACTIVE_AAR_MASK;
- status = chipio_write(codec, DSPDMAC_ACTIVE_INST_OFFSET, active);
- if (FAILED(status))
return FAIL_MSG(CT_FAIL, "write ACTIVE Reg fail");
- CA0132_DSP_LOG(" dsp_dma_setup_common() Write ACTIVE");
- status = chipio_write(codec, DSPDMAC_AUDCHSEL_INST_OFFSET(dma_chan),
port_map_mask);
- if (FAILED(status))
return FAIL_MSG(CT_FAIL, "write AUDCHSEL Reg fail");
- CA0132_DSP_LOG(" dsp_dma_setup_common() Write AUDCHSEL");
- status = chipio_write(codec, DSPDMAC_IRQCNT_INST_OFFSET(dma_chan),
DSPDMAC_IRQCNT_BICNT_MASK | DSPDMAC_IRQCNT_CICNT_MASK);
- if (FAILED(status))
return FAIL_MSG(CT_FAIL, "write IRQCNT Reg fail");
- CA0132_DSP_LOG(" dsp_dma_setup_common() Write IRQCNT");
- CA0132_LOG("ChipA=0x%x,DspA=0x%x,dmaCh=%u,"
"CHSEL=0x%x,CHPROP=0x%x,Active=0x%x\n",
chip_addx, dsp_addx, dma_chan,
port_map_mask, chnl_prop, active);
- CA0132_DSP_LOG("-- dsp_dma_setup_common() -- Complete ---------");
- return CT_OK;
+}
+static int dsp_dma_setup(struct hda_codec *codec,
unsigned int chip_addx,
unsigned int count,
unsigned int dma_chan)
+{
- int status = CT_OK;
- bool code, yram;
- unsigned int dsp_addx;
- unsigned int addr_field;
- unsigned int incr_field;
- unsigned int base_cnt;
- unsigned int cur_cnt;
- unsigned int dma_cfg = 0;
- unsigned int adr_ofs = 0;
- unsigned int xfr_cnt = 0;
- const unsigned int max_dma_count = 1 << (DSPDMAC_XFRCNT_BCNT_HIBIT -
DSPDMAC_XFRCNT_BCNT_LOBIT + 1);
- CA0132_DSP_LOG("-- dsp_dma_setup() -- Begin ---------");
- CTASSERT(count <= max_dma_count);
- if (count > max_dma_count)
return FAIL_MSG(CT_FAIL, "count too big");
- dsp_addx = dsp_chip_to_dsp_addx(chip_addx, &code, &yram);
- if (dsp_addx == INVALID_CHIP_ADDRESS)
return FAIL_MSG(CT_FAIL, "invalid chip addr");
- CA0132_DSP_LOG(" dsp_dma_setup() start reg pgm");
- addr_field = dsp_addx << DSPDMAC_DMACFG_DBADR_LOBIT;
- incr_field = 0;
- if (!code) {
addr_field <<= 1;
if (yram)
addr_field |= (1 << DSPDMAC_DMACFG_DBADR_LOBIT);
incr_field = (1 << DSPDMAC_DMACFG_AINCR_LOBIT);
- }
- CTASSERT((addr_field & DSPDMAC_DMACFG_DBADR_MASK) == addr_field);
- dma_cfg = addr_field + incr_field;
- status = chipio_write(codec, DSPDMAC_DMACFG_INST_OFFSET(dma_chan),
dma_cfg);
- if (FAILED(status))
return FAIL_MSG(CT_FAIL, "write DMACFG Reg fail");
- CA0132_DSP_LOG(" dsp_dma_setup() Write DMACFG");
- adr_ofs = (count - 1) << (DSPDMAC_DSPADROFS_BOFS_LOBIT +
(code ? 0 : 1));
- CTASSERT((adr_ofs & DSPDMAC_DSPADROFS_BOFS_MASK) == adr_ofs);
- status = chipio_write(codec, DSPDMAC_DSPADROFS_INST_OFFSET(dma_chan),
adr_ofs);
- if (FAILED(status))
return FAIL_MSG(CT_FAIL, "write DSPADROFS Reg fail");
- CA0132_DSP_LOG(" dsp_dma_setup() Write DSPADROFS");
- base_cnt = (count - 1) << DSPDMAC_XFRCNT_BCNT_LOBIT;
- CTASSERT((base_cnt & DSPDMAC_XFRCNT_BCNT_MASK) == base_cnt);
- cur_cnt = (count - 1) << DSPDMAC_XFRCNT_CCNT_LOBIT;
- CTASSERT((cur_cnt & DSPDMAC_XFRCNT_CCNT_MASK) == cur_cnt);
- xfr_cnt = base_cnt | cur_cnt;
- status = chipio_write(codec,
DSPDMAC_XFRCNT_INST_OFFSET(dma_chan), xfr_cnt);
- if (FAILED(status))
return FAIL_MSG(CT_FAIL, "write XFRCNT Reg fail");
- CA0132_DSP_LOG(" dsp_dma_setup() Write XFRCNT");
- CA0132_LOG("ChipA=0x%x, cnt=0x%x, DMACFG=0x%x, "
"ADROFS=0x%x, XFRCNT=0x%x\n",
chip_addx, count, dma_cfg, adr_ofs, xfr_cnt);
- CA0132_DSP_LOG("-- dsp_dma_setup() -- Complete ---------");
- return CT_OK;
+}
+static int dsp_dma_start(struct hda_codec *codec,
unsigned int dma_chan, bool ovly)
+{
- unsigned int reg = 0;
- int status = CT_OK;
- CA0132_DSP_LOG("-- dsp_dma_start() -- Begin ---------");
- if (ovly) {
status = chipio_read(codec,
DSPDMAC_CHNLSTART_INST_OFFSET, ®);
if (FAILED(status))
return FAIL_MSG(CT_FAIL, "read CHNLSTART reg fail");
CA0132_DSP_LOG("-- dsp_dma_start() Read CHNLSTART");
reg &= ~(DSPDMAC_CHNLSTART_EN_MASK |
DSPDMAC_CHNLSTART_DIS_MASK);
- }
- status = chipio_write(codec, DSPDMAC_CHNLSTART_INST_OFFSET,
reg | (1 << (dma_chan + DSPDMAC_CHNLSTART_EN_LOBIT)));
- if (FAILED(status))
return FAIL_MSG(CT_FAIL, "write CHNLSTART reg fail");
- CA0132_DSP_LOG("-- dsp_dma_start() -- Complete ---------");
- return status;
+}
+static int dsp_dma_stop(struct hda_codec *codec,
unsigned int dma_chan, bool ovly)
+{
- unsigned int reg = 0;
- int status = CT_OK;
- CA0132_DSP_LOG("-- dsp_dma_stop() -- Begin ---------");
- if (ovly) {
status = chipio_read(codec,
DSPDMAC_CHNLSTART_INST_OFFSET, ®);
if (FAILED(status))
return FAIL_MSG(CT_FAIL, "read CHNLSTART reg fail");
CA0132_DSP_LOG("-- dsp_dma_stop() Read CHNLSTART");
reg &= ~(DSPDMAC_CHNLSTART_EN_MASK |
DSPDMAC_CHNLSTART_DIS_MASK);
- }
- status = chipio_write(codec, DSPDMAC_CHNLSTART_INST_OFFSET,
reg | (1 << (dma_chan + DSPDMAC_CHNLSTART_DIS_LOBIT)));
- if (FAILED(status))
return FAIL_MSG(CT_FAIL, "write CHNLSTART reg fail");
- CA0132_DSP_LOG("-- dsp_dma_stop() -- Complete ---------");
- return status;
+}
+static int dsp_allocate_router_ports(struct hda_codec *codec,
unsigned int num_chans,
unsigned int ports_per_channel,
unsigned int start_device,
unsigned int *port_map)
+{
- int status = CT_OK;
- int res;
- u8 val;
- status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0);
- if (FAILED(status))
return status;
- val = start_device << 6;
- val |= (ports_per_channel - 1) << 4;
- val |= num_chans - 1;
- snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
VENDOR_CHIPIO_PORT_ALLOC_CONFIG_SET,
val);
- snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
VENDOR_CHIPIO_PORT_ALLOC_SET,
MEM_CONNID_DSP);
- status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0);
- if (FAILED(status))
return status;
- res = snd_hda_codec_read(codec, WIDGET_CHIP_CTRL, 0,
VENDOR_CHIPIO_PORT_ALLOC_GET, 0);
- *port_map = res;
- return (res < 0) ? CT_FAIL : CT_OK;
+}
+static int dsp_free_router_ports(struct hda_codec *codec) +{
- int status = CT_OK;
- status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0);
- if (FAILED(status))
return status;
- snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
VENDOR_CHIPIO_PORT_FREE_SET,
MEM_CONNID_DSP);
- status = chipio_send(codec, VENDOR_CHIPIO_STATUS, 0);
- return status;
+}
+static int dsp_allocate_ports(struct hda_codec *codec,
unsigned int num_chans,
unsigned int rate_multi, unsigned int *port_map)
+{
- int status = CT_FAIL;
- CA0132_DSP_LOG(" dsp_allocate_ports() -- begin");
- if ((rate_multi != 1) && (rate_multi != 2) && (rate_multi != 4))
return FAIL_MSG(status, "bad rate multiple");
- status = dsp_allocate_router_ports(codec, num_chans,
rate_multi, 0, port_map);
- CA0132_DSP_LOG(" dsp_allocate_ports() -- complete");
- return status;
+}
+static int dsp_free_ports(struct hda_codec *codec) +{
- int status;
- CA0132_DSP_LOG(" dsp_free_ports() -- begin");
- status = dsp_free_router_ports(codec);
- if (FAILED(status))
return FAIL_MSG(CT_FAIL, "free router ports fail");
- CA0132_DSP_LOG(" dsp_free_ports() -- complete");
- return status;
+}
+static int dsp_allocate_ports_format(struct hda_codec *codec,
const unsigned short fmt,
unsigned int *port_map)
+{
- int status = CT_FAIL;
- unsigned int num_chans;
- unsigned int sample_rate_div = ((get_hdafmt_rate(fmt) >> 0) & 3) + 1;
- unsigned int sample_rate_mul = ((get_hdafmt_rate(fmt) >> 3) & 3) + 1;
- unsigned int rate_multi = sample_rate_mul / sample_rate_div;
- if ((rate_multi != 1) && (rate_multi != 2) && (rate_multi != 4))
return FAIL_MSG(CT_FAIL, "bad rate multiple");
- num_chans = get_hdafmt_chs(fmt) + 1;
- status = dsp_allocate_ports(codec, num_chans, rate_multi, port_map);
- return status;
+}
+/*
- HDA DMA engine stuffs for DSP code download
- */
+struct dma_engine {
- struct hda_codec *codec;
- unsigned short m_converter_format;
- void *m_buffer_addr;
- unsigned int m_buffer_size;
- unsigned int m_req_size;
- struct snd_pcm_substream *substream;
+};
+enum dma_state {
- DMA_STATE_RESET = 0,
- DMA_STATE_STOP = 1,
- DMA_STATE_RUN = 2
+};
+#define azx_pcm_open(a) (a->ops->open(a)) +#define azx_pcm_close(a) (a->ops->close(a)) +#define azx_pcm_prepare(a) (a->ops->prepare(a)) +#define azx_pcm_trigger(a, b) (a->ops->trigger(a, b)) +#define azx_pcm_hw_free(a) (a->ops->hw_free(a))
+static int dma_convert_to_hda_format(
struct hda_stream_format *stream_format,
unsigned short *hda_format)
+{
- unsigned int format_val;
- format_val = snd_hda_calc_stream_format(
stream_format->sample_rate,
stream_format->number_channels,
SNDRV_PCM_FORMAT_S32_LE,
stream_format->container_size, 0);
- if (hda_format)
*hda_format = (unsigned short)format_val;
- return CT_OK;
+}
+static int dma_init(
struct hda_codec *codec,
struct dma_engine **pp_dma,
struct hda_stream_format *stream_format,
unsigned short *format,
unsigned int req_size)
+{
- struct dma_engine *dma;
- struct snd_pcm_substream *substream;
- struct snd_pcm *pcm;
- struct snd_pcm_runtime *runtime;
- unsigned int bits;
- snd_pcm_uframes_t frames;
- *pp_dma = NULL;
- dma = kzalloc(sizeof(*dma), GFP_KERNEL);
- memset((void *)dma, 0, sizeof(*dma));
- dma_convert_to_hda_format(stream_format, format);
- dma->m_converter_format = *format;
- dma->substream = NULL;
- pcm = codec->pcm_info->pcm;
- for (substream = pcm->streams[SNDRV_PCM_STREAM_PLAYBACK].substream;
substream; substream = substream->next) {
if (codec->pcm_info->pcm_type == HDA_PCM_TYPE_SPDIF)
continue;
if (!SUBSTREAM_BUSY(substream)) {
dma->substream = substream;
break;
}
- }
- if (NULL == dma->substream) {
kfree(dma);
return CT_FAIL;
- }
- runtime = kzalloc(sizeof(*runtime), GFP_KERNEL);
- memset((void *)runtime, 0, sizeof(*runtime));
- dma->substream->runtime = runtime;
- dma->substream->private_data = pcm->private_data;
- azx_pcm_open(dma->substream);
- req_size = req_size * 2;
- snd_pcm_lib_malloc_pages(dma->substream, req_size);
- runtime->rate = stream_format->sample_rate;
- runtime->channels = stream_format->number_channels;
- runtime->format = SNDRV_PCM_FORMAT_S32_LE;
- runtime->no_period_wakeup = 1;
- bits = snd_pcm_format_physical_width(runtime->format);
- runtime->sample_bits = bits;
- bits *= runtime->channels;
- runtime->frame_bits = bits;
- frames = 1;
- while (bits % 8 != 0) {
bits *= 2;
frames *= 2;
- }
- runtime->byte_align = bits / 8;
- runtime->min_align = frames;
- runtime->buffer_size = bytes_to_frames(runtime, req_size);
- runtime->period_size = runtime->buffer_size;
- dma->m_req_size = req_size;
- dma->codec = codec;
- *pp_dma = dma;
- CA0132_LOG("dma_init: succeeded.\n");
- return CT_OK;
+}
+static int dma_prepare(struct dma_engine *dma) +{
- struct snd_pcm_runtime *runtime;
- int err;
- CA0132_LOG("dma_prepare: begin\n");
- runtime = dma->substream->runtime;
- err = azx_pcm_prepare(dma->substream);
- if (err < 0)
return CT_FAIL;
- dma->m_buffer_size = snd_pcm_lib_buffer_bytes(dma->substream);
- dma->m_buffer_addr = runtime->dma_area;
- return CT_OK;
+}
+static int dma_reset(struct dma_engine *dma) +{
- struct snd_pcm_runtime *runtime = dma->substream->runtime;
- CA0132_LOG("dma_reset: begin\n");
- azx_pcm_hw_free(dma->substream);
- snd_pcm_lib_malloc_pages(dma->substream, dma->m_req_size);
- azx_pcm_prepare(dma->substream);
- dma->m_buffer_size = snd_pcm_lib_buffer_bytes(dma->substream);
- dma->m_buffer_addr = runtime->dma_area;
- return CT_OK;
+}
+static int dma_set_state(struct dma_engine *dma, enum dma_state state) +{
- int cmd;
- CA0132_LOG("dma_set_state state=%d\n", state);
- switch (state) {
- case DMA_STATE_RESET:
dma_reset(dma);
return CT_OK;
- case DMA_STATE_STOP:
cmd = SNDRV_PCM_TRIGGER_STOP;
break;
- case DMA_STATE_RUN:
cmd = SNDRV_PCM_TRIGGER_START;
break;
- default:
return CT_OK;
- }
- azx_pcm_trigger(dma->substream, cmd);
- return CT_OK;
+}
+static unsigned int dma_get_buffer_size(struct dma_engine *dma) +{
- return dma->m_buffer_size;
+}
+static unsigned int *dma_get_buffer_addr(struct dma_engine *dma) +{
- return dma->m_buffer_addr;
+}
+static int dma_free_buffer(struct dma_engine *dma) +{
- azx_pcm_hw_free(dma->substream);
- azx_pcm_close(dma->substream);
- kfree(dma->substream->runtime);
- dma->substream->runtime = NULL;
- return CT_OK;
+}
+static int dma_xfer(struct dma_engine *dma,
const unsigned int *data,
unsigned int count)
+{
- memcpy(dma->m_buffer_addr, data, count);
- return CT_OK;
+}
+static void dma_get_converter_format(
struct dma_engine *dma,
unsigned short *format)
+{
- if (format)
*format = dma->m_converter_format;
+}
+static unsigned int dma_get_stream_id(struct dma_engine *dma) +{
- struct ca0132_spec *spec = dma->codec->spec;
- return spec->dsp_stream_id;
+}
+static int dma_exit(struct dma_engine *dma) +{
- CA0132_LOG("dma_exit\n");
- kfree(dma);
- return 0;
+}
+/*
- CA0132 chip DSP image segment stuffs
- */
+struct dsp_image_seg {
- u32 magic;
- u32 chip_addr;
- u32 count;
- u32 data[0];
+};
+static const u32 g_magic_value = 0x4c46584d; +static const u32 g_chip_addr_magic_value = 0xFFFFFF01;
+static bool is_valid(const struct dsp_image_seg *p) +{
- return p->magic == g_magic_value;
+}
+static bool is_hci_prog_list_seg(const struct dsp_image_seg *p) +{
- return g_chip_addr_magic_value == p->chip_addr;
+}
+static bool is_last(const struct dsp_image_seg *p) +{
- return p->count == 0;
+}
+static size_t dsp_sizeof(const struct dsp_image_seg *p) +{
- return sizeof(*p) + p->count*sizeof(u32);
+}
+static const struct dsp_image_seg *get_next_seg_ptr(
const struct dsp_image_seg *p)
+{
- return (struct dsp_image_seg *)((unsigned char *)(p) + dsp_sizeof(p));
+}
+/*
- CA0132 chip DSP trannsfer stuffs. For DSP download.
- */
+#define INVALID_DMA_CHANNEL (~0UL)
+static int dspxfr_hci_write(struct hda_codec *codec,
const struct dsp_image_seg *fls)
+{
- int status = CT_OK;
- const u32 *data;
- unsigned int count;
- CTASSERT(fls != NULL && fls->chip_addr == g_chip_addr_magic_value);
- if (fls == NULL || fls->chip_addr != g_chip_addr_magic_value)
return FAIL_MSG(CT_FAIL, "hci_write invalid params");
- count = fls->count;
- data = (u32 *)(fls->data);
- while (SUCCEEDED(status) && count >= 2) {
status = chipio_write(codec, data[0], data[1]);
if (FAILED(status))
status = FAIL_MSG(status, "hci_write chipio failed");
count -= 2;
data += 2;
- }
- return status;
+}
+static int dspxfr_one_seg(struct hda_codec *codec,
const struct dsp_image_seg *fls,
unsigned int reloc,
struct dma_engine *dma_engine,
unsigned int dma_chan,
unsigned int port_map_mask,
bool ovly)
+{
- int status = CT_OK;
- bool comm_dma_setup_done = false;
- const unsigned int *data;
- unsigned int chip_addx;
- unsigned int words_to_write;
- unsigned int buffer_size_words;
- unsigned int *buffer_addx;
- unsigned short hda_format;
- unsigned int sample_rate_div;
- unsigned int sample_rate_mul;
- unsigned int num_chans;
- unsigned int hda_frame_size_words;
- unsigned int remainder_words;
- const u32 *data_remainder;
- u32 chip_addx_remainder;
- unsigned int run_size_words;
- const struct dsp_image_seg *hci_write = NULL;
- int retry;
- CTASSERT(fls != NULL);
- if (fls == NULL)
return CT_FAIL;
- if (is_hci_prog_list_seg(fls)) {
hci_write = fls;
fls = get_next_seg_ptr(fls);
- }
- if (hci_write && (!fls || is_last(fls))) {
CA0132_LOG("hci_write\n");
return dspxfr_hci_write(codec, hci_write);
- }
- if (fls == NULL || dma_engine == NULL || port_map_mask == 0) {
CA0132_LOG("Invalid Params\n");
return CT_FAIL;
- }
- data = fls->data;
- chip_addx = fls->chip_addr,
- words_to_write = fls->count;
- if (!words_to_write)
return hci_write ? dspxfr_hci_write(codec, hci_write) : CT_OK;
- if (reloc)
chip_addx = (chip_addx & (0xFFFF0000 << 2)) + (reloc << 2);
- if (!UC_RANGE(chip_addx, words_to_write) &&
!X_RANGE_ALL(chip_addx, words_to_write) &&
!Y_RANGE_ALL(chip_addx, words_to_write)) {
CA0132_LOG("Invalid chip_addx Params\n");
return CT_FAIL;
- }
- buffer_size_words = (unsigned int)dma_get_buffer_size(dma_engine) /
sizeof(u32);
- buffer_addx = dma_get_buffer_addr(dma_engine);
- if (buffer_addx == NULL)
status = FAIL_MSG(CT_FAIL, "dma_engine buffer NULL");
- dma_get_converter_format(dma_engine, &hda_format);
- sample_rate_div = ((get_hdafmt_rate(hda_format) >> 0) & 3) + 1;
- sample_rate_mul = ((get_hdafmt_rate(hda_format) >> 3) & 3) + 1;
- num_chans = get_hdafmt_chs(hda_format) + 1;
- hda_frame_size_words = ((sample_rate_div == 0) ? 0 :
(num_chans * sample_rate_mul / sample_rate_div));
- buffer_size_words = MIN(buffer_size_words, UC_RANGE(chip_addx, 1) ?
65536UL : 32768UL);
- buffer_size_words -= buffer_size_words % hda_frame_size_words;
- CA0132_LOG("chpadr=0x%08x frmsz=%u nchan=%u "
"rate_mul=%u div=%u bufsz=%u\n",
chip_addx, hda_frame_size_words, num_chans,
sample_rate_mul, sample_rate_div, buffer_size_words);
- CTASSERT(SUCCEEDED(status));
- CTASSERT(buffer_addx != NULL);
- CTASSERT(buffer_size_words >= hda_frame_size_words);
- CTASSERT(hda_frame_size_words > 0);
- if ((buffer_addx == NULL) || (hda_frame_size_words == 0) ||
(buffer_size_words < hda_frame_size_words)) {
status = FAIL_MSG(CT_FAIL, "dspxfr_one_seg:failed");
- }
- if (FAILED(status))
return status;
- remainder_words = words_to_write % hda_frame_size_words;
- data_remainder = data;
- chip_addx_remainder = chip_addx;
- data += remainder_words;
- chip_addx += remainder_words*sizeof(u32);
- words_to_write -= remainder_words;
- while ((words_to_write != 0) && SUCCEEDED(status)) {
run_size_words = MIN(buffer_size_words, words_to_write);
CA0132_LOG("dspxfr (seg loop)cnt=%u rs=%u remainder=%u\n",
words_to_write, run_size_words, remainder_words);
dma_set_state(dma_engine, DMA_STATE_STOP);
dma_xfer(dma_engine, data, run_size_words*sizeof(u32));
if (!comm_dma_setup_done && SUCCEEDED(status)) {
status = dsp_dma_stop(codec, dma_chan, ovly);
if (SUCCEEDED(status))
status = dsp_dma_setup_common(codec, chip_addx,
dma_chan, port_map_mask, ovly);
comm_dma_setup_done = true;
}
if (SUCCEEDED(status))
status = dsp_dma_setup(codec, chip_addx,
run_size_words, dma_chan);
if (SUCCEEDED(status))
status = dsp_dma_start(codec, dma_chan, ovly);
if (SUCCEEDED(status) && !dsp_is_dma_active(codec, dma_chan))
status = FAIL_MSG(CT_FAIL, "dspxfr:DMA did not start");
if (SUCCEEDED(status))
status = dma_set_state(dma_engine, DMA_STATE_RUN);
if (SUCCEEDED(status)) {
if (remainder_words != 0) {
status = chipio_write_multiple(codec,
chip_addx_remainder,
data_remainder,
remainder_words);
remainder_words = 0;
}
if (hci_write) {
status = dspxfr_hci_write(codec, hci_write);
hci_write = NULL;
}
retry = 5000;
while (dsp_is_dma_active(codec, dma_chan)) {
if (--retry <= 0)
break;
}
CA0132_DSP_LOG("+++++ DMA complete");
dma_set_state(dma_engine, DMA_STATE_STOP);
dma_set_state(dma_engine, DMA_STATE_RESET);
}
CTASSERT(run_size_words <= words_to_write);
data += run_size_words;
chip_addx += run_size_words*sizeof(u32);
words_to_write -= run_size_words;
- }
- if (SUCCEEDED(status) && (remainder_words != 0)) {
status = chipio_write_multiple(codec, chip_addx_remainder,
data_remainder, remainder_words);
- }
- return status;
+}
+static int dspxfr_image(struct hda_codec *codec,
const struct dsp_image_seg *fls_data,
unsigned int reloc, struct hda_stream_format *format,
bool ovly)
+{
- int status = CT_OK;
- unsigned short hda_format = 0;
- unsigned int response;
- unsigned char stream_id = 0;
- struct dma_engine *dma_engine;
- unsigned int dma_chan;
- unsigned int port_map_mask;
- unsigned int buf_size;
- CTASSERT(fls_data != NULL);
- if (fls_data == NULL)
return CT_FAIL;
- buf_size = ovly ? DSP_DMA_WRITE_BUFLEN_OVLY : DSP_DMA_WRITE_BUFLEN_INIT;
- status = dma_init(codec, &dma_engine, format, &hda_format, buf_size);
- if (FAILED(status))
return CT_FAIL;
- dma_chan = 0;
- do {
status = codec_set_converter_format(codec, WIDGET_CHIP_CTRL,
hda_format, &response);
if (FAILED(status)) {
status = FAIL_MSG(status, "set converter format fail");
break;
}
status = dma_prepare(dma_engine);
if (FAILED(status))
break;
if (ovly) {
status = dspio_alloc_dma_chan(codec, &dma_chan);
if (FAILED(status)) {
status = FAIL_MSG(status, "alloc dmachan fail");
dma_chan = INVALID_DMA_CHANNEL;
break;
}
}
port_map_mask = 0;
status = dsp_allocate_ports_format(codec, hda_format,
&port_map_mask);
if (FAILED(status)) {
status = FAIL_MSG(status, "alloc parts fail");
break;
}
stream_id = dma_get_stream_id(dma_engine);
status = codec_set_converter_stream_channel(codec,
WIDGET_CHIP_CTRL, stream_id, 0, &response);
if (FAILED(status)) {
status = FAIL_MSG(status, "set stream chan fail");
break;
}
while (SUCCEEDED(status) && (fls_data != NULL) &&
!is_last(fls_data)) {
if (!is_valid(fls_data)) {
status = FAIL_MSG(CT_FAIL, "FLS check fail");
break;
}
status = dspxfr_one_seg(codec, fls_data, reloc,
dma_engine, dma_chan,
port_map_mask, ovly);
if (is_hci_prog_list_seg(fls_data))
fls_data = get_next_seg_ptr(fls_data);
CTASSERT(fls_data != NULL);
if ((fls_data != NULL) && !is_last(fls_data))
fls_data = get_next_seg_ptr(fls_data);
CTASSERT(fls_data != NULL);
}
if (port_map_mask != 0)
status = dsp_free_ports(codec);
if (FAILED(status))
break;
status = codec_set_converter_stream_channel(codec,
WIDGET_CHIP_CTRL, 0, 0, &response);
- } while (0);
- if (ovly && (dma_chan != INVALID_DMA_CHANNEL))
status = dspio_free_dma_chan(codec, dma_chan);
- status = dma_set_state(dma_engine, DMA_STATE_RESET);
- if (FAILED(status))
status = FAIL_MSG(status, "dma set state Reset fail");
- status = dma_free_buffer(dma_engine);
- if (FAILED(status))
status = FAIL_MSG(status, "dma free buffer fail");
- dma_exit(dma_engine);
- return status;
+}
+/*
- CA0132 DSP download stuffs.
- */
+static void dspload_post_setup(struct hda_codec *codec) +{
- CA0132_DSP_LOG("---- dspload_post_setup ------");
- /*set DSP speaker to 2.0 configuration*/
- chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x18), 0x08080080);
- chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x19), 0x3f800000);
- /*update write pointer*/
- chipio_write(codec, XRAM_XRAM_INST_OFFSET(0x29), 0x00000002);
+}
+static int dspload_image(struct hda_codec *codec,
const struct dsp_image_seg *fls,
bool ovly,
unsigned int reloc,
bool autostart,
int router_chans)
+{
- int status = CT_OK;
- struct hda_stream_format stream_format;
- CA0132_DSP_LOG("---- dspload_image begin ------");
- if (router_chans == 0) {
if (!ovly)
router_chans = DMA_TRANSFER_FRAME_SIZE_NWORDS;
else
router_chans = DMA_OVERLAY_FRAME_SIZE_NWORDS;
- }
- stream_format.sample_rate = 48000;
- stream_format.number_channels = (unsigned short)router_chans;
- while (stream_format.number_channels > 16) {
stream_format.sample_rate *= 2;
stream_format.number_channels /= 2;
- }
- stream_format.container_size = 32;
- stream_format.valid_bits_per_sample = 32;
- do {
CA0132_DSP_LOG("Ready to program DMA");
if (!ovly)
status = dsp_reset(codec);
if (FAILED(status))
break;
CA0132_DSP_LOG("dsp_reset() complete");
status = dspxfr_image(codec, fls, reloc, &stream_format, ovly);
if (FAILED(status))
break;
CA0132_DSP_LOG("dspxfr_image() complete");
if (autostart && !ovly) {
dspload_post_setup(codec);
status = dsp_set_run_state(codec);
}
CA0132_DSP_LOG("LOAD FINISHED");
- } while (0);
- return status;
+}
+static int dspload_get_speakereq_addx(struct hda_codec *codec,
unsigned int *x,
unsigned int *y)
+{
- int status = CT_OK;
- struct { unsigned short x, y; } speakereq_info;
- unsigned int size = sizeof(speakereq_info);
- CA0132_DSP_LOG("dspload_get_speakereq_addx() -- begin");
- status = dspio_scp(codec, MASTERCONTROL,
MASTERCONTROL_QUERY_SPEAKER_EQ_ADDRESS,
SCP_GET, NULL, 0, &speakereq_info, &size);
- if (FAILED(status)) {
CA0132_DSP_LOG("dspload_get_speakereq_addx: SCP Failed");
return CT_FAIL;
- }
- *x = speakereq_info.x;
- *y = speakereq_info.y;
- CA0132_LOG("dspload_get_speakereq_addx: X=0x%x Y=0x%x\n", *x, *y);
- CA0132_DSP_LOG("dspload_get_speakereq_addx() -- complete");
- return status;
+}
+static int dspload_speakereq(struct hda_codec *codec) +{
- int status = CT_OK;
- const struct dsp_image_seg *image_x, *image_y;
- unsigned int x, y;
- CA0132_DSP_LOG("dspload_speakereq() -- begin");
- image_x = (struct dsp_image_seg *)Speaker_EQ_X;
- image_y = (struct dsp_image_seg *)Speaker_EQ_Y;
- status = dspload_get_speakereq_addx(codec, &x, &y);
- if (FAILED(status))
return CT_FAIL;
- status = dspload_image(codec, image_x, 1, x, 0, 8);
- if (FAILED(status))
return CT_FAIL;
- status = dspload_image(codec, image_y, 1, y, 0, 8);
- if (FAILED(status))
return CT_FAIL;
- CA0132_DSP_LOG("dspload_speakereq() -- complete");
- return status;
+}
+static bool dspload_is_loaded(struct hda_codec *codec) +{
- unsigned int data = 0;
- int status = CT_OK;
- status = chipio_read(codec, 0x40004, &data);
- if (FAILED(status) || (data != 1))
return false;
- return true;
+}
+static bool dspload_wait_loaded(struct hda_codec *codec) +{
- int retry = 100;
- do {
msleep(20);
if (dspload_is_loaded(codec)) {
printk(KERN_INFO "DOWNLOAD OK :-) DSP IS RUNNING.\n");
return true;
}
- } while (--retry);
- printk(KERN_ERR "DOWNLOAD FAILED!!! DSP IS NOT RUNNING.\n");
- return false;
+}
+/*
- PCM stuffs.
- */
+static void ca0132_setup_stream(struct hda_codec *codec, hda_nid_t nid,
u32 stream_tag,
int channel_id, int format)
+{
- unsigned int oldval, newval;
- if (!nid)
return;
- CA0132_LOG("ca0132_setup_stream: "
"NID=0x%x, stream=0x%x, channel=%d, format=0x%x\n",
nid, stream_tag, channel_id, format);
- /* update the format-id if changed */
- oldval = snd_hda_codec_read(codec, nid, 0,
AC_VERB_GET_STREAM_FORMAT, 0);
- if (oldval != format) {
msleep(20);
snd_hda_codec_write(codec, nid, 0,
AC_VERB_SET_STREAM_FORMAT,
format);
- }
- oldval = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_CONV, 0);
- newval = (stream_tag << 4) | channel_id;
- if (oldval != newval) {
snd_hda_codec_write(codec, nid, 0,
AC_VERB_SET_CHANNEL_STREAMID,
newval);
- }
+}
+static void ca0132_cleanup_stream(struct hda_codec *codec, hda_nid_t nid) +{
- unsigned int val;
- if (!nid)
return;
- CA0132_LOG("ca0132_cleanup_stream: NID=0x%x\n", nid);
- val = snd_hda_codec_read(codec, nid, 0, AC_VERB_GET_CONV, 0);
- if (!val)
return;
- snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_STREAM_FORMAT, 0);
- snd_hda_codec_write(codec, nid, 0, AC_VERB_SET_CHANNEL_STREAMID, 0);
+}
+/*
- PCM playbacks
- */
+static int ca0132_playback_pcm_prepare(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
unsigned int stream_tag,
unsigned int format,
struct snd_pcm_substream *substream)
+{
- struct ca0132_spec *spec = codec->spec;
- if (spec->dsp_state == DSP_DOWNLOADING) {
spec->dsp_stream_id = stream_tag;
return 0;
- }
- ca0132_setup_stream(codec, spec->dacs[0], stream_tag, 0, format);
- return 0;
+}
+static int ca0132_playback_pcm_cleanup(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
struct snd_pcm_substream *substream)
+{
- struct ca0132_spec *spec = codec->spec;
- if (spec->dsp_state == DSP_DOWNLOADING)
return 0;
- ca0132_cleanup_stream(codec, spec->dacs[0]);
- return 0;
+}
+/*
- PCM capture
- */
+static int ca0132_capture_pcm_prepare(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
unsigned int stream_tag,
unsigned int format,
struct snd_pcm_substream *substream)
+{
- struct ca0132_spec *spec = codec->spec;
- if (spec->dsp_state == DSP_DOWNLOADING)
return 0;
- ca0132_setup_stream(codec, hinfo->nid, stream_tag, 0, format);
- return 0;
+}
+static int ca0132_capture_pcm_cleanup(struct hda_pcm_stream *hinfo,
struct hda_codec *codec,
struct snd_pcm_substream *substream)
+{
- struct ca0132_spec *spec = codec->spec;
- if (spec->dsp_state == DSP_DOWNLOADING)
return 0;
- ca0132_cleanup_stream(codec, hinfo->nid);
- return 0;
+}
+/*
- Controls stuffs.
- */
+/*
- Mixer controls helpers.
- */
+#define CA0132_CODEC_VOL_MONO(xname, nid, channel, dir) \
- { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
.name = xname, \
.subdevice = HDA_SUBDEV_AMP_FLAG, \
.access = SNDRV_CTL_ELEM_ACCESS_READWRITE | \
SNDRV_CTL_ELEM_ACCESS_TLV_READ | \
SNDRV_CTL_ELEM_ACCESS_TLV_CALLBACK, \
.info = ca0132_volume_info, \
.get = ca0132_volume_get, \
.put = ca0132_volume_put, \
.tlv = { .c = ca0132_volume_tlv }, \
.private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
+#define CA0132_CODEC_MUTE_MONO(xname, nid, channel, dir) \
- { .iface = SNDRV_CTL_ELEM_IFACE_MIXER, \
.name = xname, \
.subdevice = HDA_SUBDEV_AMP_FLAG, \
.info = snd_hda_mixer_amp_switch_info, \
.get = ca0132_switch_get, \
.put = ca0132_switch_put, \
.private_value = HDA_COMPOSE_AMP_VAL(nid, channel, 0, dir) }
+/* stereo */ +#define CA0132_CODEC_VOL(xname, nid, dir) \
- CA0132_CODEC_VOL_MONO(xname, nid, 3, dir)
+#define CA0132_CODEC_MUTE(xname, nid, dir) \
- CA0132_CODEC_MUTE_MONO(xname, nid, 3, dir)
+/* The followings are for tuning of products */ +#ifdef ENABLE_TUNING_CONTROLS
+static float voice_focus_vals_lookup[] = { +20.00, 21.00, 22.00, 23.00, 24.00, 25.00, 26.00, 27.00, 28.00, 29.00, +30.00, 31.00, 32.00, 33.00, 34.00, 35.00, 36.00, 37.00, 38.00, 39.00, +40.00, 41.00, 42.00, 43.00, 44.00, 45.00, 46.00, 47.00, 48.00, 49.00, +50.00, 51.00, 52.00, 53.00, 54.00, 55.00, 56.00, 57.00, 58.00, 59.00, +60.00, 61.00, 62.00, 63.00, 64.00, 65.00, 66.00, 67.00, 68.00, 69.00, +70.00, 71.00, 72.00, 73.00, 74.00, 75.00, 76.00, 77.00, 78.00, 79.00, +80.00, 81.00, 82.00, 83.00, 84.00, 85.00, 86.00, 87.00, 88.00, 89.00, +90.00, 91.00, 92.00, 93.00, 94.00, 95.00, 96.00, 97.00, 98.00, 99.00, +100.00, 101.00, 102.00, 103.00, 104.00, 105.00, 106.00, 107.00, 108.00, 109.00, +110.00, 111.00, 112.00, 113.00, 114.00, 115.00, 116.00, 117.00, 118.00, 119.00, +120.00, 121.00, 122.00, 123.00, 124.00, 125.00, 126.00, 127.00, 128.00, 129.00, +130.00, 131.00, 132.00, 133.00, 134.00, 135.00, 136.00, 137.00, 138.00, 139.00, +140.00, 141.00, 142.00, 143.00, 144.00, 145.00, 146.00, 147.00, 148.00, 149.00, +150.00, 151.00, 152.00, 153.00, 154.00, 155.00, 156.00, 157.00, 158.00, 159.00, +160.00, 161.00, 162.00, 163.00, 164.00, 165.00, 166.00, 167.00, 168.00, 169.00, +170.00, 171.00, 172.00, 173.00, 174.00, 175.00, 176.00, 177.00, 178.00, 179.00, +180.00 +};
+static float mic_svm_vals_lookup[] = { +0.00, 0.01, 0.02, 0.03, 0.04, 0.05, 0.06, 0.07, 0.08, 0.09, +0.10, 0.11, 0.12, 0.13, 0.14, 0.15, 0.16, 0.17, 0.18, 0.19, +0.20, 0.21, 0.22, 0.23, 0.24, 0.25, 0.26, 0.27, 0.28, 0.29, +0.30, 0.31, 0.32, 0.33, 0.34, 0.35, 0.36, 0.37, 0.38, 0.39, +0.40, 0.41, 0.42, 0.43, 0.44, 0.45, 0.46, 0.47, 0.48, 0.49, +0.50, 0.51, 0.52, 0.53, 0.54, 0.55, 0.56, 0.57, 0.58, 0.59, +0.60, 0.61, 0.62, 0.63, 0.64, 0.65, 0.66, 0.67, 0.68, 0.69, +0.70, 0.71, 0.72, 0.73, 0.74, 0.75, 0.76, 0.77, 0.78, 0.79, +0.80, 0.81, 0.82, 0.83, 0.84, 0.85, 0.86, 0.87, 0.88, 0.89, +0.90, 0.91, 0.92, 0.93, 0.94, 0.95, 0.96, 0.97, 0.98, 0.99, +1.00 +};
+static float equalizer_vals_lookup[] = { +-24.00, -23.00, -22.00, -21.00, -20.00, +-19.00, -18.00, -17.00, -16.00, -15.00, -14.00, -13.00, -12.00, -11.00, -10.00, +-9.00, -8.00, -7.00, -6.00, -5.00, -4.00, -3.00, -2.00, -1.00, 00.00, +1.00, 2.00, 3.00, 4.00, 5.00, 6.00, 7.00, 8.00, 9.00, 10.00, +11.00, 12.00, 13.00, 14.00, 15.00, 16.00, 17.00, 18.00, 19.00, 20.00, +21.00, 22.00, 23.00, 24.00 +};
+static int tuning_ctl_set(struct hda_codec *codec, hda_nid_t nid,
float *lookup, int idx)
+{
- int i = 0;
- for (i = 0; i < TUNING_CTLS_COUNT; i++)
if (nid == ca0132_tuning_ctls[i].nid)
break;
- snd_hda_power_up(codec);
- dspio_set_param(codec, ca0132_tuning_ctls[i].mid,
ca0132_tuning_ctls[i].req,
&(lookup[idx]), sizeof(float));
- snd_hda_power_down(codec);
- return 1;
+}
+static int tuning_ctl_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
+{
- struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
- struct ca0132_spec *spec = codec->spec;
- hda_nid_t nid = get_amp_nid(kcontrol);
- long *valp = ucontrol->value.integer.value;
- int idx = nid - TUNING_CTL_START_NID;
- *valp = spec->cur_ctl_vals[idx];
- return 0;
+}
+static int voice_focus_ctl_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
+{
- int chs = get_amp_channels(kcontrol);
- uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
- uinfo->count = chs == 3 ? 2 : 1;
- uinfo->value.integer.min = 20;
- uinfo->value.integer.max = 180;
- uinfo->value.integer.step = 1;
- return 0;
+}
+static int voice_focus_ctl_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
+{
- struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
- struct ca0132_spec *spec = codec->spec;
- hda_nid_t nid = get_amp_nid(kcontrol);
- long *valp = ucontrol->value.integer.value;
- int idx;
- idx = nid - TUNING_CTL_START_NID;
- /* any change? */
- if (spec->cur_ctl_vals[idx] == *valp)
return 0;
- spec->cur_ctl_vals[idx] = *valp;
- idx = *valp - 20;
- tuning_ctl_set(codec, nid, voice_focus_vals_lookup, idx);
- return 1;
+}
+static int mic_svm_ctl_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
+{
- int chs = get_amp_channels(kcontrol);
- uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
- uinfo->count = chs == 3 ? 2 : 1;
- uinfo->value.integer.min = 0;
- uinfo->value.integer.max = 100;
- uinfo->value.integer.step = 1;
- return 0;
+}
+static int mic_svm_ctl_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
+{
- struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
- struct ca0132_spec *spec = codec->spec;
- hda_nid_t nid = get_amp_nid(kcontrol);
- long *valp = ucontrol->value.integer.value;
- int idx;
- idx = nid - TUNING_CTL_START_NID;
- /* any change? */
- if (spec->cur_ctl_vals[idx] == *valp)
return 0;
- spec->cur_ctl_vals[idx] = *valp;
- idx = *valp;
- tuning_ctl_set(codec, nid, mic_svm_vals_lookup, idx);
- return 0;
+}
+static int equalizer_ctl_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
+{
- int chs = get_amp_channels(kcontrol);
- uinfo->type = SNDRV_CTL_ELEM_TYPE_INTEGER;
- uinfo->count = chs == 3 ? 2 : 1;
- uinfo->value.integer.min = 0;
- uinfo->value.integer.max = 48;
- uinfo->value.integer.step = 1;
- return 0;
+}
+static int equalizer_ctl_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
+{
- struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
- struct ca0132_spec *spec = codec->spec;
- hda_nid_t nid = get_amp_nid(kcontrol);
- long *valp = ucontrol->value.integer.value;
- int idx;
- idx = nid - TUNING_CTL_START_NID;
- /* any change? */
- if (spec->cur_ctl_vals[idx] == *valp)
return 0;
- spec->cur_ctl_vals[idx] = *valp;
- idx = *valp;
- tuning_ctl_set(codec, nid, equalizer_vals_lookup, idx);
- return 1;
+}
+DECLARE_TLV_DB_SCALE(voice_focus_db_scale, 2000, 100, 0); +DECLARE_TLV_DB_SCALE(eq_db_scale, -2400, 100, 0);
+static int add_tuning_control(struct hda_codec *codec,
hda_nid_t pnid, hda_nid_t nid,
const char *name, int dir)
+{
- char namestr[44];
- int type = dir ? HDA_INPUT : HDA_OUTPUT;
- struct snd_kcontrol_new knew =
HDA_CODEC_VOLUME_MONO(namestr, nid, 1, 0, type);
- knew.access = SNDRV_CTL_ELEM_ACCESS_READWRITE |
SNDRV_CTL_ELEM_ACCESS_TLV_READ;
- knew.tlv.c = 0;
- knew.tlv.p = 0;
- switch (pnid) {
- case VOICE_FOCUS:
knew.info = voice_focus_ctl_info;
knew.get = tuning_ctl_get;
knew.put = voice_focus_ctl_put;
knew.tlv.p = voice_focus_db_scale;
break;
- case MIC_SVM:
knew.info = mic_svm_ctl_info;
knew.get = tuning_ctl_get;
knew.put = mic_svm_ctl_put;
break;
- case EQUALIZER:
knew.info = equalizer_ctl_info;
knew.get = tuning_ctl_get;
knew.put = equalizer_ctl_put;
knew.tlv.p = eq_db_scale;
break;
- default:
return 0;
- }
- knew.private_value =
HDA_COMPOSE_AMP_VAL(nid, 1, 0, type);
- sprintf(namestr, "%s %s Volume", name, dirstr[dir]);
- return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec));
+}
+static int add_tuning_ctls(struct hda_codec *codec) +{
- int i;
- int err;
- for (i = 0; i < TUNING_CTLS_COUNT; i++) {
err = add_tuning_control(codec,
ca0132_tuning_ctls[i].parent_nid,
ca0132_tuning_ctls[i].nid,
ca0132_tuning_ctls[i].name,
ca0132_tuning_ctls[i].direct);
if (err < 0)
return err;
- }
- return 0;
+}
+static void ca0132_init_tuning_defaults(struct hda_codec *codec) +{
- struct ca0132_spec *spec = codec->spec;
- int i;
- /* Wedge Angle defaults to 30. 10 below is 30 - 20. 20 is min. */
- spec->cur_ctl_vals[WEDGE_ANGLE - TUNING_CTL_START_NID] = 10;
- /* SVM level defaults to 0.74. */
- spec->cur_ctl_vals[SVM_LEVEL - TUNING_CTL_START_NID] = 74;
- /* EQ defaults to 0dB. */
- for (i = 2; i < TUNING_CTLS_COUNT; i++)
spec->cur_ctl_vals[i] = 24;
+} +#endif
+static void ca0132_apply_vnode_settings(struct hda_codec *codec,
hda_nid_t vnid,
hda_nid_t shared_nid, int type)
+{
- struct ca0132_spec *spec = codec->spec;
- int val;
- /* apply selected volume and switch */
- val = (int)spec->vnode_lvol[vnid - VNODE_START_NID];
- snd_hda_codec_amp_update(codec, shared_nid, 0,
type, 0, HDA_AMP_VOLMASK, val);
- val = (int)spec->vnode_rvol[vnid - VNODE_START_NID];
- snd_hda_codec_amp_update(codec, shared_nid, 1,
type, 0, HDA_AMP_VOLMASK, val);
- val = (int)spec->vnode_lswitch[vnid - VNODE_START_NID];
- snd_hda_codec_amp_update(codec, shared_nid, 0,
type, 0, HDA_AMP_MUTE,
val ? 0 : HDA_AMP_MUTE);
- val = (int)spec->vnode_rswitch[vnid - VNODE_START_NID];
- snd_hda_codec_amp_update(codec, shared_nid, 1,
type, 0, HDA_AMP_MUTE,
val ? 0 : HDA_AMP_MUTE);
+}
+static int ca0132_select_out(struct hda_codec *codec) +{
- struct ca0132_spec *spec = codec->spec;
- unsigned int pin_ctl;
- int jack_present;
- unsigned int tmp;
- int err;
- CA0132_LOG("ca0132_select_out\n");
- snd_hda_power_up(codec);
+#ifdef ENABLE_MANUAL_SELECT
- jack_present = spec->vnode_lswitch[VNID_HP_SEL - VNODE_START_NID];
+#else
- /* Is headphone jack detected? */
- jack_present = snd_hda_jack_detect(codec, spec->out_pins[1]);
+#endif
- if (jack_present)
spec->cur_out_type = HEADPHONE_OUT;
- else
spec->cur_out_type = SPEAKER_OUT;
- if (spec->cur_out_type == SPEAKER_OUT) {
/*speaker out config*/
tmp = FLOAT_ONE;
err = dspio_set_param(codec, 0x80, 0x04,
&tmp, sizeof(unsigned int));
if (err < 0)
goto exit;
/*enable speaker EQ*/
tmp = FLOAT_ONE;
err = dspio_set_param(codec, 0x8f, 0x00,
&tmp, sizeof(unsigned int));
if (err < 0)
goto exit;
/*speaker EQ bypass attenuation is 0*/
tmp = FLOAT_ZERO;
err = dspio_set_param(codec, 0x8f, 0x01,
&tmp, sizeof(unsigned int));
if (err < 0)
goto exit;
/* disable headphone node */
pin_ctl = snd_hda_codec_read(codec, spec->out_pins[1], 0,
AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
snd_hda_codec_write(codec, spec->out_pins[1], 0,
AC_VERB_SET_PIN_WIDGET_CONTROL,
pin_ctl & 0xBF);
/* disable headphone EAPD */
snd_hda_codec_write(codec, spec->out_pins[1], 0,
AC_VERB_SET_EAPD_BTLENABLE, 0x00);
/* apply selected volume and switch */
ca0132_apply_vnode_settings(codec, VNID_SPK,
spec->shared_out_nid, HDA_OUTPUT);
/* enable speaker node */
pin_ctl = snd_hda_codec_read(codec, spec->out_pins[0], 0,
AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
snd_hda_codec_write(codec, spec->out_pins[0], 0,
AC_VERB_SET_PIN_WIDGET_CONTROL,
pin_ctl | 0x40);
/* enable speaker EAPD */
snd_hda_codec_write(codec, spec->out_pins[0], 0,
AC_VERB_SET_EAPD_BTLENABLE, 0x02);
- } else {
/*headphone out config*/
tmp = FLOAT_ZERO;
err = dspio_set_param(codec, 0x80, 0x04,
&tmp, sizeof(unsigned int));
if (err < 0)
goto exit;
/*disable speaker EQ*/
tmp = FLOAT_ZERO;
err = dspio_set_param(codec, 0x8f, 0x00,
&tmp, sizeof(unsigned int));
if (err < 0)
goto exit;
/*speaker EQ bypass attenuation is -5.0*/
tmp = FLOAT_MINUS_5;
err = dspio_set_param(codec, 0x8f, 0x01,
&tmp, sizeof(unsigned int));
if (err < 0)
goto exit;
/* disable speaker*/
pin_ctl = snd_hda_codec_read(codec, spec->out_pins[0], 0,
AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
snd_hda_codec_write(codec, spec->out_pins[0], 0,
AC_VERB_SET_PIN_WIDGET_CONTROL,
pin_ctl & 0xBF);
/* disable speaker EAPD */
snd_hda_codec_write(codec, spec->out_pins[0], 0,
AC_VERB_SET_EAPD_BTLENABLE, 0x00);
/* apply selected volume and switch */
ca0132_apply_vnode_settings(codec, VNID_HP,
spec->shared_out_nid, HDA_OUTPUT);
/* enable headphone*/
pin_ctl = snd_hda_codec_read(codec, spec->out_pins[1], 0,
AC_VERB_GET_PIN_WIDGET_CONTROL, 0);
snd_hda_codec_write(codec, spec->out_pins[1], 0,
AC_VERB_SET_PIN_WIDGET_CONTROL,
pin_ctl | 0x40);
/* enable headphone EAPD */
snd_hda_codec_write(codec, spec->out_pins[1], 0,
AC_VERB_SET_EAPD_BTLENABLE, 0x02);
- }
+exit:
- snd_hda_power_down(codec);
- return err < 0 ? err : 0;
+}
+static void ca0132_set_dmic(struct hda_codec *codec, int enable); +static int ca0132_mic_boost_set(struct hda_codec *codec, long val); +static int ca0132_effects_set(struct hda_codec *codec, hda_nid_t nid, long val);
+static int ca0132_select_mic(struct hda_codec *codec) +{
- struct ca0132_spec *spec = codec->spec;
- hda_nid_t vnid;
- int jack_present;
- CA0132_LOG("ca0132_select_mic\n");
- snd_hda_power_up(codec);
+#ifdef ENABLE_MANUAL_SELECT
- jack_present = spec->vnode_lswitch[VNID_AMIC1_SEL - VNODE_START_NID];
+#else
- /* Is Analog Mic1 jack jack detected? */
- jack_present = snd_hda_jack_detect(codec, spec->input_pins[0]);
+#endif
- if (jack_present)
spec->cur_mic_type = LINE_MIC_IN;
- else
spec->cur_mic_type = DIGITAL_MIC;
- if (spec->cur_mic_type == DIGITAL_MIC) {
/* enable digital Mic */
ca0132_set_dmic(codec, 1);
ca0132_mic_boost_set(codec, 0);
/* set voice focus */
ca0132_effects_set(codec, VOICE_FOCUS,
spec->effects_switch[VOICE_FOCUS - EFFECT_START_NID]);
vnid = VNID_DMIC;
- } else {
/* disable digital Mic */
ca0132_set_dmic(codec, 0);
ca0132_mic_boost_set(codec, spec->cur_mic_boost);
/* disable voice focus */
ca0132_effects_set(codec, VOICE_FOCUS, 0);
vnid = VNID_AMIC1;
- }
- /* apply selected volume and switch */
- ca0132_apply_vnode_settings(codec, vnid,
spec->shared_mic_nid, HDA_INPUT);
- snd_hda_power_down(codec);
- return 0;
+}
+/*
- Check if VNODE settings take effect immediately.
- */
+static bool ca0132_is_vnode_effective(struct hda_codec *codec,
hda_nid_t vnid,
hda_nid_t *shared_nid)
+{
- struct ca0132_spec *spec = codec->spec;
- hda_nid_t nid;
- bool effective = false;
- switch (vnid) {
- case VNID_HP:
if (spec->cur_out_type == HEADPHONE_OUT) {
nid = spec->shared_out_nid;
effective = true;
}
break;
- case VNID_SPK:
if (spec->cur_out_type == SPEAKER_OUT) {
nid = spec->shared_out_nid;
effective = true;
}
break;
- case VNID_DMIC:
if (spec->cur_mic_type == DIGITAL_MIC) {
nid = spec->shared_mic_nid;
effective = true;
}
break;
- case VNID_AMIC1:
if (spec->cur_mic_type == LINE_MIC_IN) {
nid = spec->shared_mic_nid;
effective = true;
}
break;
- default:
break;
- }
- if (effective && shared_nid)
*shared_nid = nid;
- return effective;
+}
+/*
- The following functions are control change helpers.
- They return 0 if no changed. Return 1 if changed.
- */
+static int ca0132_voicefx_set(struct hda_codec *codec, int enable) +{
- struct ca0132_spec *spec = codec->spec;
- unsigned int tmp;
- /* based on CrystalVoice state to enable VoiceFX. */
- if (enable) {
tmp = spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] ?
FLOAT_ONE : FLOAT_ZERO;
- } else {
tmp = FLOAT_ZERO;
- }
- dspio_set_param(codec, ca0132_voicefx.mid,
ca0132_voicefx.reqs[0], &tmp, sizeof(float));
- return 1;
+}
+static int ca0132_effects_set(struct hda_codec *codec, hda_nid_t nid, long val) +{
- struct ca0132_spec *spec = codec->spec;
- unsigned int on;
- int num_fx = OUT_EFFECTS_COUNT + IN_EFFECTS_COUNT;
- int err = 0;
- int idx = nid - EFFECT_START_NID;
- if ((idx < 0) || (idx >= num_fx))
return 0; /* no changed */
- /* for out effect, qualify with PE */
- if ((nid >= OUT_EFFECT_START_NID) && (nid < OUT_EFFECT_END_NID)) {
/* if PE if off, turn off out effects. */
if (!spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID])
val = 0;
- }
- /* for in effect, qualify with CrystalVoice */
- if ((nid >= IN_EFFECT_START_NID) && (nid < IN_EFFECT_END_NID)) {
/* if CrystalVoice if off, turn off in effects. */
if (!spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID])
val = 0;
/* Voice Focus applies to 2-ch Mic, Digital Mic */
if ((nid == VOICE_FOCUS) && (spec->cur_mic_type != DIGITAL_MIC))
val = 0;
- }
- CA0132_LOG("ca0132_effect_set: nid=0x%x, val=%ld\n", nid, val);
- on = (val == 0) ? FLOAT_ZERO : FLOAT_ONE;
- err = dspio_set_param(codec, ca0132_effects[idx].mid,
ca0132_effects[idx].reqs[0],
&on, sizeof(unsigned int));
- if (err < 0)
return 0; /* no changed */
- return 1;
+}
+static int ca0132_pe_switch_set(struct hda_codec *codec) +{
- struct ca0132_spec *spec = codec->spec;
- hda_nid_t nid;
- int i, ret = 0;
- CA0132_LOG("ca0132_pe_switch_set: val=%ld\n",
spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID]);
- i = OUT_EFFECT_START_NID - EFFECT_START_NID;
- nid = OUT_EFFECT_START_NID;
- /* PE affects all out effects */
- for (; nid < OUT_EFFECT_END_NID; nid++, i++)
ret |= ca0132_effects_set(codec, nid, spec->effects_switch[i]);
- return ret;
+}
+static int ca0132_cvoice_switch_set(struct hda_codec *codec) +{
- struct ca0132_spec *spec = codec->spec;
- hda_nid_t nid;
- int i, ret = 0;
- CA0132_LOG("ca0132_cvoice_switch_set: val=%ld\n",
spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID]);
- i = IN_EFFECT_START_NID - EFFECT_START_NID;
- nid = IN_EFFECT_START_NID;
- /* CrystalVoice affects all in effects */
- for (; nid < IN_EFFECT_END_NID; nid++, i++)
ret |= ca0132_effects_set(codec, nid, spec->effects_switch[i]);
- /* including VoiceFX */
- ret |= ca0132_voicefx_set(codec, (spec->voicefx_val ? 1 : 0));
- return ret;
+}
+static int ca0132_mic_boost_set(struct hda_codec *codec, long val) +{
- struct ca0132_spec *spec = codec->spec;
- int ret = 0;
- if (val) /* on */
ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0,
HDA_INPUT, 0, HDA_AMP_VOLMASK, 3);
- else /* off */
ret = snd_hda_codec_amp_update(codec, spec->input_pins[0], 0,
HDA_INPUT, 0, HDA_AMP_VOLMASK, 0);
- return ret;
+}
+static int ca0132_vnode_switch_set(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
+{
- struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
- hda_nid_t nid = get_amp_nid(kcontrol);
- hda_nid_t shared_nid = 0;
- bool effective;
- int ret = 0;
+#ifdef ENABLE_MANUAL_SELECT
- if (nid == VNID_HP_SEL) {
ca0132_select_out(codec);
return 1;
- }
- if (nid == VNID_AMIC1_SEL) {
ca0132_select_mic(codec);
return 1;
- }
+#endif
- /* if effective conditions, then update hw immediately. */
- effective = ca0132_is_vnode_effective(codec, nid, &shared_nid);
- if (effective) {
int dir = get_amp_direction(kcontrol);
int ch = get_amp_channels(kcontrol);
unsigned long pval;
mutex_lock(&codec->control_mutex);
pval = kcontrol->private_value;
kcontrol->private_value = HDA_COMPOSE_AMP_VAL(shared_nid, ch,
0, dir);
ret = snd_hda_mixer_amp_switch_put(kcontrol, ucontrol);
kcontrol->private_value = pval;
mutex_unlock(&codec->control_mutex);
- }
- return ret;
+} +/* End of control change helpers. */
+static int ca0132_voicefx_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
+{
- unsigned int items = sizeof(ca0132_voicefx_presets)
/ sizeof(struct ct_voicefx_preset);
- uinfo->type = SNDRV_CTL_ELEM_TYPE_ENUMERATED;
- uinfo->count = 1;
- uinfo->value.enumerated.items = items;
- if (uinfo->value.enumerated.item >= items)
uinfo->value.enumerated.item = items - 1;
- strcpy(uinfo->value.enumerated.name,
ca0132_voicefx_presets[uinfo->value.enumerated.item].name);
- return 0;
+}
+static int ca0132_voicefx_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
+{
- struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
- struct ca0132_spec *spec = codec->spec;
- ucontrol->value.enumerated.item[0] = spec->voicefx_val;
- return 0;
+}
+static int ca0132_voicefx_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
+{
- struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
- struct ca0132_spec *spec = codec->spec;
- int i, err = 0;
- int sel = ucontrol->value.enumerated.item[0];
- unsigned int items = sizeof(ca0132_voicefx_presets)
/ sizeof(struct ct_voicefx_preset);
- if (sel >= items)
return 0;
- CA0132_LOG("ca0132_voicefx_put: sel=%d, preset=%s\n",
sel, ca0132_voicefx_presets[sel].name);
- /*
* Idx 0 is default.
* Default needs to qualify with CrystalVoice state.
*/
- for (i = 0; i < VOICEFX_MAX_PARAM_COUNT; i++) {
err = dspio_set_param(codec, ca0132_voicefx.mid,
ca0132_voicefx.reqs[i],
&(ca0132_voicefx_presets[sel].vals[i]),
sizeof(float));
if (err < 0)
break;
- }
- if (err >= 0) {
spec->voicefx_val = sel;
/* enable voice fx */
ca0132_voicefx_set(codec, (sel ? 1 : 0));
- }
- return 1;
+}
+static int ca0132_switch_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
+{
- struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
- struct ca0132_spec *spec = codec->spec;
- hda_nid_t nid = get_amp_nid(kcontrol);
- int ch = get_amp_channels(kcontrol);
- long *valp = ucontrol->value.integer.value;
- /* vnode */
- if ((nid >= VNODE_START_NID) && (nid < VNODE_END_NID)) {
if (ch & 1) {
*valp = spec->vnode_lswitch[nid - VNODE_START_NID];
valp++;
}
if (ch & 2) {
*valp = spec->vnode_rswitch[nid - VNODE_START_NID];
valp++;
}
return 0;
- }
- /* effects, include PE and CrystalVoice */
- if ((nid >= EFFECT_START_NID) && (nid < EFFECT_END_NID)) {
*valp = spec->effects_switch[nid - EFFECT_START_NID];
return 0;
- }
- /* mic boost */
- if (nid == spec->input_pins[0]) {
*valp = spec->cur_mic_boost;
return 0;
- }
- return 0;
+}
+static int ca0132_switch_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
+{
- struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
- struct ca0132_spec *spec = codec->spec;
- hda_nid_t nid = get_amp_nid(kcontrol);
- int ch = get_amp_channels(kcontrol);
- long *valp = ucontrol->value.integer.value;
- int changed = 1;
- CA0132_LOG("ca0132_switch_put: nid=0x%x, val=%ld\n", nid, *valp);
- snd_hda_power_up(codec);
- /* vnode */
- if ((nid >= VNODE_START_NID) && (nid < VNODE_END_NID)) {
if (ch & 1) {
spec->vnode_lswitch[nid - VNODE_START_NID] = *valp;
valp++;
}
if (ch & 2) {
spec->vnode_rswitch[nid - VNODE_START_NID] = *valp;
valp++;
}
changed = ca0132_vnode_switch_set(kcontrol, ucontrol);
goto exit;
- }
- /* PE */
- if (nid == PLAY_ENHANCEMENT) {
spec->effects_switch[nid - EFFECT_START_NID] = *valp;
changed = ca0132_pe_switch_set(codec);
goto exit;
- }
- /* CrystalVoice */
- if (nid == CRYSTAL_VOICE) {
spec->effects_switch[nid - EFFECT_START_NID] = *valp;
changed = ca0132_cvoice_switch_set(codec);
goto exit;
- }
- /* out and in effects */
- if (((nid >= OUT_EFFECT_START_NID) && (nid < OUT_EFFECT_END_NID)) ||
((nid >= IN_EFFECT_START_NID) && (nid < IN_EFFECT_END_NID))) {
spec->effects_switch[nid - EFFECT_START_NID] = *valp;
changed = ca0132_effects_set(codec, nid, *valp);
goto exit;
- }
- /* mic boost */
- if (nid == spec->input_pins[0]) {
spec->cur_mic_boost = *valp;
/* Mic boost does not apply to Digital Mic */
if (spec->cur_mic_type != DIGITAL_MIC)
changed = ca0132_mic_boost_set(codec, *valp);
goto exit;
- }
+exit:
- snd_hda_power_down(codec);
- return changed;
+}
+/*
- Volume related
- */
+static int ca0132_volume_info(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_info *uinfo)
+{
- struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
- struct ca0132_spec *spec = codec->spec;
- hda_nid_t nid = get_amp_nid(kcontrol);
- int ch = get_amp_channels(kcontrol);
- int dir = get_amp_direction(kcontrol);
- unsigned long pval;
- int err;
- switch (nid) {
- case VNID_HP:
- case VNID_SPK:
/* follow shared_out info */
nid = spec->shared_out_nid;
mutex_lock(&codec->control_mutex);
pval = kcontrol->private_value;
kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir);
err = snd_hda_mixer_amp_volume_info(kcontrol, uinfo);
kcontrol->private_value = pval;
mutex_unlock(&codec->control_mutex);
break;
- case VNID_DMIC:
- case VNID_AMIC1:
/* follow shared_mic info */
nid = spec->shared_mic_nid;
mutex_lock(&codec->control_mutex);
pval = kcontrol->private_value;
kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir);
err = snd_hda_mixer_amp_volume_info(kcontrol, uinfo);
kcontrol->private_value = pval;
mutex_unlock(&codec->control_mutex);
break;
- default:
err = snd_hda_mixer_amp_volume_info(kcontrol, uinfo);
- }
- return err;
+}
+static int ca0132_volume_get(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
+{
- struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
- struct ca0132_spec *spec = codec->spec;
- hda_nid_t nid = get_amp_nid(kcontrol);
- int ch = get_amp_channels(kcontrol);
- long *valp = ucontrol->value.integer.value;
- /* store the left and right volume */
- if (ch & 1) {
*valp = spec->vnode_lvol[nid - VNODE_START_NID];
valp++;
- }
- if (ch & 2) {
*valp = spec->vnode_rvol[nid - VNODE_START_NID];
valp++;
- }
- return 0;
+}
+static int ca0132_volume_put(struct snd_kcontrol *kcontrol,
struct snd_ctl_elem_value *ucontrol)
+{
- struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
- struct ca0132_spec *spec = codec->spec;
- hda_nid_t nid = get_amp_nid(kcontrol);
- int ch = get_amp_channels(kcontrol);
- long *valp = ucontrol->value.integer.value;
- hda_nid_t shared_nid = 0;
- bool effective;
- int changed = 1;
- /* store the left and right volume */
- if (ch & 1) {
spec->vnode_lvol[nid - VNODE_START_NID] = *valp;
valp++;
- }
- if (ch & 2) {
spec->vnode_rvol[nid - VNODE_START_NID] = *valp;
valp++;
- }
- /* if effective conditions, then update hw immediately. */
- effective = ca0132_is_vnode_effective(codec, nid, &shared_nid);
- if (effective) {
int dir = get_amp_direction(kcontrol);
unsigned long pval;
snd_hda_power_up(codec);
mutex_lock(&codec->control_mutex);
pval = kcontrol->private_value;
kcontrol->private_value = HDA_COMPOSE_AMP_VAL(shared_nid, ch,
0, dir);
changed = snd_hda_mixer_amp_volume_put(kcontrol, ucontrol);
kcontrol->private_value = pval;
mutex_unlock(&codec->control_mutex);
snd_hda_power_down(codec);
- }
- return changed;
+}
+static int ca0132_volume_tlv(struct snd_kcontrol *kcontrol, int op_flag,
unsigned int size, unsigned int __user *tlv)
+{
- struct hda_codec *codec = snd_kcontrol_chip(kcontrol);
- struct ca0132_spec *spec = codec->spec;
- hda_nid_t nid = get_amp_nid(kcontrol);
- int ch = get_amp_channels(kcontrol);
- int dir = get_amp_direction(kcontrol);
- unsigned long pval;
- int err;
- switch (nid) {
- case VNID_HP:
- case VNID_SPK:
/* follow shared_out tlv */
nid = spec->shared_out_nid;
mutex_lock(&codec->control_mutex);
pval = kcontrol->private_value;
kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir);
err = snd_hda_mixer_amp_tlv(kcontrol, op_flag, size, tlv);
kcontrol->private_value = pval;
mutex_unlock(&codec->control_mutex);
break;
- case VNID_DMIC:
- case VNID_AMIC1:
/* follow shared_mic tlv */
nid = spec->shared_mic_nid;
mutex_lock(&codec->control_mutex);
pval = kcontrol->private_value;
kcontrol->private_value = HDA_COMPOSE_AMP_VAL(nid, ch, 0, dir);
err = snd_hda_mixer_amp_tlv(kcontrol, op_flag, size, tlv);
kcontrol->private_value = pval;
mutex_unlock(&codec->control_mutex);
break;
- default:
err = snd_hda_mixer_amp_tlv(kcontrol, op_flag, size, tlv);
- }
- return err;
+}
+static int add_fx_switch(struct hda_codec *codec, hda_nid_t nid,
const char *pfx, int dir)
+{
- char namestr[44];
- int type = dir ? HDA_INPUT : HDA_OUTPUT;
- struct snd_kcontrol_new knew =
CA0132_CODEC_MUTE_MONO(namestr, nid, 1, type);
- sprintf(namestr, "%s %s Switch", pfx, dirstr[dir]);
- return snd_hda_ctl_add(codec, nid, snd_ctl_new1(&knew, codec));
+}
+static int add_voicefx(struct hda_codec *codec) +{
- struct snd_kcontrol_new knew =
HDA_CODEC_MUTE_MONO(ca0132_voicefx.name,
VOICEFX, 1, 0, HDA_INPUT);
- knew.info = ca0132_voicefx_info;
- knew.get = ca0132_voicefx_get;
- knew.put = ca0132_voicefx_put;
- return snd_hda_ctl_add(codec, VOICEFX, snd_ctl_new1(&knew, codec));
+}
+/*
- When changing Node IDs for Mixer Controls below, make sure to update
- Node IDs in ca0132_config() as well.
- */
+static struct snd_kcontrol_new ca0132_mixer[] = {
- CA0132_CODEC_VOL("Headphone Playback Volume", VNID_HP, HDA_OUTPUT),
- CA0132_CODEC_MUTE("Headphone Playback Switch", VNID_HP, HDA_OUTPUT),
- CA0132_CODEC_VOL("PC Speaker Playback Volume", VNID_SPK, HDA_OUTPUT),
- CA0132_CODEC_MUTE("PC Speaker Playback Switch", VNID_SPK, HDA_OUTPUT),
- CA0132_CODEC_VOL("Digital-Mic Capture Volume", VNID_DMIC, HDA_INPUT),
- CA0132_CODEC_MUTE("Digital-Mic Capture Switch", VNID_DMIC, HDA_INPUT),
- CA0132_CODEC_VOL("Analog-Mic1 Capture Volume", VNID_AMIC1, HDA_INPUT),
- CA0132_CODEC_MUTE("Analog-Mic1 Capture Switch", VNID_AMIC1, HDA_INPUT),
- HDA_CODEC_VOLUME("Analog-Mic2 Capture Volume", 0x08, 0, HDA_INPUT),
- HDA_CODEC_MUTE("Analog-Mic2 Capture Switch", 0x08, 0, HDA_INPUT),
- HDA_CODEC_VOLUME("What U Hear Capture Volume", 0x0a, 0, HDA_INPUT),
- HDA_CODEC_MUTE("What U Hear Capture Switch", 0x0a, 0, HDA_INPUT),
- CA0132_CODEC_MUTE_MONO("Mic1-Boost (30dB) Capture Switch",
0x12, 1, HDA_INPUT),
+#ifdef ENABLE_MANUAL_SELECT
- CA0132_CODEC_MUTE_MONO("HP/Speaker Playback Switch",
VNID_HP_SEL, 1, HDA_OUTPUT),
- CA0132_CODEC_MUTE_MONO("AMic1/DMic Capture Switch",
VNID_AMIC1_SEL, 1, HDA_INPUT),
+#endif
- { } /* end */
+};
+static int ca0132_build_controls(struct hda_codec *codec) +{
- struct ca0132_spec *spec = codec->spec;
- int i, num_fx;
- int err = 0;
- /* Add Mixer controls */
- for (i = 0; i < spec->num_mixers; i++) {
err = snd_hda_add_new_ctls(codec, spec->mixers[i]);
if (err < 0)
return err;
- }
- /* Add in and out effects controls.
* VoiceFX, PE and CrystalVoice are added separately.
*/
- num_fx = OUT_EFFECTS_COUNT + IN_EFFECTS_COUNT;
- for (i = 0; i < num_fx; i++) {
err = add_fx_switch(codec, ca0132_effects[i].nid,
ca0132_effects[i].name,
ca0132_effects[i].direct);
if (err < 0)
return err;
- }
- err = add_fx_switch(codec, PLAY_ENHANCEMENT, "PlayEnhancement", 0);
- if (err < 0)
return err;
- err = add_fx_switch(codec, CRYSTAL_VOICE, "CrystalVoice", 1);
- if (err < 0)
return err;
- add_voicefx(codec);
- #ifdef ENABLE_TUNING_CONTROLS
- add_tuning_ctls(codec);
- #endif
- return 0;
+}
+/*
- PCM
- */
+static struct hda_pcm_stream ca0132_pcm_analog_playback = {
- .substreams = 1,
- .channels_min = 2,
- .channels_max = 6,
- .ops = {
.prepare = ca0132_playback_pcm_prepare,
.cleanup = ca0132_playback_pcm_cleanup
- },
+};
+static struct hda_pcm_stream ca0132_pcm_analog_capture = {
- .substreams = 1,
- .channels_min = 2,
- .channels_max = 2,
- .ops = {
.prepare = ca0132_capture_pcm_prepare,
.cleanup = ca0132_capture_pcm_cleanup
- },
+};
+static int ca0132_build_pcms(struct hda_codec *codec) +{
- struct ca0132_spec *spec = codec->spec;
- struct hda_pcm *info = spec->pcm_rec;
- codec->pcm_info = info;
- codec->num_pcms = 0;
- info->name = "CA0132 Playback";
- info->stream[SNDRV_PCM_STREAM_PLAYBACK] = ca0132_pcm_analog_playback;
- info->stream[SNDRV_PCM_STREAM_PLAYBACK].nid = spec->dacs[0];
- info->stream[SNDRV_PCM_STREAM_PLAYBACK].channels_max =
spec->multiout.max_channels;
- codec->num_pcms++;
- info++;
- info->name = "CA0132 Digital-Mic / Analog-Mic1";
- info->stream[SNDRV_PCM_STREAM_CAPTURE] = ca0132_pcm_analog_capture;
- info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = 1;
- info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[0];
- codec->num_pcms++;
- info++;
- info->name = "CA0132 Analog Mic-In2";
- info->stream[SNDRV_PCM_STREAM_CAPTURE] = ca0132_pcm_analog_capture;
- info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = 1;
- info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[1];
- codec->num_pcms++;
- info++;
- info->name = "CA0132 What U Hear";
- info->stream[SNDRV_PCM_STREAM_CAPTURE] = ca0132_pcm_analog_capture;
- info->stream[SNDRV_PCM_STREAM_CAPTURE].substreams = 1;
- info->stream[SNDRV_PCM_STREAM_CAPTURE].nid = spec->adcs[2];
- codec->num_pcms++;
- return 0;
+}
+static void init_output(struct hda_codec *codec, hda_nid_t pin, hda_nid_t dac) +{
- if (pin) {
snd_hda_codec_write(codec, pin, 0,
AC_VERB_SET_PIN_WIDGET_CONTROL, PIN_HP);
if (get_wcaps(codec, pin) & AC_WCAP_OUT_AMP)
snd_hda_codec_write(codec, pin, 0,
AC_VERB_SET_AMP_GAIN_MUTE,
AMP_OUT_UNMUTE);
- }
- if (dac)
snd_hda_codec_write(codec, dac, 0, AC_VERB_SET_AMP_GAIN_MUTE,
AMP_OUT_ZERO);
+}
+static void init_input(struct hda_codec *codec, hda_nid_t pin, hda_nid_t adc) +{
- if (pin) {
snd_hda_codec_write(codec, pin, 0,
AC_VERB_SET_PIN_WIDGET_CONTROL,
PIN_VREF80);
if (get_wcaps(codec, pin) & AC_WCAP_IN_AMP)
snd_hda_codec_write(codec, pin, 0,
AC_VERB_SET_AMP_GAIN_MUTE,
AMP_IN_UNMUTE(0));
- }
- if (adc) {
snd_hda_codec_write(codec, adc, 0, AC_VERB_SET_AMP_GAIN_MUTE,
AMP_IN_UNMUTE(0));
/* init to 0 dB and unmute. */
snd_hda_codec_amp_stereo(codec, adc, HDA_INPUT, 0,
HDA_AMP_VOLMASK, 0x5a);
snd_hda_codec_amp_stereo(codec, adc, HDA_INPUT, 0,
HDA_AMP_MUTE, 0);
- }
+}
+static void refresh_amp_caps(struct hda_codec *codec, hda_nid_t nid, int dir) +{
- unsigned int caps;
- caps = snd_hda_param_read(codec, nid, dir == HDA_OUTPUT ?
AC_PAR_AMP_OUT_CAP : AC_PAR_AMP_IN_CAP);
- snd_hda_override_amp_caps(codec, nid, dir, caps);
+}
+static void ca0132_set_dmic(struct hda_codec *codec, int enable) +{
- struct ca0132_spec *spec = codec->spec;
- unsigned int tmp;
- u8 val;
- CA0132_LOG("ca0132_set_dmic: enable=%d\n", enable);
- if (enable) {
/* set DMic input as 2-ch */
tmp = FLOAT_TWO;
dspio_set_param(codec, 0x80, 0x00, &tmp, sizeof(unsigned int));
val = spec->dmic_ctl;
val |= 0x80;
snd_hda_codec_write(codec, spec->input_pins[0], 0,
VENDOR_CHIPIO_DMIC_CTL_SET, val);
if (!(spec->dmic_ctl & 0x20))
chipio_set_control_flag(codec, CONTROL_FLAG_DMIC, 1);
- } else {
/* set AMic input as mono */
tmp = FLOAT_ONE;
dspio_set_param(codec, 0x80, 0x00, &tmp, sizeof(unsigned int));
val = spec->dmic_ctl;
/* clear bit7 and bit5 to disable dmic */
val &= 0x5f;
snd_hda_codec_write(codec, spec->input_pins[0], 0,
VENDOR_CHIPIO_DMIC_CTL_SET, val);
if (!(spec->dmic_ctl & 0x20))
chipio_set_control_flag(codec, CONTROL_FLAG_DMIC, 0);
- }
+}
+static void ca0132_init_dmic(struct hda_codec *codec) +{
- struct ca0132_spec *spec = codec->spec;
- u8 val;
- /* Setup Digital Mic here, but don't enable.
* Enable based on jack detect.
*/
- /* MCLK uses MPIO1, set to enable.
* Bit 2-0: MPIO select
* Bit 3: set to disable
* Bit 7-4: reserved
*/
- val = 0x01;
- snd_hda_codec_write(codec, spec->input_pins[0], 0,
VENDOR_CHIPIO_DMIC_MCLK_SET, val);
- /* Data1 uses MPIO3. Data2 not use
* Bit 2-0: Data1 MPIO select
* Bit 3: set disable Data1
* Bit 6-4: Data2 MPIO select
* Bit 7: set disable Data2
*/
- val = 0x83;
- snd_hda_codec_write(codec, spec->input_pins[0], 0,
VENDOR_CHIPIO_DMIC_PIN_SET, val);
- /* Use Ch-0 and Ch-1. Rate is 48K, mode 1. Disable DMic first.
* Bit 3-0: Channel mask
* Bit 4: set for 48KHz, clear for 32KHz
* Bit 5: mode
* Bit 6: set to select Data2, clear for Data1
* Bit 7: set to enable DMic, clear for AMic
*/
- val = 0x33;
- /* keep a copy of dmic ctl val for enable/disable dmic purpuse */
- spec->dmic_ctl = val;
- snd_hda_codec_write(codec, spec->input_pins[0], 0,
VENDOR_CHIPIO_DMIC_CTL_SET, val);
+}
+static void ca0132_init_analog_mic2(struct hda_codec *codec) +{
- struct ca0132_spec *spec = codec->spec;
- mutex_lock(&spec->chipio_mutex);
- snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x20);
- snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x19);
- snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
VENDOR_CHIPIO_8051_DATA_WRITE, 0x00);
- snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
VENDOR_CHIPIO_8051_ADDRESS_LOW, 0x2D);
- snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
VENDOR_CHIPIO_8051_ADDRESS_HIGH, 0x19);
- snd_hda_codec_write(codec, WIDGET_CHIP_CTRL, 0,
VENDOR_CHIPIO_8051_DATA_WRITE, 0x00);
- mutex_unlock(&spec->chipio_mutex);
+}
+static void ca0132_refresh_widget_caps(struct hda_codec *codec) +{
- struct ca0132_spec *spec = codec->spec;
- int i;
- hda_nid_t nid;
- CA0132_LOG("ca0132_refresh_widget_caps.\n");
- nid = codec->start_nid;
- for (i = 0; i < codec->num_nodes; i++, nid++)
codec->wcaps[i] = snd_hda_param_read(codec, nid,
AC_PAR_AUDIO_WIDGET_CAP);
- for (i = 0; i < spec->multiout.num_dacs; i++)
refresh_amp_caps(codec, spec->dacs[i], HDA_OUTPUT);
- for (i = 0; i < spec->num_outputs; i++)
refresh_amp_caps(codec, spec->out_pins[i], HDA_OUTPUT);
- for (i = 0; i < spec->num_inputs; i++) {
refresh_amp_caps(codec, spec->adcs[i], HDA_INPUT);
refresh_amp_caps(codec, spec->input_pins[i], HDA_INPUT);
- }
+}
+static void ca0132_setup_defaults(struct hda_codec *codec) +{
- unsigned int tmp;
- int num_fx;
- int idx, i;
- if (!dspload_is_loaded(codec))
return;
- /* out, in effects + voicefx */
- num_fx = OUT_EFFECTS_COUNT + IN_EFFECTS_COUNT + 1;
- for (idx = 0; idx < num_fx; idx++) {
for (i = 0; i <= ca0132_effects[idx].params; i++) {
dspio_set_param(codec, ca0132_effects[idx].mid,
ca0132_effects[idx].reqs[i],
&(ca0132_effects[idx].def_vals[i]),
sizeof(float));
}
- }
- /* set AMic1 and AMic2 as mono mic */
- tmp = FLOAT_ONE;
- dspio_set_param(codec, 0x80, 0x00, &tmp, sizeof(unsigned int));
- dspio_set_param(codec, 0x80, 0x01, &tmp, sizeof(unsigned int));
- /* set AMic1 as CrystalVoice input */
- tmp = FLOAT_ONE;
- dspio_set_param(codec, 0x80, 0x05, &tmp, sizeof(unsigned int));
+}
+static void ca0132_init_flags(struct hda_codec *codec) +{
- chipio_set_control_flag(codec, CONTROL_FLAG_IDLE_ENABLE, 0);
- chipio_set_control_flag(codec, CONTROL_FLAG_PORT_A_COMMON_MODE, 0);
- chipio_set_control_flag(codec, CONTROL_FLAG_PORT_D_COMMON_MODE, 0);
- chipio_set_control_flag(codec, CONTROL_FLAG_PORT_A_10KOHM_LOAD, 0);
- chipio_set_control_flag(codec, CONTROL_FLAG_PORT_D_10KOHM_LOAD, 0);
- chipio_set_control_flag(codec, CONTROL_FLAG_ADC_C_HIGH_PASS, 1);
+}
+static void ca0132_set_dsp_msr(struct hda_codec *codec, bool is96k) +{
- chipio_set_control_flag(codec, CONTROL_FLAG_DSP_96KHZ, is96k);
- chipio_set_control_flag(codec, CONTROL_FLAG_DAC_96KHZ, is96k);
- chipio_set_control_flag(codec, CONTROL_FLAG_SRC_RATE_96KHZ, is96k);
- chipio_set_control_flag(codec, CONTROL_FLAG_SRC_CLOCK_196MHZ, is96k);
- chipio_set_control_flag(codec, CONTROL_FLAG_ADC_B_96KHZ, is96k);
- chipio_set_control_flag(codec, CONTROL_FLAG_ADC_C_96KHZ, is96k);
- chipio_set_conn_rate(codec, MEM_CONNID_MICIN1, SR_16_000);
- chipio_set_conn_rate(codec, MEM_CONNID_MICOUT1, SR_16_000);
- chipio_set_conn_rate(codec, MEM_CONNID_WUH, SR_48_000);
+}
+static bool ca0132_download_dsp_images(struct hda_codec *codec) +{
- bool dsp_loaded = false;
- const struct dsp_image_seg *dsp_os_image;
- dsp_os_image = (struct dsp_image_seg *)DspImage_dsp_os;
- dspload_image(codec, dsp_os_image, 0, 0, true, 0);
- dsp_loaded = dspload_wait_loaded(codec);
- if (dsp_loaded)
dspload_speakereq(codec);
- return dsp_loaded;
+}
+static void ca0132_download_dsp(struct hda_codec *codec) +{
- struct ca0132_spec *spec = codec->spec;
- spec->dsp_state = DSP_DOWNLOAD_INIT;
- /* check if there is power cut-off to DSP */
- if (dspload_is_loaded(codec)) {
/* dsp is already loaded. */
/*spec->dsp_state = DSP_DOWNLOADED;*/
- }
- if (spec->dsp_state == DSP_DOWNLOAD_INIT) {
chipio_enable_clocks(codec);
spec->dsp_state = DSP_DOWNLOADING;
if (!ca0132_download_dsp_images(codec))
spec->dsp_state = DSP_DOWNLOAD_FAILED;
else
spec->dsp_state = DSP_DOWNLOADED;
- }
- if (spec->dsp_state == DSP_DOWNLOADED)
ca0132_set_dsp_msr(codec, true);
+}
+static void ca0132_process_dsp_response(struct hda_codec *codec) +{
- struct ca0132_spec *spec = codec->spec;
- CA0132_LOG("ca0132_process_dsp_response\n");
- if (spec->wait_scp) {
if (dspio_get_response_data(codec) >= 0)
spec->wait_scp = 0;
- }
- dspio_clear_response_queue(codec);
+}
+static void ca0132_unsol_event(struct hda_codec *codec, unsigned int res) +{
- CA0132_LOG("ca0132_unsol_event: 0x%x\n", res);
- switch ((res >> AC_UNSOL_RES_TAG_SHIFT) & 0x3f) {
- case UNSOL_TAG_DSP:
ca0132_process_dsp_response(codec);
break;
- case UNSOL_TAG_HP:
ca0132_select_out(codec);
break;
- case UNSOL_TAG_AMIC1:
ca0132_select_mic(codec);
break;
- default:
break;
- }
+}
+/*
- Verbs tables.
- */
+/* Sends before DSP download. */ +static struct hda_verb ca0132_base_init_verbs[] = {
- /*enable ct extension*/
- {0x15, VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE, 0x1},
- /*enable DSP node unsol, needed for DSP download*/
- {0x16, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | UNSOL_TAG_DSP},
- {}
+};
+/* Send at exit. */ +static struct hda_verb ca0132_base_exit_verbs[] = {
- /*set afg to D3*/
- {0x01, AC_VERB_SET_POWER_STATE, 0x03},
- /*disable ct extension*/
- {0x15, VENDOR_CHIPIO_CT_EXTENSIONS_ENABLE, 0},
- {}
+};
+/* Other verbs tables. Sends after DSP download. */ +static struct hda_verb ca0132_init_verbs0[] = {
- /* chip init verbs */
- {0x15, 0x70D, 0xF0},
- {0x15, 0x70E, 0xFE},
- {0x15, 0x707, 0x75},
- {0x15, 0x707, 0xD3},
- {0x15, 0x707, 0x09},
- {0x15, 0x707, 0x53},
- {0x15, 0x707, 0xD4},
- {0x15, 0x707, 0xEF},
- {0x15, 0x707, 0x75},
- {0x15, 0x707, 0xD3},
- {0x15, 0x707, 0x09},
- {0x15, 0x707, 0x02},
- {0x15, 0x707, 0x37},
- {0x15, 0x707, 0x78},
- {0x15, 0x53C, 0xCE},
- {0x15, 0x575, 0xC9},
- {0x15, 0x53D, 0xCE},
- {0x15, 0x5B7, 0xC9},
- {0x15, 0x70D, 0xE8},
- {0x15, 0x70E, 0xFE},
- {0x15, 0x707, 0x02},
- {0x15, 0x707, 0x68},
- {0x15, 0x707, 0x62},
- {0x15, 0x53A, 0xCE},
- {0x15, 0x546, 0xC9},
- {0x15, 0x53B, 0xCE},
- {0x15, 0x5E8, 0xC9},
- {0x15, 0x717, 0x0D},
- {0x15, 0x718, 0x20},
- {}
+};
+static struct hda_verb ca0132_init_verbs1[] = {
- {0x0f, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | UNSOL_TAG_HP},
- {0x12, AC_VERB_SET_UNSOLICITED_ENABLE, AC_USRSP_EN | UNSOL_TAG_AMIC1},
- /* config EAPD */
- {0x0b, 0x78D, 0x00},
- /*{0x0b, AC_VERB_SET_EAPD_BTLENABLE, 0x02},*/
- {0x10, 0x78D, 0x02},
- /*{0x10, AC_VERB_SET_EAPD_BTLENABLE, 0x02},*/
- {}
+};
+static void ca0132_init_chip(struct hda_codec *codec) +{
- struct ca0132_spec *spec = codec->spec;
- int num_fx;
- int i;
- unsigned int on;
- mutex_init(&spec->chipio_mutex);
- spec->cur_out_type = SPEAKER_OUT;
- spec->cur_mic_type = DIGITAL_MIC;
- spec->cur_mic_boost = 0;
- for (i = 0; i < VNODES_COUNT; i++) {
spec->vnode_lvol[i] = 0x5a;
spec->vnode_rvol[i] = 0x5a;
spec->vnode_lswitch[i] = 0;
spec->vnode_rswitch[i] = 0;
- }
- /*
* Default states for effects are in ca0132_effects[].
*/
- num_fx = OUT_EFFECTS_COUNT + IN_EFFECTS_COUNT;
- for (i = 0; i < num_fx; i++) {
on = (unsigned int)ca0132_effects[i].reqs[0];
spec->effects_switch[i] = on ? 1 : 0;
- }
- spec->voicefx_val = 0;
- spec->effects_switch[PLAY_ENHANCEMENT - EFFECT_START_NID] = 1;
- spec->effects_switch[CRYSTAL_VOICE - EFFECT_START_NID] = 0;
- #ifdef ENABLE_TUNING_CONTROLS
- ca0132_init_tuning_defaults(codec);
- #endif
+}
+static void ca0132_exit_chip(struct hda_codec *codec) +{
- /* put any chip cleanup stuffs here. */
- if (dspload_is_loaded(codec))
dsp_reset(codec);
+}
+static int ca0132_init(struct hda_codec *codec) +{
- struct ca0132_spec *spec = codec->spec;
- int i;
- spec->dsp_state = DSP_DOWNLOAD_INIT;
- spec->curr_chip_addx = ~0UL;
- snd_hda_power_up(codec);
- ca0132_init_flags(codec);
- snd_hda_sequence_write(codec, spec->base_init_verbs);
- ca0132_download_dsp(codec);
- ca0132_refresh_widget_caps(codec);
- ca0132_setup_defaults(codec);
- ca0132_init_analog_mic2(codec);
- ca0132_init_dmic(codec);
- for (i = 0; i < spec->num_outputs; i++)
init_output(codec, spec->out_pins[i], spec->dacs[0]);
- for (i = 0; i < spec->num_inputs; i++)
init_input(codec, spec->input_pins[i], spec->adcs[i]);
- for (i = 0; i < spec->num_init_verbs; i++)
snd_hda_sequence_write(codec, spec->init_verbs[i]);
- ca0132_select_out(codec);
- ca0132_select_mic(codec);
- snd_hda_power_down(codec);
- return 0;
+}
+static void ca0132_free(struct hda_codec *codec) +{
- struct ca0132_spec *spec = codec->spec;
- snd_hda_power_up(codec);
- snd_hda_sequence_write(codec, spec->base_exit_verbs);
- ca0132_exit_chip(codec);
- snd_hda_power_down(codec);
- kfree(codec->spec);
+}
+static struct hda_codec_ops ca0132_patch_ops = {
- .build_controls = ca0132_build_controls,
- .build_pcms = ca0132_build_pcms,
- .init = ca0132_init,
- .free = ca0132_free,
- .unsol_event = ca0132_unsol_event,
+};
+static void ca0132_config(struct hda_codec *codec) +{
- struct ca0132_spec *spec = codec->spec;
- spec->dacs[0] = 0x2;
- spec->dacs[1] = 0x3;
- spec->dacs[2] = 0x4;
- spec->multiout.dac_nids = spec->dacs;
- spec->multiout.num_dacs = 3;
- spec->multiout.max_channels = 2;
- spec->num_outputs = 2;
- spec->out_pins[0] = 0x0b; /* speaker out */
- spec->out_pins[1] = 0x10; /* headphone out */
- spec->shared_out_nid = 0x2;
- spec->num_inputs = 3;
- spec->adcs[0] = 0x7; /* digital mic / analog mic1 */
- spec->adcs[1] = 0x8; /* analog mic2 */
- spec->adcs[2] = 0xa; /* what u hear */
- spec->shared_mic_nid = 0x7;
- spec->input_pins[0] = 0x12;
- spec->input_pins[1] = 0x11;
- spec->input_pins[2] = 0x13;
+}
+static int patch_ca0132(struct hda_codec *codec) +{
- struct ca0132_spec *spec;
- snd_printdd("patch_ca0132\n");
- spec = kzalloc(sizeof(*spec), GFP_KERNEL);
- if (!spec)
return -ENOMEM;
- codec->spec = spec;
- spec->num_mixers = 1;
- spec->mixers[0] = ca0132_mixer;
- spec->base_init_verbs = ca0132_base_init_verbs;
- spec->base_exit_verbs = ca0132_base_exit_verbs;
- spec->init_verbs[0] = ca0132_init_verbs0;
- spec->init_verbs[1] = ca0132_init_verbs1;
- spec->num_init_verbs = 2;
- ca0132_init_chip(codec);
- ca0132_config(codec);
- codec->patch_ops = ca0132_patch_ops;
- return 0;
+}
+/*
- patch entries
- */
+static struct hda_codec_preset snd_hda_preset_ca0132[] = {
- { .id = 0x11020011, .name = "CA0132", .patch = patch_ca0132 },
- {} /* terminator */
+};
+MODULE_ALIAS("snd-hda-codec-id:11020011");
+MODULE_LICENSE("GPL"); +MODULE_DESCRIPTION("Creative Sound Core3D codec");
+static struct hda_codec_preset_list ca0132_list = {
- .preset = snd_hda_preset_ca0132,
- .owner = THIS_MODULE,
+};
+static int __init patch_ca0132_init(void) +{
- return snd_hda_add_codec_preset(&ca0132_list);
+}
+static void __exit patch_ca0132_exit(void) +{
- snd_hda_delete_codec_preset(&ca0132_list);
+}
+module_init(patch_ca0132_init) +module_exit(patch_ca0132_exit) diff --git a/sound/pci/hda/patch_ca0132/speakereq_x.h b/sound/pci/hda/patch_ca0132/speakereq_x.h new file mode 100644 index 0000000..9e40e3e --- /dev/null +++ b/sound/pci/hda/patch_ca0132/speakereq_x.h @@ -0,0 +1,272 @@ +/*----------------------------------------------------------------------------- +// Generated by Coff2DspImage V0.4. (built on Thu Oct 28 02:57:27 2010) +// ---- +// Input file: coef_re.o +// Output file: Speaker_EQ_X.cpp +// On: 2011/01/13 16:06:51 UTC +// ---- +// Copyright (c) 2011, Creative Technology Ltd. +//---------------------------------------------------------------------------*/
+const u32 Speaker_EQ_X[] = { +0x4c46584d, 0x0, 0x400, 0x3fbbe149, +0x80000000, 0xbef168a2, 0x80000000, 0x3e8c4d50, +0x0, 0xbeefa563, 0x80000000, 0x3efe9e2f, +0x0, 0xbf1a0d27, 0x80000000, 0x3f5631fc, +0x0, 0xbf302e68, 0x80000000, 0x3f45255b, +0x0, 0xbf2f639c, 0x80000000, 0x3f5837a5, +0x0, 0xbf39bb2e, 0x80000000, 0x3f18b10e, +0x0, 0xbf11d34f, 0x80000000, 0x3f0eed9e, +0x0, 0xbf1b5efe, 0x80000000, 0x3f208627, +0x0, 0xbf0df857, 0x80000000, 0x3edbcf02, +0x0, 0xbea4a063, 0x80000000, 0x3e8cab21, +0x0, 0xbe86eda9, 0x80000000, 0x3e8f8977, +0x0, 0xbe96fa87, 0x80000000, 0x3e9f831b, +0x0, 0xbea99e6c, 0x80000000, 0x3ecba859, +0x0, 0xbf03440a, 0x80000000, 0x3f286608, +0x0, 0xbf3c0f37, 0x80000000, 0x3f3897c1, +0x0, 0xbf28afae, 0x80000000, 0x3f223c7c, +0x0, 0xbf28a32c, 0x80000000, 0x3f3ecc47, +0x0, 0xbf59b830, 0x80000000, 0x3f738983, +0x0, 0xbf802847, 0x80000000, 0x3f815e28, +0x0, 0xbf7a4bbe, 0x80000000, 0x3f703961, +0x0, 0xbf643801, 0x80000000, 0x3f5cced0, +0x0, 0xbf56c14d, 0x80000000, 0x3f565ef9, +0x0, 0xbf56c5f4, 0x80000000, 0x3f5b1e44, +0x0, 0xbf5dbc24, 0x80000000, 0x3f619100, +0x0, 0xbf6150d1, 0x80000000, 0x3f60ecbc, +0x0, 0xbf5c6b05, 0x80000000, 0x3f58fc39, +0x0, 0xbf5370aa, 0x80000000, 0x3f512d14, +0x0, 0xbf4e978f, 0x80000000, 0x3f50579c, +0x0, 0xbf51f17f, 0x80000000, 0x3f573e48, +0x0, 0xbf5b21cd, 0x80000000, 0x3f612223, +0x0, 0xbf642835, 0x80000000, 0x3f681d5e, +0x0, 0xbf6885bc, 0x80000000, 0x3f69ecda, +0x0, 0xbf684fd6, 0x80000000, 0x3f687927, +0x0, 0xbf666057, 0x80000000, 0x3f669f0b, +0x0, 0xbf64e71c, 0x80000000, 0x3f65926a, +0x0, 0xbf642287, 0x80000000, 0x3f64d9df, +0x0, 0xbf633585, 0x80000000, 0x3f638252, +0x0, 0xbf614d73, 0x80000000, 0x3f60f78c, +0x0, 0xbf5e1e61, 0x80000000, 0x3f5d3336, +0x0, 0xbf59e464, 0x80000000, 0x3f58b51a, +0x0, 0xbf5564fa, 0x80000000, 0x3f5488aa, +0x0, 0xbf51ebbd, 0x80000000, 0x3f522b9c, +0x0, 0xbf5113f3, 0x80000000, 0x3f53388e, +0x0, 0xbf54549c, 0x80000000, 0x3f58e29a, +0x0, 0xbf5c7cd4, 0x80000000, 0x3f6378e5, +0x0, 0xbf6948ec, 0x80000000, 0x3f7216be, +0x0, 0xbf792709, 0x80000000, 0x3f8140b0, +0x0, 0xbf84ab0d, 0x80000000, 0x3f88ce45, +0x0, 0xbf8b478d, 0x80000000, 0x3f8e2359, +0x0, 0xbf8f15ad, 0x80000000, 0x3f9048db, +0x0, 0xbf8f9247, 0x80000000, 0x3f8f3afc, +0x0, 0xbf8d3320, 0x80000000, 0x3f8bd59a, +0x0, 0xbf891b04, 0x80000000, 0x3f875e82, +0x0, 0xbf849157, 0x80000000, 0x3f830265, +0x0, 0xbf809350, 0x80000000, 0x3f7f07d3, +0x0, 0xbf7b4900, 0x80000000, 0x3f7a51fd, +0x0, 0xbf77a651, 0x80000000, 0x3f77a35f, +0x0, 0xbf75b626, 0x80000000, 0x3f76424a, +0x0, 0xbf74a610, 0x80000000, 0x3f755948, +0x0, 0xbf73b40b, 0x80000000, 0x3f744784, +0x0, 0xbf72725c, 0x80000000, 0x3f72d3f1, +0x0, 0xbf70e4e0, 0x80000000, 0x3f713638, +0x0, 0xbf6f7216, 0x80000000, 0x3f6ff879, +0x0, 0xbf6eb679, 0x80000000, 0x3f6fc6ff, +0x0, 0xbf6f4ea9, 0x80000000, 0x3f7139dc, +0x0, 0xbf71adbd, 0x80000000, 0x3f74adab, +0x0, 0xbf760885, 0x80000000, 0x3f7a2950, +0x0, 0xbf7c4ce8, 0x80000000, 0x3f80aa62, +0x0, 0xbf820cad, 0x80000000, 0x3f84c644, +0x0, 0xbf865a25, 0x80000000, 0x3f89040e, +0x0, 0xbf8a89f0, 0x80000000, 0x3f8cf937, +0x0, 0xbf8e1272, 0x80000000, 0x3f902e0e, +0x0, 0xbf9092fc, 0x80000000, 0x3f922366, +0x0, 0xbf91dc2b, 0x80000000, 0x3f928e36, +0x0, 0xbf91c669, 0x80000000, 0x3f918c90, +0x0, 0xbf903642, 0x80000000, 0x3f8f6add, +0x0, 0xbf8d6677, 0x80000000, 0x3f8c575b, +0x0, 0xbf89dfd1, 0x80000000, 0x3f88906c, +0x0, 0xbf8605bc, 0x80000000, 0x3f849665, +0x0, 0xbf8210d7, 0x80000000, 0x3f80cf75, +0x0, 0xbf7ccb1f, 0x80000000, 0x3f7ab17c, +0x0, 0xbf76a732, 0x80000000, 0x3f74e29e, +0x0, 0xbf719ebf, 0x80000000, 0x3f70bd3c, +0x0, 0xbf6dd2a9, 0x80000000, 0x3f6df20a, +0x0, 0xbf6bc015, 0x80000000, 0x3f6c40a2, +0x0, 0xbf6b0f4a, 0x80000000, 0x3f6c0b52, +0x0, 0xbf6b3c0b, 0x80000000, 0x3f6d061f, +0x0, 0xbf6c7e92, 0x80000000, 0x3f6e9687, +0x0, 0xbf6e948e, 0x80000000, 0x3f70d031, +0x0, 0xbf70f4c1, 0x80000000, 0x3f736b54, +0x0, 0xbf739b96, 0x80000000, 0x3f760a68, +0x0, 0xbf7633fd, 0x80000000, 0x3f789f0b, +0x0, 0xbf789bb7, 0x80000000, 0x3f7acc6f, +0x0, 0xbf7abbe0, 0x80000000, 0x3f7caef9, +0x0, 0xbf7c427a, 0x80000000, 0x3f7e2100, +0x0, 0xbf7d7bc6, 0x80000000, 0x3f7ef0e4, +0x0, 0xbf7e2ec1, 0x80000000, 0x3f7f7f04, +0x0, 0xbf7e5cb4, 0x80000000, 0x3f7f871b, +0x0, 0xbf7e5482, 0x80000000, 0x3f7f3953, +0x0, 0xbf7ddc7c, 0x80000000, 0x3f7ebc47, +0x0, 0xbf7d3a64, 0x80000000, 0x3f7df5ab, +0x0, 0xbf7c6f74, 0x80000000, 0x3f7d1eb6, +0x0, 0xbf7b8247, 0x80000000, 0x3f7c2b7a, +0x0, 0xbf7a8d7b, 0x80000000, 0x3f7b2f43, +0x0, 0xbf798c3a, 0x80000000, 0x3f7a2e7a, +0x0, 0xbf788ac9, 0x80000000, 0x3f792def, +0x0, 0xbf778916, 0x80000000, 0x3f787c5b, +0x0, 0xbf776200, 0x80000000, 0x3f787f64, +0x0, 0xbf7760d4, 0x80000000, 0x3f787ffe, +0x0, 0xbf776078, 0x80000000, 0x3f78803b, +0x0, 0xbf77604c, 0x80000000, 0x3f78805c, +0x0, 0xbf776033, 0x80000000, 0x3f78806f, +0x0, 0xbf776023, 0x80000000, 0x3f78807c, +0x0, 0xbf776019, 0x80000000, 0x3f788085, +0x0, 0xbf776011, 0x80000000, 0x3f78808c, +0x0, 0xbf77600b, 0x80000000, 0x3f788091, +0x0, 0xbf776007, 0x80000000, 0x3f788095, +0x0, 0xbf776004, 0x80000000, 0x3f788097, +0x0, 0xbf776001, 0x80000000, 0x3f78809a, +0x0, 0xbf775fff, 0x80000000, 0x3f78809c, +0x0, 0xbf775ffd, 0x80000000, 0x3f78809d, +0x0, 0xbf775ffc, 0x80000000, 0x3f78809e, +0x0, 0xbf775ffb, 0x80000000, 0x3f78809f, +0x0, 0xbf775ffa, 0x80000000, 0x3f7880a0, +0x0, 0xbf775ff9, 0x80000000, 0x3f7880a0, +0x0, 0xbf775ff9, 0x80000000, 0x3f7880a1, +0x0, 0xbf775ff9, 0x80000000, 0x3f7880a1, +0x0, 0xbf775ff9, 0x80000000, 0x3fcb05b8, +0x80000000, 0xbeee4467, 0x80000000, 0x3e9932f9, +0x0, 0xbef0af71, 0x80000000, 0x3f1265c8, +0x0, 0xbee284be, 0x80000000, 0x3f198608, +0x0, 0xbf1a76c6, 0x80000000, 0x3f16b40c, +0x0, 0xbf0faae2, 0x80000000, 0x3f2cef0e, +0x0, 0xbf2d55b8, 0x80000000, 0x3f1ca946, +0x0, 0xbeeb4ea9, 0x80000000, 0x3ed11606, +0x0, 0xbeffebb9, 0x80000000, 0x3f0694f2, +0x0, 0xbeef1542, 0x80000000, 0x3ed02c5c, +0x0, 0xbebf66fa, 0x80000000, 0x3eb92770, +0x0, 0xbeaeead2, 0x80000000, 0x3ea08e82, +0x0, 0xbe936895, 0x80000000, 0x3e971575, +0x0, 0xbea9a969, 0x80000000, 0x3ecb418f, +0x0, 0xbeec6a8c, 0x80000000, 0x3f067b68, +0x0, 0xbf13ac79, 0x80000000, 0x3f22af6d, +0x0, 0xbf307174, 0x80000000, 0x3f3eea66, +0x0, 0xbf48805e, 0x80000000, 0x3f4fce7a, +0x0, 0xbf51e954, 0x80000000, 0x3f5411cd, +0x0, 0xbf53af02, 0x80000000, 0x3f552818, +0x0, 0xbf551cd4, 0x80000000, 0x3f5822c8, +0x0, 0xbf5af5dd, 0x80000000, 0x3f61b27c, +0x0, 0xbf67944c, 0x80000000, 0x3f6f0035, +0x0, 0xbf7210e6, 0x80000000, 0x3f739d04, +0x0, 0xbf6f84d2, 0x80000000, 0x3f6afa60, +0x0, 0xbf63773a, 0x80000000, 0x3f5ea1f7, +0x0, 0xbf595ca4, 0x80000000, 0x3f585d70, +0x0, 0xbf579672, 0x80000000, 0x3f5b1b71, +0x0, 0xbf5e5b2b, 0x80000000, 0x3f6517cf, +0x0, 0xbf6a69e6, 0x80000000, 0x3f71d855, +0x0, 0xbf764ffa, 0x80000000, 0x3f7b5e53, +0x0, 0xbf7c2bb3, 0x80000000, 0x3f7cc6b9, +0x0, 0xbf78ece7, 0x80000000, 0x3f7543e2, +0x0, 0xbf6dfa71, 0x80000000, 0x3f67fb41, +0x0, 0xbf5f799b, 0x80000000, 0x3f594ab7, +0x0, 0xbf516f56, 0x80000000, 0x3f4c8989, +0x0, 0xbf465eef, 0x80000000, 0x3f43673b, +0x0, 0xbf3f4611, 0x80000000, 0x3f3e5c37, +0x0, 0xbf3c3a5c, 0x80000000, 0x3f3d3d3e, +0x0, 0xbf3cedd9, 0x80000000, 0x3f3fabf5, +0x0, 0xbf410104, 0x80000000, 0x3f4552d6, +0x0, 0xbf482b39, 0x80000000, 0x3f4df2a4, +0x0, 0xbf5231c7, 0x80000000, 0x3f594b59, +0x0, 0xbf5eb903, 0x80000000, 0x3f66d9b8, +0x0, 0xbf6d148d, 0x80000000, 0x3f75b6dd, +0x0, 0xbf7c1753, 0x80000000, 0x3f823ef7, +0x0, 0xbf851d75, 0x80000000, 0x3f88ccb7, +0x0, 0xbf8af8b9, 0x80000000, 0x3f8dd423, +0x0, 0xbf8f194d, 0x80000000, 0x3f910a9a, +0x0, 0xbf91716a, 0x80000000, 0x3f92a03d, +0x0, 0xbf9268c2, 0x80000000, 0x3f9324d5, +0x0, 0xbf92a5a3, 0x80000000, 0x3f934371, +0x0, 0xbf92c65e, 0x80000000, 0x3f937f11, +0x0, 0xbf93280f, 0x80000000, 0x3f940915, +0x0, 0xbf93cf3d, 0x80000000, 0x3f94bc82, +0x0, 0xbf94749e, 0x80000000, 0x3f953979, +0x0, 0xbf94aca4, 0x80000000, 0x3f951632, +0x0, 0xbf941d55, 0x80000000, 0x3f94134e, +0x0, 0xbf92ab6b, 0x80000000, 0x3f923c83, +0x0, 0xbf908a86, 0x80000000, 0x3f8fe7c0, +0x0, 0xbf8e2c0c, 0x80000000, 0x3f8d9738, +0x0, 0xbf8c1699, 0x80000000, 0x3f8bcce1, +0x0, 0xbf8abc92, 0x80000000, 0x3f8ae855, +0x0, 0xbf8a5fe1, 0x80000000, 0x3f8b1165, +0x0, 0xbf8b06a9, 0x80000000, 0x3f8c3332, +0x0, 0xbf8c7dbb, 0x80000000, 0x3f8dff3a, +0x0, 0xbf8e6640, 0x80000000, 0x3f8ffd1e, +0x0, 0xbf90489f, 0x80000000, 0x3f91a29d, +0x0, 0xbf91a5bf, 0x80000000, 0x3f927453, +0x0, 0xbf920863, 0x80000000, 0x3f92247f, +0x0, 0xbf911e85, 0x80000000, 0x3f9098a5, +0x0, 0xbf8ed782, 0x80000000, 0x3f8dda10, +0x0, 0xbf8b6c05, 0x80000000, 0x3f8a0fa7, +0x0, 0xbf873d17, 0x80000000, 0x3f858ea4, +0x0, 0xbf82a361, 0x80000000, 0x3f80d106, +0x0, 0xbf7bd6bb, 0x80000000, 0x3f787da4, +0x0, 0xbf72e277, 0x80000000, 0x3f701bf8, +0x0, 0xbf6b220b, 0x80000000, 0x3f68d09d, +0x0, 0xbf64dbb2, 0x80000000, 0x3f631cc7, +0x0, 0xbf5ff96f, 0x80000000, 0x3f5f4a07, +0x0, 0xbf5ca224, 0x80000000, 0x3f5d12fb, +0x0, 0xbf5b2cfc, 0x80000000, 0x3f5c32e4, +0x0, 0xbf5b6b94, 0x80000000, 0x3f5ce3a3, +0x0, 0xbf5cd5a4, 0x80000000, 0x3f5f2996, +0x0, 0xbf5f6437, 0x80000000, 0x3f6270f9, +0x0, 0xbf633409, 0x80000000, 0x3f6676fd, +0x0, 0xbf67c675, 0x80000000, 0x3f6b4ed4, +0x0, 0xbf6cbdb0, 0x80000000, 0x3f708c31, +0x0, 0xbf72136b, 0x80000000, 0x3f75dd69, +0x0, 0xbf7762ea, 0x80000000, 0x3f7b2a9a, +0x0, 0xbf7c7f7f, 0x80000000, 0x3f8003a3, +0x0, 0xbf80a4ff, 0x80000000, 0x3f823dd6, +0x0, 0xbf82a7d1, 0x80000000, 0x3f843389, +0x0, 0xbf846917, 0x80000000, 0x3f85aef2, +0x0, 0xbf85d56f, 0x80000000, 0x3f86e9b0, +0x0, 0xbf86c542, 0x80000000, 0x3f87c8cd, +0x0, 0xbf877eba, 0x80000000, 0x3f883bdb, +0x0, 0xbf87de4f, 0x80000000, 0x3f8885fe, +0x0, 0xbf87efda, 0x80000000, 0x3f88813c, +0x0, 0xbf87e277, 0x80000000, 0x3f884eb1, +0x0, 0xbf879952, 0x80000000, 0x3f880311, +0x0, 0xbf873b65, 0x80000000, 0x3f879327, +0x0, 0xbf86c950, 0x80000000, 0x3f871ba9, +0x0, 0xbf8647a6, 0x80000000, 0x3f86973e, +0x0, 0xbf85c29b, 0x80000000, 0x3f860f3e, +0x0, 0xbf853879, 0x80000000, 0x3f858568, +0x0, 0xbf84ae87, 0x80000000, 0x3f84fc48, +0x0, 0xbf8424d4, 0x80000000, 0x3f849d66, +0x0, 0xbf840fef, 0x80000000, 0x3f849f07, +0x0, 0xbf840f4e, 0x80000000, 0x3f849f5b, +0x0, 0xbf840f1a, 0x80000000, 0x3f849f7e, +0x0, 0xbf840f01, 0x80000000, 0x3f849f90, +0x0, 0xbf840ef3, 0x80000000, 0x3f849f9c, +0x0, 0xbf840ee9, 0x80000000, 0x3f849fa5, +0x0, 0xbf840ee2, 0x80000000, 0x3f849fab, +0x0, 0xbf840edc, 0x80000000, 0x3f849fb0, +0x0, 0xbf840ed8, 0x80000000, 0x3f849fb3, +0x0, 0xbf840ed5, 0x80000000, 0x3f849fb6, +0x0, 0xbf840ed2, 0x80000000, 0x3f849fb9, +0x0, 0xbf840ed0, 0x80000000, 0x3f849fbb, +0x0, 0xbf840ece, 0x80000000, 0x3f849fbd, +0x0, 0xbf840ecc, 0x80000000, 0x3f849fbe, +0x0, 0xbf840ecb, 0x80000000, 0x3f849fbf, +0x0, 0xbf840eca, 0x80000000, 0x3f849fc0, +0x0, 0xbf840ec9, 0x80000000, 0x3f849fc1, +0x0, 0xbf840ec8, 0x80000000, 0x3f849fc2, +0x0, 0xbf840ec8, 0x80000000, 0x3f849fc2, +0x0, 0xbf840ec8, 0x80000000, 0x3f849fc2, +0x0, 0xbf840ec7, 0x80000000, 0x4c46584d, +0xefbeadde, 0x0, +}; +/*------ END OF FILE ------*/ diff --git a/sound/pci/hda/patch_ca0132/speakereq_y.h b/sound/pci/hda/patch_ca0132/speakereq_y.h new file mode 100644 index 0000000..5c2152d --- /dev/null +++ b/sound/pci/hda/patch_ca0132/speakereq_y.h @@ -0,0 +1,272 @@ +/*----------------------------------------------------------------------------- +// Generated by Coff2DspImage V0.4. (built on Thu Oct 28 02:57:27 2010) +// ---- +// Input file: coef_im.o +// Output file: Speaker_EQ_Y.cpp +// On: 2011/01/13 16:07:24 UTC +// ---- +// Copyright (c) 2011, Creative Technology Ltd. +//---------------------------------------------------------------------------*/
+const u32 Speaker_EQ_Y[] = { +0x4c46584d, 0x40000, 0x400, 0x3f7880a1, +0xbf8f6831, 0x80000000, 0x3e23112a, 0x0, +0xbee39f86, 0x80000000, 0x3eea1573, 0x0, +0xbf0aa258, 0x80000000, 0x3f3ad61e, 0x0, +0xbf4bc821, 0x80000000, 0x3f308d3f, 0x0, +0xbf431da8, 0x80000000, 0x3f36f372, 0x0, +0xbf5e497e, 0x80000000, 0x3f18cb4d, 0x0, +0xbf1e6872, 0x80000000, 0x3f0645df, 0x0, +0xbf1b97a9, 0x80000000, 0x3f19c10a, 0x0, +0xbf2047ba, 0x80000000, 0x3ef1754c, 0x0, +0xbec791b4, 0x80000000, 0x3e8b3d8b, 0x0, +0xbe91510f, 0x80000000, 0x3e816bb0, 0x0, +0xbe9c066b, 0x80000000, 0x3e9340f7, 0x0, +0xbeaac3d6, 0x80000000, 0x3eafce70, 0x0, +0xbeece184, 0x80000000, 0x3f12e9a5, 0x0, +0xbf38b044, 0x80000000, 0x3f39c7c5, 0x0, +0xbf33aced, 0x80000000, 0x3f20ddb4, 0x0, +0xbf265839, 0x80000000, 0x3f2f8f4f, 0x0, +0xbf4eaf17, 0x80000000, 0x3f650a29, 0x0, +0xbf7e1137, 0x80000000, 0x3f803d7f, 0x0, +0xbf80d55a, 0x80000000, 0x3f732104, 0x0, +0xbf6c460f, 0x80000000, 0x3f5deb83, 0x0, +0xbf5b76bc, 0x80000000, 0x3f540f11, 0x0, +0xbf584dc1, 0x80000000, 0x3f56d0db, 0x0, +0xbf5e67e9, 0x80000000, 0x3f5df17b, 0x0, +0xbf639414, 0x80000000, 0x3f5f95ef, 0x0, +0xbf60a5e1, 0x80000000, 0x3f5907a7, 0x0, +0xbf57d63c, 0x80000000, 0x3f507214, 0x0, +0xbf5141dc, 0x80000000, 0x3f4d97d2, 0x0, +0xbf527c2a, 0x80000000, 0x3f52e79e, 0x0, +0xbf5aa813, 0x80000000, 0x3f5cb50d, 0x0, +0xbf643ce2, 0x80000000, 0x3f64e061, 0x0, +0xbf69e39a, 0x80000000, 0x3f67f90b, 0x0, +0xbf6a8d44, 0x80000000, 0x3f67165f, 0x0, +0xbf68b9f5, 0x80000000, 0x3f652f13, 0x0, +0xbf670004, 0x80000000, 0x3f63f903, 0x0, +0xbf66137b, 0x80000000, 0x3f634ce0, 0x0, +0xbf653e5f, 0x80000000, 0x3f623a2d, 0x0, +0xbf639898, 0x80000000, 0x3f600b28, 0x0, +0xbf60b1d8, 0x80000000, 0x3f5c975a, 0x0, +0xbf5ca505, 0x80000000, 0x3f583c70, 0x0, +0xbf58148e, 0x80000000, 0x3f53e31b, 0x0, +0xbf542d3d, 0x80000000, 0x3f50f232, 0x0, +0xbf527ea1, 0x80000000, 0x3f510906, 0x0, +0xbf5495bc, 0x80000000, 0x3f5580a4, 0x0, +0xbf5b7799, 0x80000000, 0x3f5eeb19, 0x0, +0xbf672bd7, 0x80000000, 0x3f6cb5f8, 0x0, +0xbf76783c, 0x80000000, 0x3f7cf872, 0x0, +0xbf836c9b, 0x80000000, 0x3f865f70, 0x0, +0xbf8a8aa4, 0x80000000, 0x3f8c64b2, 0x0, +0xbf8f1f95, 0x80000000, 0x3f8f637a, 0x0, +0xbf906bda, 0x80000000, 0x3f8f1804, 0x0, +0xbf8eaa11, 0x80000000, 0x3f8c2e5f, 0x0, +0xbf8addfa, 0x80000000, 0x3f87df49, 0x0, +0xbf86520c, 0x80000000, 0x3f8367f7, 0x0, +0xbf821d36, 0x80000000, 0x3f7f527d, 0x0, +0xbf7dc58f, 0x80000000, 0x3f7a0ea9, 0x0, +0xbf7997c7, 0x80000000, 0x3f76f01a, 0x0, +0xbf774a84, 0x80000000, 0x3f755256, 0x0, +0xbf761531, 0x80000000, 0x3f745e3a, 0x0, +0xbf752a22, 0x80000000, 0x3f73602c, 0x0, +0xbf7400ab, 0x80000000, 0x3f7204c5, 0x0, +0xbf727d23, 0x80000000, 0x3f706c59, 0x0, +0xbf70ed99, 0x80000000, 0x3f6f1358, 0x0, +0xbf6fe456, 0x80000000, 0x3f6ea1ff, 0x0, +0xbf7006a4, 0x80000000, 0x3f6fb2c6, 0x0, +0xbf71de58, 0x80000000, 0x3f72a89e, 0x0, +0xbf75bc1c, 0x80000000, 0x3f7799b0, 0x0, +0xbf7ba127, 0x80000000, 0x3f7e4e21, 0x0, +0xbf819693, 0x80000000, 0x3f832684, 0x0, +0xbf85d0b3, 0x80000000, 0x3f8772c6, 0x0, +0xbf8a03f8, 0x80000000, 0x3f8b933b, 0x0, +0xbf8dbdbc, 0x80000000, 0x3f8ef83e, 0x0, +0xbf90a107, 0x80000000, 0x3f912756, 0x0, +0xbf925347, 0x80000000, 0x3f91f431, 0x0, +0xbf928097, 0x80000000, 0x3f917193, 0x0, +0xbf912274, 0x80000000, 0x3f8fab50, 0x0, +0xbf8e995b, 0x80000000, 0x3f8cb8fe, 0x0, +0xbf8b4fcf, 0x80000000, 0x3f890686, 0x0, +0xbf87800d, 0x80000000, 0x3f851c71, 0x0, +0xbf83807b, 0x80000000, 0x3f813e07, 0x0, +0xbf7f9422, 0x80000000, 0x3f7b47a9, 0x0, +0xbf790f10, 0x80000000, 0x3f7559b5, 0x0, +0xbf7384f8, 0x80000000, 0x3f70dd38, 0x0, +0xbf6f8543, 0x80000000, 0x3f6d7fa5, 0x0, +0xbf6d3355, 0x80000000, 0x3f6b8ebe, 0x0, +0xbf6bf9b4, 0x80000000, 0x3f6b38f0, 0x0, +0xbf6bde8b, 0x80000000, 0x3f6bd34c, 0x0, +0xbf6d0ca4, 0x80000000, 0x3f6d2f55, 0x0, +0xbf6ee485, 0x80000000, 0x3f6f6387, 0x0, +0xbf712799, 0x80000000, 0x3f71e785, 0x0, +0xbf73cb82, 0x80000000, 0x3f748d3c, 0x0, +0xbf76640d, 0x80000000, 0x3f77279b, 0x0, +0xbf78e726, 0x80000000, 0x3f796f48, 0x0, +0xbf7b09c2, 0x80000000, 0x3f7b7e17, 0x0, +0xbf7cb603, 0x80000000, 0x3f7cf67b, 0x0, +0xbf7e1629, 0x80000000, 0x3f7df91b, 0x0, +0xbf7ecc00, 0x80000000, 0x3f7ea63b, 0x0, +0xbf7f27fe, 0x80000000, 0x3f7eb8d3, 0x0, +0xbf7f2bbc, 0x80000000, 0x3f7e936a, 0x0, +0xbf7ebe6d, 0x80000000, 0x3f7e1bce, 0x0, +0xbf7e314c, 0x80000000, 0x3f7d651f, 0x0, +0xbf7d6480, 0x80000000, 0x3f7c9915, 0x0, +0xbf7c7f78, 0x80000000, 0x3f7ba8d0, 0x0, +0xbf7b8a32, 0x80000000, 0x3f7ab2b1, 0x0, +0xbf7a888a, 0x80000000, 0x3f79b396, 0x0, +0xbf79853e, 0x80000000, 0x3f78b53f, 0x0, +0xbf787f86, 0x80000000, 0x3f77cdd0, 0x0, +0xbf781632, 0x80000000, 0x3f77cb33, 0x0, +0xbf781469, 0x80000000, 0x3f77cd2f, 0x0, +0xbf78126e, 0x80000000, 0x3f77cf24, 0x0, +0xbf78107f, 0x80000000, 0x3f77d10f, 0x0, +0xbf780e99, 0x80000000, 0x3f77d2f2, 0x0, +0xbf780cb8, 0x80000000, 0x3f77d4d0, 0x0, +0xbf780adc, 0x80000000, 0x3f77d6ab, 0x0, +0xbf780903, 0x80000000, 0x3f77d882, 0x0, +0xbf78072d, 0x80000000, 0x3f77da56, 0x0, +0xbf78055a, 0x80000000, 0x3f77dc29, 0x0, +0xbf780389, 0x80000000, 0x3f77ddf9, 0x0, +0xbf7801b9, 0x80000000, 0x3f77dfc8, 0x0, +0xbf77ffeb, 0x80000000, 0x3f77e195, 0x0, +0xbf77fe1f, 0x80000000, 0x3f77e360, 0x0, +0xbf77fc54, 0x80000000, 0x3f77e52b, 0x0, +0xbf77fa8a, 0x80000000, 0x3f77e6f4, 0x0, +0xbf77f8c1, 0x80000000, 0x3f77e8bd, 0x0, +0xbf77f6f8, 0x80000000, 0x3f77ea85, 0x0, +0xbf77f531, 0x80000000, 0x3f77ec4d, 0x0, +0xbf77f369, 0x80000000, 0x3f77ee14, 0x0, +0xbf77f1a2, 0x80000000, 0x3f77efdb, 0x3f849fc2, +0xbf9849f7, 0x80000000, 0x3e170833, 0x0, +0xbeefd7c0, 0x80000000, 0x3efa10af, 0x0, +0xbf0dacc1, 0x80000000, 0x3ee69f0f, 0x0, +0xbf2cdda2, 0x80000000, 0x3f0c5634, 0x0, +0xbf1b925b, 0x80000000, 0x3f1256f6, 0x0, +0xbf3bcab5, 0x80000000, 0x3f1d71e0, 0x0, +0xbf136e78, 0x80000000, 0x3ec05881, 0x0, +0xbef584d1, 0x80000000, 0x3f00491b, 0x0, +0xbf0697d3, 0x80000000, 0x3ed25faa, 0x0, +0xbed0db4d, 0x80000000, 0x3eb1a6c7, 0x0, +0xbebe896f, 0x80000000, 0x3e9f01b6, 0x0, +0xbea164c7, 0x80000000, 0x3e8aca7b, 0x0, +0xbea635a9, 0x80000000, 0x3eb1fd43, 0x0, +0xbee34cc2, 0x80000000, 0x3ef64ed8, 0x0, +0xbf107cb1, 0x80000000, 0x3f17e0d3, 0x0, +0xbf2cab9a, 0x80000000, 0x3f34f26d, 0x0, +0xbf471972, 0x80000000, 0x3f49d928, 0x0, +0xbf53e77d, 0x80000000, 0x3f507d52, 0x0, +0xbf567925, 0x80000000, 0x3f51e982, 0x0, +0xbf5776bd, 0x80000000, 0x3f541525, 0x0, +0xbf5b979d, 0x80000000, 0x3f5be0d9, 0x0, +0xbf66c290, 0x80000000, 0x3f695853, 0x0, +0xbf72ffc2, 0x80000000, 0x3f714acc, 0x0, +0xbf73f22f, 0x80000000, 0x3f6b882a, 0x0, +0xbf691f83, 0x80000000, 0x3f5f0bf7, 0x0, +0xbf5d8e6e, 0x80000000, 0x3f56cdba, 0x0, +0xbf596c53, 0x80000000, 0x3f576483, 0x0, +0xbf5e3149, 0x80000000, 0x3f5ff56d, 0x0, +0xbf694f5c, 0x80000000, 0x3f6c9c66, 0x0, +0xbf75c5ac, 0x80000000, 0x3f778fe7, 0x0, +0xbf7d8a7d, 0x80000000, 0x3f7b4fea, 0x0, +0xbf7c8e59, 0x80000000, 0x3f75e7cd, 0x0, +0xbf7326a0, 0x80000000, 0x3f69b20f, 0x0, +0xbf6512ef, 0x80000000, 0x3f5b06b5, 0x0, +0xbf5692a7, 0x80000000, 0x3f4d9b51, 0x0, +0xbf4a9554, 0x80000000, 0x3f4386fe, 0x0, +0xbf426bc1, 0x80000000, 0x3f3d7fda, 0x0, +0xbf3e58f4, 0x80000000, 0x3f3b76b9, 0x0, +0xbf3e1d58, 0x80000000, 0x3f3d1393, 0x0, +0xbf415820, 0x80000000, 0x3f41fb0c, 0x0, +0xbf47ba4a, 0x80000000, 0x3f49e9e5, 0x0, +0xbf51076c, 0x80000000, 0x3f54a4f3, 0x0, +0xbf5cf484, 0x80000000, 0x3f61bce1, 0x0, +0xbf6aeabe, 0x80000000, 0x3f706adf, 0x0, +0xbf79dfca, 0x80000000, 0x3f7f6325, 0x0, +0xbf842dbd, 0x80000000, 0x3f868abf, 0x0, +0xbf8a6442, 0x80000000, 0x3f8c0270, 0x0, +0xbf8ef69f, 0x80000000, 0x3f8fb073, 0x0, +0xbf91b868, 0x80000000, 0x3f91a610, 0x0, +0xbf92f709, 0x80000000, 0x3f926138, 0x0, +0xbf934fc0, 0x80000000, 0x3f928cda, 0x0, +0xbf93694a, 0x80000000, 0x3f92bb30, 0x0, +0xbf93b4c9, 0x80000000, 0x3f9333de, 0x0, +0xbf944d12, 0x80000000, 0x3f93e5eb, 0x0, +0xbf94fb01, 0x80000000, 0x3f947c4b, 0x0, +0xbf95573c, 0x80000000, 0x3f948a85, 0x0, +0xbf94fe52, 0x80000000, 0x3f93c2a7, 0x0, +0xbf93c210, 0x80000000, 0x3f921cd4, 0x0, +0xbf91c22d, 0x80000000, 0x3f8fdf01, 0x0, +0xbf8f62f4, 0x80000000, 0x3f8d8504, 0x0, +0xbf8d29a3, 0x80000000, 0x3f8b94ec, 0x0, +0xbf8b90d3, 0x80000000, 0x3f8a78e5, 0x0, +0xbf8ae9ce, 0x80000000, 0x3f8a657a, 0x0, +0xbf8b4cb1, 0x80000000, 0x3f8b516b, 0x0, +0xbf8c97b9, 0x80000000, 0x3f8cf87b, 0x0, +0xbf8e7651, 0x80000000, 0x3f8eecb7, 0x0, +0xbf906fb4, 0x80000000, 0x3f90af10, 0x0, +0xbf91f90e, 0x80000000, 0x3f91c8ec, 0x0, +0xbf929161, 0x80000000, 0x3f91ddcc, 0x0, +0xbf91e788, 0x80000000, 0x3f90b1ae, 0x0, +0xbf8ff10e, 0x80000000, 0x3f8e3384, 0x0, +0xbf8cdabb, 0x80000000, 0x3f8a8f03, 0x0, +0xbf88e420, 0x80000000, 0x3f862cd2, 0x0, +0xbf845586, 0x80000000, 0x3f81818d, 0x0, +0xbf7f23b8, 0x80000000, 0x3f79bc98, 0x0, +0xbf761436, 0x80000000, 0x3f7101b5, 0x0, +0xbf6e1043, 0x80000000, 0x3f697015, 0x0, +0xbf673eec, 0x80000000, 0x3f638972, 0x0, +0xbf61d331, 0x80000000, 0x3f5f47bc, 0x0, +0xbf5e387c, 0x80000000, 0x3f5c7056, 0x0, +0xbf5c7fcc, 0x80000000, 0x3f5b2f5d, 0x0, +0xbf5c32f4, 0x80000000, 0x3f5bbc24, 0x0, +0xbf5d2302, 0x80000000, 0x3f5dacd2, 0x0, +0xbf5f8bd1, 0x80000000, 0x3f608aa7, 0x0, +0xbf632be9, 0x80000000, 0x3f64703b, 0x0, +0xbf6771ae, 0x80000000, 0x3f693726, 0x0, +0xbf6c50a3, 0x80000000, 0x3f6e5492, 0x0, +0xbf719f32, 0x80000000, 0x3f73aabb, 0x0, +0xbf76ec72, 0x80000000, 0x3f78fd88, 0x0, +0xbf7c26f1, 0x80000000, 0x3f7df6d8, 0x0, +0xbf807bb9, 0x80000000, 0x3f815331, 0x0, +0xbf829420, 0x80000000, 0x3f834ed1, 0x0, +0xbf847751, 0x80000000, 0x3f84e85a, 0x0, +0xbf85e6b5, 0x80000000, 0x3f864657, 0x0, +0xbf86f5e8, 0x80000000, 0x3f8729b5, 0x0, +0xbf87c9a5, 0x80000000, 0x3f87be49, 0x0, +0xbf882b8a, 0x80000000, 0x3f881a64, 0x0, +0xbf885856, 0x80000000, 0x3f881bae, 0x0, +0xbf885154, 0x80000000, 0x3f87fea2, 0x0, +0xbf880e01, 0x80000000, 0x3f87b5a5, 0x0, +0xbf87ba6e, 0x80000000, 0x3f874d99, 0x0, +0xbf874768, 0x80000000, 0x3f86db29, 0x0, +0xbf86c960, 0x80000000, 0x3f865830, 0x0, +0xbf8643ee, 0x80000000, 0x3f85d2d9, 0x0, +0xbf85b97a, 0x80000000, 0x3f8549d5, 0x0, +0xbf852e6f, 0x80000000, 0x3f84c1af, 0x0, +0xbf84a2a5, 0x80000000, 0x3f8445f7, 0x0, +0xbf846a6c, 0x80000000, 0x3f844483, 0x0, +0xbf846987, 0x80000000, 0x3f844584, 0x0, +0xbf846886, 0x80000000, 0x3f844682, 0x0, +0xbf84678b, 0x80000000, 0x3f84477a, 0x0, +0xbf846695, 0x80000000, 0x3f84486e, 0x0, +0xbf8465a2, 0x80000000, 0x3f844960, 0x0, +0xbf8464b2, 0x80000000, 0x3f844a50, 0x0, +0xbf8463c3, 0x80000000, 0x3f844b3e, 0x0, +0xbf8462d5, 0x80000000, 0x3f844c2b, 0x0, +0xbf8461e9, 0x80000000, 0x3f844d16, 0x0, +0xbf8460fe, 0x80000000, 0x3f844e01, 0x0, +0xbf846014, 0x80000000, 0x3f844eeb, 0x0, +0xbf845f2a, 0x80000000, 0x3f844fd4, 0x0, +0xbf845e42, 0x80000000, 0x3f8450bc, 0x0, +0xbf845d5a, 0x80000000, 0x3f8451a4, 0x0, +0xbf845c72, 0x80000000, 0x3f84528b, 0x0, +0xbf845b8b, 0x80000000, 0x3f845372, 0x0, +0xbf845aa4, 0x80000000, 0x3f845459, 0x0, +0xbf8459be, 0x80000000, 0x3f84553f, 0x0, +0xbf8458d8, 0x80000000, 0x3f845625, 0x0, +0xbf8457f1, 0x80000000, 0x3f84570b, 0x4c46584d, +0xefbeadde, 0x0, +};
+/*------ END OF FILE ------*/
1.7.4.1
participants (2)
-
Ian Minett
-
Takashi Iwai