[PATCH] ASoC: fsl_ssi: Fix bclk calculation for mono channel
For mono channel, ssi will switch to normal mode. In normal mode, the Word Length Control bits control the word length divider in clock generator, which is different with I2S master mode, the word length is fixed to 32bit.
So we refine the famula for mono channel, otherwise there will be sound issue for S24_LE.
Fixes: b0a7043d5c2c ("ASoC: fsl_ssi: Caculate bit clock rate using slot number and width") Signed-off-by: Shengjiu Wang shengjiu.wang@nxp.com --- sound/soc/fsl/fsl_ssi.c | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c index bad89b0d129e..e347776590f7 100644 --- a/sound/soc/fsl/fsl_ssi.c +++ b/sound/soc/fsl/fsl_ssi.c @@ -695,6 +695,11 @@ static int fsl_ssi_set_bclk(struct snd_pcm_substream *substream, /* Generate bit clock based on the slot number and slot width */ freq = slots * slot_width * params_rate(hw_params);
+ /* The slot_width is not fixed to 32 for normal mode */ + if (params_channels(hw_params) == 1) + freq = (slots <= 1 ? 2 : slots) * params_width(hw_params) * + params_rate(hw_params); + /* Don't apply it to any non-baudclk circumstance */ if (IS_ERR(ssi->baudclk)) return -EINVAL;
On Tue, Jun 09, 2020 at 04:19:28PM +0800, Shengjiu Wang wrote:
For mono channel, ssi will switch to normal mode. In normal mode, the Word Length Control bits control the word length divider in clock generator, which is different with I2S master mode, the word length is fixed to 32bit.
So we refine the famula for mono channel, otherwise there will be sound issue for S24_LE.
Fixes: b0a7043d5c2c ("ASoC: fsl_ssi: Caculate bit clock rate using slot number and width") Signed-off-by: Shengjiu Wang shengjiu.wang@nxp.com
sound/soc/fsl/fsl_ssi.c | 5 +++++ 1 file changed, 5 insertions(+)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c index bad89b0d129e..e347776590f7 100644 --- a/sound/soc/fsl/fsl_ssi.c +++ b/sound/soc/fsl/fsl_ssi.c @@ -695,6 +695,11 @@ static int fsl_ssi_set_bclk(struct snd_pcm_substream *substream, /* Generate bit clock based on the slot number and slot width */ freq = slots * slot_width * params_rate(hw_params);
- /* The slot_width is not fixed to 32 for normal mode */
- if (params_channels(hw_params) == 1)
This function has a local variable that you can reuse here: unsigned int slots = params_channels(hw_params);
freq = (slots <= 1 ? 2 : slots) * params_width(hw_params) *params_rate(hw_params);
We have a small section of slots and slot_width calculation at the top of this function where we can squash these in.
participants (2)
-
Nicolin Chen -
Shengjiu Wang