The patch

ASoC: Intel: Skylake: Fix the NHLT rate size

has been applied to the asoc tree at

git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git

All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying to this mail.

Thanks, Mark

From 9f2dd0270d81b283e11e39f9276113aef391e420 Mon Sep 17 00:00:00 2001

From: Jeeja KP jeeja.kp@intel.com Date: Sat, 1 Aug 2015 19:40:39 +0530 Subject: [PATCH] ASoC: Intel: Skylake: Fix the NHLT rate size

Sampling rate type needs to be u32 instead of u8, nhlt wav format description expected u32 for rate, passing u8 will fetch NULL config in skl_get_ep_blob().

Signed-off-by: Jeeja KP jeeja.kp@intel.com Signed-off-by: Vinod Koul vinod.koul@intel.com Signed-off-by: Mark Brown broonie@kernel.org --- sound/soc/intel/skylake/skl-nhlt.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/sound/soc/intel/skylake/skl-nhlt.c b/sound/soc/intel/skylake/skl-nhlt.c index 5c0895e..a14009b 100644 --- a/sound/soc/intel/skylake/skl-nhlt.c +++ b/sound/soc/intel/skylake/skl-nhlt.c @@ -56,7 +56,7 @@ void skl_nhlt_free(void __iomem *addr)

static struct nhlt_specific_cfg *skl_get_specific_cfg( struct device *dev, struct nhlt_fmt *fmt, - u8 no_ch, u8 rate, u16 bps) + u8 no_ch, u32 rate, u16 bps) { struct nhlt_specific_cfg *sp_config; struct wav_fmt *wfmt;

The patch

ASoC: Intel: Skylake: Use acpi header for NHLT header

has been applied to the asoc tree at

git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git

All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying to this mail.

Thanks, Mark

From aba3dd5ace59d038a9d69e0f5319b6fec61012c8 Mon Sep 17 00:00:00 2001

From: Jeeja KP jeeja.kp@intel.com Date: Sat, 1 Aug 2015 19:40:40 +0530 Subject: [PATCH] ASoC: Intel: Skylake: Use acpi header for NHLT header

Instead of defining own acpi header, use the available acpi header defined in acpi framework.

Signed-off-by: Jeeja KP jeeja.kp@intel.com Signed-off-by: Vinod Koul vinod.koul@intel.com Signed-off-by: Mark Brown broonie@kernel.org --- sound/soc/intel/skylake/skl-nhlt.c | 1 - sound/soc/intel/skylake/skl-nhlt.h | 14 ++------------ 2 files changed, 2 insertions(+), 13 deletions(-)

diff --git a/sound/soc/intel/skylake/skl-nhlt.c b/sound/soc/intel/skylake/skl-nhlt.c index a14009b..13036b1 100644 --- a/sound/soc/intel/skylake/skl-nhlt.c +++ b/sound/soc/intel/skylake/skl-nhlt.c @@ -17,7 +17,6 @@ * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ * */ -#include <linux/acpi.h> #include "skl.h"

/* Unique identification for getting NHLT blobs */ diff --git a/sound/soc/intel/skylake/skl-nhlt.h b/sound/soc/intel/skylake/skl-nhlt.h index b0e2e4d..3769f9f 100644 --- a/sound/soc/intel/skylake/skl-nhlt.h +++ b/sound/soc/intel/skylake/skl-nhlt.h @@ -20,17 +20,7 @@ #ifndef __SKL_NHLT_H__ #define __SKL_NHLT_H__

-struct acpi_desc_header { - u32 signature; - u32 length; - u8 revision; - u8 checksum; - u8 oem_id[6]; - u64 oem_table_id; - u32 oem_revision; - u32 creator_id; - u32 creator_revision; -} __packed; +#include <linux/acpi.h>

struct wav_fmt { u16 fmt_tag; @@ -98,7 +88,7 @@ struct nhlt_endpoint { } __packed;

struct nhlt_acpi_table { - struct acpi_desc_header header; + struct acpi_table_header header; u8 endpoint_count; struct nhlt_endpoint desc[0]; } __packed;

The patch

ASoC: Intel: Skylake: Add helpers for DSP module configuration

has been applied to the asoc tree at

git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git

All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying to this mail.

Thanks, Mark

From 23db472bba549dcd1c7592b5af95cc9ba4b9b5c9 Mon Sep 17 00:00:00 2001

From: Jeeja KP jeeja.kp@intel.com Date: Sat, 1 Aug 2015 19:40:41 +0530 Subject: [PATCH] ASoC: Intel: Skylake: Add helpers for DSP module configuration

This adds helper functions to calculate parameters required for base module format and copier module. A generic module is modelled by base module. Copier module is responsible for getting/sending data to FE (host DMAs) and BE (link HDA DMA, SSP, PDM) This also ads module pin management helpers which help in finding pins to use or freeing them up

Signed-off-by: Jeeja KP jeeja.kp@intel.com Signed-off-by: Vinod Koul vinod.koul@intel.com Signed-off-by: Mark Brown broonie@kernel.org --- sound/soc/intel/skylake/skl-messages.c | 386 +++++++++++++++++++++++++++ sound/soc/intel/skylake/skl-topology.h | 251 +++++++++++++++++ sound/soc/intel/skylake/skl-tplg-interface.h | 88 ++++++ 3 files changed, 725 insertions(+) create mode 100644 sound/soc/intel/skylake/skl-topology.h create mode 100644 sound/soc/intel/skylake/skl-tplg-interface.h

diff --git a/sound/soc/intel/skylake/skl-messages.c b/sound/soc/intel/skylake/skl-messages.c index 7c07b76..0ba13f1 100644 --- a/sound/soc/intel/skylake/skl-messages.c +++ b/sound/soc/intel/skylake/skl-messages.c @@ -26,6 +26,8 @@ #include "skl.h" #include "../common/sst-dsp.h" #include "../common/sst-dsp-priv.h" +#include "skl-topology.h" +#include "skl-tplg-interface.h"

static int skl_alloc_dma_buf(struct device *dev, struct snd_dma_buffer *dmab, size_t size) @@ -131,3 +133,387 @@ int skl_resume_dsp(struct skl *skl)

return skl_dsp_wake(ctx->dsp); } + +enum skl_bitdepth skl_get_bit_depth(int params) +{ + switch (params) { + case 8: + return SKL_DEPTH_8BIT; + + case 16: + return SKL_DEPTH_16BIT; + + case 24: + return SKL_DEPTH_24BIT; + + case 32: + return SKL_DEPTH_32BIT; + + default: + return SKL_DEPTH_INVALID; + + } +} + +static u32 skl_create_channel_map(enum skl_ch_cfg ch_cfg) +{ + u32 config; + + switch (ch_cfg) { + case SKL_CH_CFG_MONO: + config = (0xFFFFFFF0 | SKL_CHANNEL_LEFT); + break; + + case SKL_CH_CFG_STEREO: + config = (0xFFFFFF00 | SKL_CHANNEL_LEFT + | (SKL_CHANNEL_RIGHT << 4)); + break; + + case SKL_CH_CFG_2_1: + config = (0xFFFFF000 | SKL_CHANNEL_LEFT + | (SKL_CHANNEL_RIGHT << 4) + | (SKL_CHANNEL_LFE << 8)); + break; + + case SKL_CH_CFG_3_0: + config = (0xFFFFF000 | SKL_CHANNEL_LEFT + | (SKL_CHANNEL_CENTER << 4) + | (SKL_CHANNEL_RIGHT << 8)); + break; + + case SKL_CH_CFG_3_1: + config = (0xFFFF0000 | SKL_CHANNEL_LEFT + | (SKL_CHANNEL_CENTER << 4) + | (SKL_CHANNEL_RIGHT << 8) + | (SKL_CHANNEL_LFE << 12)); + break; + + case SKL_CH_CFG_QUATRO: + config = (0xFFFF0000 | SKL_CHANNEL_LEFT + | (SKL_CHANNEL_RIGHT << 4) + | (SKL_CHANNEL_LEFT_SURROUND << 8) + | (SKL_CHANNEL_RIGHT_SURROUND << 12)); + break; + + case SKL_CH_CFG_4_0: + config = (0xFFFF0000 | SKL_CHANNEL_LEFT + | (SKL_CHANNEL_CENTER << 4) + | (SKL_CHANNEL_RIGHT << 8) + | (SKL_CHANNEL_CENTER_SURROUND << 12)); + break; + + case SKL_CH_CFG_5_0: + config = (0xFFF00000 | SKL_CHANNEL_LEFT + | (SKL_CHANNEL_CENTER << 4) + | (SKL_CHANNEL_RIGHT << 8) + | (SKL_CHANNEL_LEFT_SURROUND << 12) + | (SKL_CHANNEL_RIGHT_SURROUND << 16)); + break; + + case SKL_CH_CFG_5_1: + config = (0xFF000000 | SKL_CHANNEL_CENTER + | (SKL_CHANNEL_LEFT << 4) + | (SKL_CHANNEL_RIGHT << 8) + | (SKL_CHANNEL_LEFT_SURROUND << 12) + | (SKL_CHANNEL_RIGHT_SURROUND << 16) + | (SKL_CHANNEL_LFE << 20)); + break; + + case SKL_CH_CFG_DUAL_MONO: + config = (0xFFFFFF00 | SKL_CHANNEL_LEFT + | (SKL_CHANNEL_LEFT << 4)); + break; + + case SKL_CH_CFG_I2S_DUAL_STEREO_0: + config = (0xFFFFFF00 | SKL_CHANNEL_LEFT + | (SKL_CHANNEL_RIGHT << 4)); + break; + + case SKL_CH_CFG_I2S_DUAL_STEREO_1: + config = (0xFFFF00FF | (SKL_CHANNEL_LEFT << 8) + | (SKL_CHANNEL_RIGHT << 12)); + break; + + default: + config = 0xFFFFFFFF; + break; + + } + + return config; +} + +/* + * Each module in DSP expects a base module configuration, which consists of + * PCM format information, which we calculate in driver and resource values + * which are read from widget information passed through topology binary + * This is send when we create a module with INIT_INSTANCE IPC msg + */ +static void skl_set_base_module_format(struct skl_sst *ctx, + struct skl_module_cfg *mconfig, + struct skl_base_cfg *base_cfg) +{ + struct skl_module_fmt *format = &mconfig->in_fmt; + + base_cfg->audio_fmt.number_of_channels = (u8)format->channels; + + base_cfg->audio_fmt.s_freq = format->s_freq; + base_cfg->audio_fmt.bit_depth = format->bit_depth; + base_cfg->audio_fmt.valid_bit_depth = format->valid_bit_depth; + base_cfg->audio_fmt.ch_cfg = format->ch_cfg; + + dev_dbg(ctx->dev, "bit_depth=%x valid_bd=%x ch_config=%x\n", + format->bit_depth, format->valid_bit_depth, + format->ch_cfg); + + base_cfg->audio_fmt.channel_map = skl_create_channel_map( + base_cfg->audio_fmt.ch_cfg); + + base_cfg->audio_fmt.interleaving = SKL_INTERLEAVING_PER_CHANNEL; + + base_cfg->cps = mconfig->mcps; + base_cfg->ibs = mconfig->ibs; + base_cfg->obs = mconfig->obs; +} + +/* + * Copies copier capabilities into copier module and updates copier module + * config size. + */ +static void skl_copy_copier_caps(struct skl_module_cfg *mconfig, + struct skl_cpr_cfg *cpr_mconfig) +{ + if (mconfig->formats_config.caps_size == 0) + return; + + memcpy(cpr_mconfig->gtw_cfg.config_data, + mconfig->formats_config.caps, + mconfig->formats_config.caps_size); + + cpr_mconfig->gtw_cfg.config_length = + (mconfig->formats_config.caps_size) / 4; +} + +/* + * Calculate the gatewat settings required for copier module, type of + * gateway and index of gateway to use + */ +static void skl_setup_cpr_gateway_cfg(struct skl_sst *ctx, + struct skl_module_cfg *mconfig, + struct skl_cpr_cfg *cpr_mconfig) +{ + union skl_connector_node_id node_id = {0}; + struct skl_pipe_params *params = mconfig->pipe->p_params; + + switch (mconfig->dev_type) { + case SKL_DEVICE_BT: + node_id.node.dma_type = + (SKL_CONN_SOURCE == mconfig->hw_conn_type) ? + SKL_DMA_I2S_LINK_OUTPUT_CLASS : + SKL_DMA_I2S_LINK_INPUT_CLASS; + node_id.node.vindex = params->host_dma_id + + (mconfig->vbus_id << 3); + break; + + case SKL_DEVICE_I2S: + node_id.node.dma_type = + (SKL_CONN_SOURCE == mconfig->hw_conn_type) ? + SKL_DMA_I2S_LINK_OUTPUT_CLASS : + SKL_DMA_I2S_LINK_INPUT_CLASS; + node_id.node.vindex = params->host_dma_id + + (mconfig->time_slot << 1) + + (mconfig->vbus_id << 3); + break; + + case SKL_DEVICE_DMIC: + node_id.node.dma_type = SKL_DMA_DMIC_LINK_INPUT_CLASS; + node_id.node.vindex = mconfig->vbus_id + + (mconfig->time_slot); + break; + + case SKL_DEVICE_HDALINK: + node_id.node.dma_type = + (SKL_CONN_SOURCE == mconfig->hw_conn_type) ? + SKL_DMA_HDA_LINK_OUTPUT_CLASS : + SKL_DMA_HDA_LINK_INPUT_CLASS; + node_id.node.vindex = params->link_dma_id; + break; + + default: + node_id.node.dma_type = + (SKL_CONN_SOURCE == mconfig->hw_conn_type) ? + SKL_DMA_HDA_HOST_OUTPUT_CLASS : + SKL_DMA_HDA_HOST_INPUT_CLASS; + node_id.node.vindex = params->host_dma_id; + break; + } + + cpr_mconfig->gtw_cfg.node_id = node_id.val; + + if (SKL_CONN_SOURCE == mconfig->hw_conn_type) + cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * mconfig->obs; + else + cpr_mconfig->gtw_cfg.dma_buffer_size = 2 * mconfig->ibs; + + cpr_mconfig->cpr_feature_mask = 0; + cpr_mconfig->gtw_cfg.config_length = 0; + + skl_copy_copier_caps(mconfig, cpr_mconfig); +} + +static void skl_setup_out_format(struct skl_sst *ctx, + struct skl_module_cfg *mconfig, + struct skl_audio_data_format *out_fmt) +{ + struct skl_module_fmt *format = &mconfig->out_fmt; + + out_fmt->number_of_channels = (u8)format->channels; + out_fmt->s_freq = format->s_freq; + out_fmt->bit_depth = format->bit_depth; + out_fmt->valid_bit_depth = format->valid_bit_depth; + out_fmt->ch_cfg = format->ch_cfg; + + out_fmt->channel_map = skl_create_channel_map(out_fmt->ch_cfg); + out_fmt->interleaving = SKL_INTERLEAVING_PER_CHANNEL; + + dev_dbg(ctx->dev, "copier out format chan=%d fre=%d bitdepth=%d\n", + out_fmt->number_of_channels, format->s_freq, format->bit_depth); +} + +/* + * 'copier' is DSP internal module which copies data from Host DMA (HDA host + * dma) or link (hda link, SSP, PDM) + * Here we calculate the copier module parameters, like PCM format, output + * format, gateway settings + * copier_module_config is sent as input buffer with INIT_INSTANCE IPC msg + */ +static void skl_set_copier_format(struct skl_sst *ctx, + struct skl_module_cfg *mconfig, + struct skl_cpr_cfg *cpr_mconfig) +{ + struct skl_audio_data_format *out_fmt = &cpr_mconfig->out_fmt; + struct skl_base_cfg *base_cfg = (struct skl_base_cfg *)cpr_mconfig; + + skl_set_base_module_format(ctx, mconfig, base_cfg); + + skl_setup_out_format(ctx, mconfig, out_fmt); + skl_setup_cpr_gateway_cfg(ctx, mconfig, cpr_mconfig); +} + +static u16 skl_get_module_param_size(struct skl_sst *ctx, + struct skl_module_cfg *mconfig) +{ + u16 param_size; + + switch (mconfig->m_type) { + case SKL_MODULE_TYPE_COPIER: + param_size = sizeof(struct skl_cpr_cfg); + param_size += mconfig->formats_config.caps_size; + return param_size; + + default: + /* + * return only base cfg when no specific module type is + * specified + */ + return sizeof(struct skl_base_cfg); + } + + return 0; +} + +/* + * DSP firmware supports various modules like copier etc. These modules + * required various parameters to be calculated and sent for the module + * initialization to DSP. By default a generic module needs only base module + * format configuration + */ +static int skl_set_module_format(struct skl_sst *ctx, + struct skl_module_cfg *module_config, + u16 *module_config_size, + void **param_data) +{ + u16 param_size; + + param_size = skl_get_module_param_size(ctx, module_config); + + *param_data = kzalloc(param_size, GFP_KERNEL); + if (NULL == *param_data) + return -ENOMEM; + + *module_config_size = param_size; + + switch (module_config->m_type) { + case SKL_MODULE_TYPE_COPIER: + skl_set_copier_format(ctx, module_config, *param_data); + break; + + default: + skl_set_base_module_format(ctx, module_config, *param_data); + break; + + } + + dev_dbg(ctx->dev, "Module type=%d config size: %d bytes\n", + module_config->id.module_id, param_size); + print_hex_dump(KERN_DEBUG, "Module params:", DUMP_PREFIX_OFFSET, 8, 4, + *param_data, param_size, false); + return 0; +} + +static int skl_get_queue_index(struct skl_module_pin *mpin, + struct skl_module_inst_id id, int max) +{ + int i; + + for (i = 0; i < max; i++) { + if (mpin[i].id.module_id == id.module_id && + mpin[i].id.instance_id == id.instance_id) + return i; + } + + return -EINVAL; +} + +/* + * Allocates queue for each module. + * if dynamic, the pin_index is allocated 0 to max_pin. + * In static, the pin_index is fixed based on module_id and instance id + */ +static int skl_alloc_queue(struct skl_module_pin *mpin, + struct skl_module_inst_id id, int max) +{ + int i; + + /* + * if pin in dynamic, find first free pin + * otherwise find match module and instance id pin as topology will + * ensure a unique pin is assigned to this so no need to + * allocate/free + */ + for (i = 0; i < max; i++) { + if (mpin[i].is_dynamic) { + if (!mpin[i].in_use) { + mpin[i].in_use = true; + mpin[i].id.module_id = id.module_id; + mpin[i].id.instance_id = id.instance_id; + return i; + } + } else { + if (mpin[i].id.module_id == id.module_id && + mpin[i].id.instance_id == id.instance_id) + return i; + } + } + + return -EINVAL; +} + +static void skl_free_queue(struct skl_module_pin *mpin, int q_index) +{ + if (mpin[q_index].is_dynamic) { + mpin[q_index].in_use = false; + mpin[q_index].id.module_id = 0; + mpin[q_index].id.instance_id = 0; + } +} diff --git a/sound/soc/intel/skylake/skl-topology.h b/sound/soc/intel/skylake/skl-topology.h new file mode 100644 index 0000000..6ba137a --- /dev/null +++ b/sound/soc/intel/skylake/skl-topology.h @@ -0,0 +1,251 @@ +/* + * skl_topology.h - Intel HDA Platform topology header file + * + * Copyright (C) 2014-15 Intel Corp + * Author: Jeeja KP jeeja.kp@intel.com + * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + * + * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + * + */ + +#ifndef __SKL_TOPOLOGY_H__ +#define __SKL_TOPOLOGY_H__ + +#include <linux/types.h> + +#include <sound/hdaudio_ext.h> +#include <sound/soc.h> +#include "skl.h" +#include "skl-tplg-interface.h" + +#define BITS_PER_BYTE 8 +#define MAX_TS_GROUPS 8 +#define MAX_DMIC_TS_GROUPS 4 +#define MAX_FIXED_DMIC_PARAMS_SIZE 727 + +/* Maximum number of coefficients up down mixer module */ +#define UP_DOWN_MIXER_MAX_COEFF 6 + +enum skl_channel_index { + SKL_CHANNEL_LEFT = 0, + SKL_CHANNEL_RIGHT = 1, + SKL_CHANNEL_CENTER = 2, + SKL_CHANNEL_LEFT_SURROUND = 3, + SKL_CHANNEL_CENTER_SURROUND = 3, + SKL_CHANNEL_RIGHT_SURROUND = 4, + SKL_CHANNEL_LFE = 7, + SKL_CHANNEL_INVALID = 0xF, +}; + +enum skl_bitdepth { + SKL_DEPTH_8BIT = 8, + SKL_DEPTH_16BIT = 16, + SKL_DEPTH_24BIT = 24, + SKL_DEPTH_32BIT = 32, + SKL_DEPTH_INVALID +}; + +enum skl_interleaving { + /* [s1_ch1...s1_chN,...,sM_ch1...sM_chN] */ + SKL_INTERLEAVING_PER_CHANNEL = 0, + /* [s1_ch1...sM_ch1,...,s1_chN...sM_chN] */ + SKL_INTERLEAVING_PER_SAMPLE = 1, +}; + +enum skl_s_freq { + SKL_FS_8000 = 8000, + SKL_FS_11025 = 11025, + SKL_FS_12000 = 12000, + SKL_FS_16000 = 16000, + SKL_FS_22050 = 22050, + SKL_FS_24000 = 24000, + SKL_FS_32000 = 32000, + SKL_FS_44100 = 44100, + SKL_FS_48000 = 48000, + SKL_FS_64000 = 64000, + SKL_FS_88200 = 88200, + SKL_FS_96000 = 96000, + SKL_FS_128000 = 128000, + SKL_FS_176400 = 176400, + SKL_FS_192000 = 192000, + SKL_FS_INVALID +}; + +enum skl_widget_type { + SKL_WIDGET_VMIXER = 1, + SKL_WIDGET_MIXER = 2, + SKL_WIDGET_PGA = 3, + SKL_WIDGET_MUX = 4 +}; + +struct skl_audio_data_format { + enum skl_s_freq s_freq; + enum skl_bitdepth bit_depth; + u32 channel_map; + enum skl_ch_cfg ch_cfg; + enum skl_interleaving interleaving; + u8 number_of_channels; + u8 valid_bit_depth; + u8 sample_type; + u8 reserved[1]; +} __packed; + +struct skl_base_cfg { + u32 cps; + u32 ibs; + u32 obs; + u32 is_pages; + struct skl_audio_data_format audio_fmt; +}; + +struct skl_cpr_gtw_cfg { + u32 node_id; + u32 dma_buffer_size; + u32 config_length; + /* not mandatory; required only for DMIC/I2S */ + u32 config_data[1]; +} __packed; + +struct skl_cpr_cfg { + struct skl_base_cfg base_cfg; + struct skl_audio_data_format out_fmt; + u32 cpr_feature_mask; + struct skl_cpr_gtw_cfg gtw_cfg; +} __packed; + +enum skl_dma_type { + SKL_DMA_HDA_HOST_OUTPUT_CLASS = 0, + SKL_DMA_HDA_HOST_INPUT_CLASS = 1, + SKL_DMA_HDA_HOST_INOUT_CLASS = 2, + SKL_DMA_HDA_LINK_OUTPUT_CLASS = 8, + SKL_DMA_HDA_LINK_INPUT_CLASS = 9, + SKL_DMA_HDA_LINK_INOUT_CLASS = 0xA, + SKL_DMA_DMIC_LINK_INPUT_CLASS = 0xB, + SKL_DMA_I2S_LINK_OUTPUT_CLASS = 0xC, + SKL_DMA_I2S_LINK_INPUT_CLASS = 0xD, +}; + +union skl_ssp_dma_node { + u8 val; + struct { + u8 dual_mono:1; + u8 time_slot:3; + u8 i2s_instance:4; + } dma_node; +}; + +union skl_connector_node_id { + u32 val; + struct { + u32 vindex:8; + u32 dma_type:4; + u32 rsvd:20; + } node; +}; + +struct skl_module_fmt { + u32 channels; + u32 s_freq; + u32 bit_depth; + u32 valid_bit_depth; + u32 ch_cfg; +}; + +struct skl_module_inst_id { + u32 module_id; + u32 instance_id; +}; + +struct skl_module_pin { + struct skl_module_inst_id id; + u8 pin_index; + bool is_dynamic; + bool in_use; +}; + +struct skl_specific_cfg { + u32 caps_size; + u32 *caps; +}; + +enum skl_pipe_state { + SKL_PIPE_INVALID = 0, + SKL_PIPE_CREATED = 1, + SKL_PIPE_PAUSED = 2, + SKL_PIPE_STARTED = 3 +}; + +struct skl_pipe_module { + struct snd_soc_dapm_widget *w; + struct list_head node; +}; + +struct skl_pipe_params { + u8 host_dma_id; + u8 link_dma_id; + u32 ch; + u32 s_freq; + u32 s_fmt; + u8 linktype; + int stream; +}; + +struct skl_pipe { + u8 ppl_id; + u8 pipe_priority; + u16 conn_type; + u32 memory_pages; + struct skl_pipe_params *p_params; + enum skl_pipe_state state; + struct list_head w_list; +}; + +enum skl_module_state { + SKL_MODULE_UNINIT = 0, + SKL_MODULE_INIT_DONE = 1, + SKL_MODULE_LOADED = 2, + SKL_MODULE_UNLOADED = 3, + SKL_MODULE_BIND_DONE = 4 +}; + +struct skl_module_cfg { + struct skl_module_inst_id id; + struct skl_module_fmt in_fmt; + struct skl_module_fmt out_fmt; + u8 max_in_queue; + u8 max_out_queue; + u8 in_queue_mask; + u8 out_queue_mask; + u8 in_queue; + u8 out_queue; + u32 mcps; + u32 ibs; + u32 obs; + u8 is_loadable; + u8 core_id; + u8 dev_type; + u8 dma_id; + u8 time_slot; + u32 params_fixup; + u32 converter; + u32 vbus_id; + struct skl_module_pin *m_in_pin; + struct skl_module_pin *m_out_pin; + enum skl_module_type m_type; + enum skl_hw_conn_type hw_conn_type; + enum skl_module_state m_state; + struct skl_pipe *pipe; + struct skl_specific_cfg formats_config; +}; +enum skl_bitdepth skl_get_bit_depth(int params); +#endif diff --git a/sound/soc/intel/skylake/skl-tplg-interface.h b/sound/soc/intel/skylake/skl-tplg-interface.h new file mode 100644 index 0000000..a506898 --- /dev/null +++ b/sound/soc/intel/skylake/skl-tplg-interface.h @@ -0,0 +1,88 @@ +/* + * skl-tplg-interface.h - Intel DSP FW private data interface + * + * Copyright (C) 2015 Intel Corp + * Author: Jeeja KP jeeja.kp@intel.com + * Nilofer, Samreen samreen.nilofer@intel.com + * ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as version 2, as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, but + * WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU + * General Public License for more details. + */ + +#ifndef __HDA_TPLG_INTERFACE_H__ +#define __HDA_TPLG_INTERFACE_H__ + +/** + * enum skl_ch_cfg - channel configuration + * + * @SKL_CH_CFG_MONO: One channel only + * @SKL_CH_CFG_STEREO: L & R + * @SKL_CH_CFG_2_1: L, R & LFE + * @SKL_CH_CFG_3_0: L, C & R + * @SKL_CH_CFG_3_1: L, C, R & LFE + * @SKL_CH_CFG_QUATRO: L, R, Ls & Rs + * @SKL_CH_CFG_4_0: L, C, R & Cs + * @SKL_CH_CFG_5_0: L, C, R, Ls & Rs + * @SKL_CH_CFG_5_1: L, C, R, Ls, Rs & LFE + * @SKL_CH_CFG_DUAL_MONO: One channel replicated in two + * @SKL_CH_CFG_I2S_DUAL_STEREO_0: Stereo(L,R) in 4 slots, 1st stream:[ L, R, -, - ] + * @SKL_CH_CFG_I2S_DUAL_STEREO_1: Stereo(L,R) in 4 slots, 2nd stream:[ -, -, L, R ] + * @SKL_CH_CFG_INVALID: Invalid + */ +enum skl_ch_cfg { + SKL_CH_CFG_MONO = 0, + SKL_CH_CFG_STEREO = 1, + SKL_CH_CFG_2_1 = 2, + SKL_CH_CFG_3_0 = 3, + SKL_CH_CFG_3_1 = 4, + SKL_CH_CFG_QUATRO = 5, + SKL_CH_CFG_4_0 = 6, + SKL_CH_CFG_5_0 = 7, + SKL_CH_CFG_5_1 = 8, + SKL_CH_CFG_DUAL_MONO = 9, + SKL_CH_CFG_I2S_DUAL_STEREO_0 = 10, + SKL_CH_CFG_I2S_DUAL_STEREO_1 = 11, + SKL_CH_CFG_INVALID +}; + +enum skl_module_type { + SKL_MODULE_TYPE_MIXER = 0, + SKL_MODULE_TYPE_COPIER, + SKL_MODULE_TYPE_UPDWMIX, + SKL_MODULE_TYPE_SRCINT +}; + +enum skl_core_affinity { + SKL_AFFINITY_CORE_0 = 0, + SKL_AFFINITY_CORE_1, + SKL_AFFINITY_CORE_MAX +}; + +enum skl_pipe_conn_type { + SKL_PIPE_CONN_TYPE_NONE = 0, + SKL_PIPE_CONN_TYPE_FE, + SKL_PIPE_CONN_TYPE_BE +}; + +enum skl_hw_conn_type { + SKL_CONN_NONE = 0, + SKL_CONN_SOURCE = 1, + SKL_CONN_SINK = 2 +}; + +enum skl_dev_type { + SKL_DEVICE_BT = 0x0, + SKL_DEVICE_DMIC = 0x1, + SKL_DEVICE_I2S = 0x2, + SKL_DEVICE_SLIMBUS = 0x3, + SKL_DEVICE_HDALINK = 0x4, + SKL_DEVICE_NONE +}; +#endif

The patch

ASoC: Intel: Skylake: Add helpers for SRC and converter modules

has been applied to the asoc tree at

git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git

All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying to this mail.

Thanks, Mark

From a0ffe48bb5d45fcef444e8a03c75fb7b73a5af29 Mon Sep 17 00:00:00 2001

From: Hardik T Shah hardik.t.shah@intel.com Date: Sat, 1 Aug 2015 19:40:42 +0530 Subject: [PATCH] ASoC: Intel: Skylake: Add helpers for SRC and converter modules

SRC and converter modules are required to do frequency and channel conversion in DSP. Both take base module configuration and additional SRC and converter parameters. The helpers here are added to calculate the values for these modules

Signed-off-by: Hardik T Shah hardik.t.shah@intel.com Signed-off-by: Jeeja KP jeeja.kp@intel.com Signed-off-by: Vinod Koul vinod.koul@intel.com Signed-off-by: Mark Brown broonie@kernel.org --- sound/soc/intel/skylake/skl-messages.c | 64 +++++++++++++++++++++++++++++++--- sound/soc/intel/skylake/skl-topology.h | 16 +++++++++ 2 files changed, 76 insertions(+), 4 deletions(-)

diff --git a/sound/soc/intel/skylake/skl-messages.c b/sound/soc/intel/skylake/skl-messages.c index 0ba13f1..03a80ef 100644 --- a/sound/soc/intel/skylake/skl-messages.c +++ b/sound/soc/intel/skylake/skl-messages.c @@ -381,6 +381,47 @@ static void skl_setup_out_format(struct skl_sst *ctx, }

/* + * DSP needs SRC module for frequency conversion, SRC takes base module + * configuration and the target frequency as extra parameter passed as src + * config + */ +static void skl_set_src_format(struct skl_sst *ctx, + struct skl_module_cfg *mconfig, + struct skl_src_module_cfg *src_mconfig) +{ + struct skl_module_fmt *fmt = &mconfig->out_fmt; + + skl_set_base_module_format(ctx, mconfig, + (struct skl_base_cfg *)src_mconfig); + + src_mconfig->src_cfg = fmt->s_freq; +} + +/* + * DSP needs updown module to do channel conversion. updown module take base + * module configuration and channel configuration + * It also take coefficients and now we have defaults applied here + */ +static void skl_set_updown_mixer_format(struct skl_sst *ctx, + struct skl_module_cfg *mconfig, + struct skl_up_down_mixer_cfg *mixer_mconfig) +{ + struct skl_module_fmt *fmt = &mconfig->out_fmt; + int i = 0; + + skl_set_base_module_format(ctx, mconfig, + (struct skl_base_cfg *)mixer_mconfig); + mixer_mconfig->out_ch_cfg = fmt->ch_cfg; + + /* Select F/W default coefficient */ + mixer_mconfig->coeff_sel = 0x0; + + /* User coeff, don't care since we are selecting F/W defaults */ + for (i = 0; i < UP_DOWN_MIXER_MAX_COEFF; i++) + mixer_mconfig->coeff[i] = 0xDEADBEEF; +} + +/* * 'copier' is DSP internal module which copies data from Host DMA (HDA host * dma) or link (hda link, SSP, PDM) * Here we calculate the copier module parameters, like PCM format, output @@ -411,6 +452,12 @@ static u16 skl_get_module_param_size(struct skl_sst *ctx, param_size += mconfig->formats_config.caps_size; return param_size;

+ case SKL_MODULE_TYPE_SRCINT: + return sizeof(struct skl_src_module_cfg); + + case SKL_MODULE_TYPE_UPDWMIX: + return sizeof(struct skl_up_down_mixer_cfg); + default: /* * return only base cfg when no specific module type is @@ -423,11 +470,12 @@ static u16 skl_get_module_param_size(struct skl_sst *ctx, }

/* - * DSP firmware supports various modules like copier etc. These modules - * required various parameters to be calculated and sent for the module - * initialization to DSP. By default a generic module needs only base module - * format configuration + * DSP firmware supports various modules like copier, SRC, updown etc. + * These modules required various parameters to be calculated and sent for + * the module initialization to DSP. By default a generic module needs only + * base module format configuration */ + static int skl_set_module_format(struct skl_sst *ctx, struct skl_module_cfg *module_config, u16 *module_config_size, @@ -448,6 +496,14 @@ static int skl_set_module_format(struct skl_sst *ctx, skl_set_copier_format(ctx, module_config, *param_data); break;

+ case SKL_MODULE_TYPE_SRCINT: + skl_set_src_format(ctx, module_config, *param_data); + break; + + case SKL_MODULE_TYPE_UPDWMIX: + skl_set_updown_mixer_format(ctx, module_config, *param_data); + break; + default: skl_set_base_module_format(ctx, module_config, *param_data); break; diff --git a/sound/soc/intel/skylake/skl-topology.h b/sound/soc/intel/skylake/skl-topology.h index 6ba137a..e4b2a33 100644 --- a/sound/soc/intel/skylake/skl-topology.h +++ b/sound/soc/intel/skylake/skl-topology.h @@ -123,6 +123,21 @@ struct skl_cpr_cfg { struct skl_cpr_gtw_cfg gtw_cfg; } __packed;

+ +struct skl_src_module_cfg { + struct skl_base_cfg base_cfg; + enum skl_s_freq src_cfg; +} __packed; + +struct skl_up_down_mixer_cfg { + struct skl_base_cfg base_cfg; + enum skl_ch_cfg out_ch_cfg; + /* This should be set to 1 if user coefficients are required */ + u32 coeff_sel; + /* Pass the user coeff in this array */ + s32 coeff[UP_DOWN_MIXER_MAX_COEFF]; +} __packed; + enum skl_dma_type { SKL_DMA_HDA_HOST_OUTPUT_CLASS = 0, SKL_DMA_HDA_HOST_INPUT_CLASS = 1, @@ -247,5 +262,6 @@ struct skl_module_cfg { struct skl_pipe *pipe; struct skl_specific_cfg formats_config; }; + enum skl_bitdepth skl_get_bit_depth(int params); #endif

The patch

ASoC: Intel: Skylake: Add DSP module init and binding routines

has been applied to the asoc tree at

git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git

All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying to this mail.

Thanks, Mark

From beb73b266a75602084361c5ef0baa5bc14637f4b Mon Sep 17 00:00:00 2001

From: Jeeja KP jeeja.kp@intel.com Date: Sat, 1 Aug 2015 19:40:43 +0530 Subject: [PATCH] ASoC: Intel: Skylake: Add DSP module init and binding routines

A module needs to be instantiated and then connected with other modules. On cleanup we need to disconnect the module. This is achieved by helpers module init, bind and unbind which are added here

Signed-off-by: Jeeja KP jeeja.kp@intel.com Signed-off-by: Vinod Koul vinod.koul@intel.com Signed-off-by: Mark Brown broonie@kernel.org --- sound/soc/intel/skylake/skl-messages.c | 183 +++++++++++++++++++++++++++++++++ sound/soc/intel/skylake/skl-topology.h | 9 ++ 2 files changed, 192 insertions(+)

diff --git a/sound/soc/intel/skylake/skl-messages.c b/sound/soc/intel/skylake/skl-messages.c index 03a80ef..c435a51 100644 --- a/sound/soc/intel/skylake/skl-messages.c +++ b/sound/soc/intel/skylake/skl-messages.c @@ -573,3 +573,186 @@ static void skl_free_queue(struct skl_module_pin *mpin, int q_index) mpin[q_index].id.instance_id = 0; } } + +/* + * A module needs to be instanataited in DSP. A mdoule is present in a + * collection of module referred as a PIPE. + * We first calculate the module format, based on module type and then + * invoke the DSP by sending IPC INIT_INSTANCE using ipc helper + */ +int skl_init_module(struct skl_sst *ctx, + struct skl_module_cfg *mconfig, char *param) +{ + u16 module_config_size = 0; + void *param_data = NULL; + int ret; + struct skl_ipc_init_instance_msg msg; + + dev_dbg(ctx->dev, "%s: module_id = %d instance=%d\n", __func__, + mconfig->id.module_id, mconfig->id.instance_id); + + if (mconfig->pipe->state != SKL_PIPE_CREATED) { + dev_err(ctx->dev, "Pipe not created state= %d pipe_id= %d\n", + mconfig->pipe->state, mconfig->pipe->ppl_id); + return -EIO; + } + + ret = skl_set_module_format(ctx, mconfig, + &module_config_size, &param_data); + if (ret < 0) { + dev_err(ctx->dev, "Failed to set module format ret=%d\n", ret); + return ret; + } + + msg.module_id = mconfig->id.module_id; + msg.instance_id = mconfig->id.instance_id; + msg.ppl_instance_id = mconfig->pipe->ppl_id; + msg.param_data_size = module_config_size; + msg.core_id = mconfig->core_id; + + ret = skl_ipc_init_instance(&ctx->ipc, &msg, param_data); + if (ret < 0) { + dev_err(ctx->dev, "Failed to init instance ret=%d\n", ret); + kfree(param_data); + return ret; + } + mconfig->m_state = SKL_MODULE_INIT_DONE; + + return ret; +} + +static void skl_dump_bind_info(struct skl_sst *ctx, struct skl_module_cfg + *src_module, struct skl_module_cfg *dst_module) +{ + dev_dbg(ctx->dev, "%s: src module_id = %d src_instance=%d\n", + __func__, src_module->id.module_id, src_module->id.instance_id); + dev_dbg(ctx->dev, "%s: dst_module=%d dst_instacne=%d\n", __func__, + dst_module->id.module_id, dst_module->id.instance_id); + + dev_dbg(ctx->dev, "src_module state = %d dst module state = %d\n", + src_module->m_state, dst_module->m_state); +} + +/* + * On module freeup, we need to unbind the module with modules + * it is already bind. + * Find the pin allocated and unbind then using bind_unbind IPC + */ +int skl_unbind_modules(struct skl_sst *ctx, + struct skl_module_cfg *src_mcfg, + struct skl_module_cfg *dst_mcfg) +{ + int ret; + struct skl_ipc_bind_unbind_msg msg; + struct skl_module_inst_id src_id = src_mcfg->id; + struct skl_module_inst_id dst_id = dst_mcfg->id; + int in_max = dst_mcfg->max_in_queue; + int out_max = src_mcfg->max_out_queue; + int src_index, dst_index; + + skl_dump_bind_info(ctx, src_mcfg, dst_mcfg); + + if (src_mcfg->m_state != SKL_MODULE_BIND_DONE) + return 0; + + /* + * if intra module unbind, check if both modules are BIND, + * then send unbind + */ + if ((src_mcfg->pipe->ppl_id != dst_mcfg->pipe->ppl_id) && + dst_mcfg->m_state != SKL_MODULE_BIND_DONE) + return 0; + else if (src_mcfg->m_state < SKL_MODULE_INIT_DONE && + dst_mcfg->m_state < SKL_MODULE_INIT_DONE) + return 0; + + /* get src queue index */ + src_index = skl_get_queue_index(src_mcfg->m_out_pin, dst_id, out_max); + if (src_index < 0) + return -EINVAL; + + msg.src_queue = src_mcfg->m_out_pin[src_index].pin_index; + + /* get dst queue index */ + dst_index = skl_get_queue_index(dst_mcfg->m_in_pin, src_id, in_max); + if (dst_index < 0) + return -EINVAL; + + msg.dst_queue = dst_mcfg->m_in_pin[dst_index].pin_index; + + msg.module_id = src_mcfg->id.module_id; + msg.instance_id = src_mcfg->id.instance_id; + msg.dst_module_id = dst_mcfg->id.module_id; + msg.dst_instance_id = dst_mcfg->id.instance_id; + msg.bind = false; + + ret = skl_ipc_bind_unbind(&ctx->ipc, &msg); + if (!ret) { + src_mcfg->m_state = SKL_MODULE_UNINIT; + /* free queue only if unbind is success */ + skl_free_queue(src_mcfg->m_out_pin, src_index); + skl_free_queue(dst_mcfg->m_in_pin, dst_index); + } + + return ret; +} + +/* + * Once a module is instantiated it need to be 'bind' with other modules in + * the pipeline. For binding we need to find the module pins which are bind + * together + * This function finds the pins and then sends bund_unbind IPC message to + * DSP using IPC helper + */ +int skl_bind_modules(struct skl_sst *ctx, + struct skl_module_cfg *src_mcfg, + struct skl_module_cfg *dst_mcfg) +{ + int ret; + struct skl_ipc_bind_unbind_msg msg; + struct skl_module_inst_id src_id = src_mcfg->id; + struct skl_module_inst_id dst_id = dst_mcfg->id; + int in_max = dst_mcfg->max_in_queue; + int out_max = src_mcfg->max_out_queue; + int src_index, dst_index; + + skl_dump_bind_info(ctx, src_mcfg, dst_mcfg); + + if (src_mcfg->m_state < SKL_MODULE_INIT_DONE && + dst_mcfg->m_state < SKL_MODULE_INIT_DONE) + return 0; + + src_index = skl_alloc_queue(src_mcfg->m_out_pin, dst_id, out_max); + if (src_index < 0) + return -EINVAL; + + msg.src_queue = src_mcfg->m_out_pin[src_index].pin_index; + dst_index = skl_alloc_queue(dst_mcfg->m_in_pin, src_id, in_max); + if (dst_index < 0) { + skl_free_queue(src_mcfg->m_out_pin, src_index); + return -EINVAL; + } + + msg.dst_queue = dst_mcfg->m_in_pin[dst_index].pin_index; + + dev_dbg(ctx->dev, "src queue = %d dst queue =%d\n", + msg.src_queue, msg.dst_queue); + + msg.module_id = src_mcfg->id.module_id; + msg.instance_id = src_mcfg->id.instance_id; + msg.dst_module_id = dst_mcfg->id.module_id; + msg.dst_instance_id = dst_mcfg->id.instance_id; + msg.bind = true; + + ret = skl_ipc_bind_unbind(&ctx->ipc, &msg); + + if (!ret) { + src_mcfg->m_state = SKL_MODULE_BIND_DONE; + } else { + /* error case , if IPC fails, clear the queue index */ + skl_free_queue(src_mcfg->m_out_pin, src_index); + skl_free_queue(dst_mcfg->m_in_pin, dst_index); + } + + return ret; +} diff --git a/sound/soc/intel/skylake/skl-topology.h b/sound/soc/intel/skylake/skl-topology.h index e4b2a33..b7e8aa8 100644 --- a/sound/soc/intel/skylake/skl-topology.h +++ b/sound/soc/intel/skylake/skl-topology.h @@ -263,5 +263,14 @@ struct skl_module_cfg { struct skl_specific_cfg formats_config; };

+int skl_init_module(struct skl_sst *ctx, struct skl_module_cfg *module_config, + char *param); + +int skl_bind_modules(struct skl_sst *ctx, struct skl_module_cfg + *src_module, struct skl_module_cfg *dst_module); + +int skl_unbind_modules(struct skl_sst *ctx, struct skl_module_cfg + *src_module, struct skl_module_cfg *dst_module); + enum skl_bitdepth skl_get_bit_depth(int params); #endif

The patch

ASoC: Intel: Skylake: Add pipe management helpers

has been applied to the asoc tree at

git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git

All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted.

You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed.

If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced.

Please add any relevant lists and maintainers to the CCs when replying to this mail.

Thanks, Mark

From c9b1e834bc8decaf979344e8121e4ad1ded8dc8a Mon Sep 17 00:00:00 2001

From: Jeeja KP jeeja.kp@intel.com Date: Sat, 1 Aug 2015 19:40:44 +0530 Subject: [PATCH] ASoC: Intel: Skylake: Add pipe management helpers

To manage DSP we need to create processing pipeline and on cleanup destroy them. So we add create and destroy routines for pipelines The pipelines need to to be executed so we add pipeline run and stop routines All these send required IPCs to DSP using IPC routines added earlier

Signed-off-by: Jeeja KP jeeja.kp@intel.com Signed-off-by: Vinod Koul vinod.koul@intel.com Signed-off-by: Mark Brown broonie@kernel.org --- sound/soc/intel/skylake/skl-messages.c | 126 +++++++++++++++++++++++++++++++++ sound/soc/intel/skylake/skl-topology.h | 10 +++ 2 files changed, 136 insertions(+)

diff --git a/sound/soc/intel/skylake/skl-messages.c b/sound/soc/intel/skylake/skl-messages.c index c435a51..826d4fd 100644 --- a/sound/soc/intel/skylake/skl-messages.c +++ b/sound/soc/intel/skylake/skl-messages.c @@ -756,3 +756,129 @@ int skl_bind_modules(struct skl_sst *ctx,

return ret; } + +static int skl_set_pipe_state(struct skl_sst *ctx, struct skl_pipe *pipe, + enum skl_ipc_pipeline_state state) +{ + dev_dbg(ctx->dev, "%s: pipe_satate = %d\n", __func__, state); + + return skl_ipc_set_pipeline_state(&ctx->ipc, pipe->ppl_id, state); +} + +/* + * A pipeline is a collection of modules. Before a module in instantiated a + * pipeline needs to be created for it. + * This function creates pipeline, by sending create pipeline IPC messages + * to FW + */ +int skl_create_pipeline(struct skl_sst *ctx, struct skl_pipe *pipe) +{ + int ret; + + dev_dbg(ctx->dev, "%s: pipe_id = %d\n", __func__, pipe->ppl_id); + + ret = skl_ipc_create_pipeline(&ctx->ipc, pipe->memory_pages, + pipe->pipe_priority, pipe->ppl_id); + if (ret < 0) { + dev_err(ctx->dev, "Failed to create pipeline\n"); + return ret; + } + + pipe->state = SKL_PIPE_CREATED; + + return 0; +} + +/* + * A pipeline needs to be deleted on cleanup. If a pipeline is running, then + * pause the pipeline first and then delete it + * The pipe delete is done by sending delete pipeline IPC. DSP will stop the + * DMA engines and releases resources + */ +int skl_delete_pipe(struct skl_sst *ctx, struct skl_pipe *pipe) +{ + int ret; + + dev_dbg(ctx->dev, "%s: pipe = %d\n", __func__, pipe->ppl_id); + + /* If pipe is not started, do not try to stop the pipe in FW. */ + if (pipe->state > SKL_PIPE_STARTED) { + ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED); + if (ret < 0) { + dev_err(ctx->dev, "Failed to stop pipeline\n"); + return ret; + } + + pipe->state = SKL_PIPE_PAUSED; + } else { + /* If pipe was not created in FW, do not try to delete it */ + if (pipe->state < SKL_PIPE_CREATED) + return 0; + + ret = skl_ipc_delete_pipeline(&ctx->ipc, pipe->ppl_id); + if (ret < 0) + dev_err(ctx->dev, "Failed to delete pipeline\n"); + } + + return ret; +} + +/* + * A pipeline is also a scheduling entity in DSP which can be run, stopped + * For processing data the pipe need to be run by sending IPC set pipe state + * to DSP + */ +int skl_run_pipe(struct skl_sst *ctx, struct skl_pipe *pipe) +{ + int ret; + + dev_dbg(ctx->dev, "%s: pipe = %d\n", __func__, pipe->ppl_id); + + /* If pipe was not created in FW, do not try to pause or delete */ + if (pipe->state < SKL_PIPE_CREATED) + return 0; + + /* Pipe has to be paused before it is started */ + ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED); + if (ret < 0) { + dev_err(ctx->dev, "Failed to pause pipe\n"); + return ret; + } + + pipe->state = SKL_PIPE_PAUSED; + + ret = skl_set_pipe_state(ctx, pipe, PPL_RUNNING); + if (ret < 0) { + dev_err(ctx->dev, "Failed to start pipe\n"); + return ret; + } + + pipe->state = SKL_PIPE_STARTED; + + return 0; +} + +/* + * Stop the pipeline by sending set pipe state IPC + * DSP doesnt implement stop so we always send pause message + */ +int skl_stop_pipe(struct skl_sst *ctx, struct skl_pipe *pipe) +{ + int ret; + + dev_dbg(ctx->dev, "In %s pipe=%d\n", __func__, pipe->ppl_id); + + /* If pipe was not created in FW, do not try to pause or delete */ + if (pipe->state < SKL_PIPE_PAUSED) + return 0; + + ret = skl_set_pipe_state(ctx, pipe, PPL_PAUSED); + if (ret < 0) { + dev_dbg(ctx->dev, "Failed to stop pipe\n"); + return ret; + } + + pipe->state = SKL_PIPE_CREATED; + + return 0; +} diff --git a/sound/soc/intel/skylake/skl-topology.h b/sound/soc/intel/skylake/skl-topology.h index b7e8aa8..8c7767b 100644 --- a/sound/soc/intel/skylake/skl-topology.h +++ b/sound/soc/intel/skylake/skl-topology.h @@ -263,6 +263,16 @@ struct skl_module_cfg { struct skl_specific_cfg formats_config; };

+int skl_create_pipeline(struct skl_sst *ctx, struct skl_pipe *pipe); + +int skl_run_pipe(struct skl_sst *ctx, struct skl_pipe *pipe); + +int skl_pause_pipe(struct skl_sst *ctx, struct skl_pipe *pipe); + +int skl_delete_pipe(struct skl_sst *ctx, struct skl_pipe *pipe); + +int skl_stop_pipe(struct skl_sst *ctx, struct skl_pipe *pipe); + int skl_init_module(struct skl_sst *ctx, struct skl_module_cfg *module_config, char *param);