[alsa-devel] [PATCH] ASoC: bells: Specify REFCLK for FLLs
Wolfson recommends using a higher frequency REFCLK for best performance rather than the default 32kHz reference clock source. We should set a good example and do so.
Signed-off-by: Charles Keepax ckeepax@opensource.wolfsonmicro.com --- sound/soc/samsung/bells.c | 18 ++++++++++++++++++ 1 files changed, 18 insertions(+), 0 deletions(-)
diff --git a/sound/soc/samsung/bells.c b/sound/soc/samsung/bells.c index 84f5d8b..89ad1d7 100644 --- a/sound/soc/samsung/bells.c +++ b/sound/soc/samsung/bells.c @@ -181,6 +181,24 @@ static int bells_late_probe(struct snd_soc_card *card) return ret; }
+ ret = snd_soc_codec_set_pll(codec, WM5102_FLL1_REFCLK, + ARIZONA_FLL_SRC_MCLK1, + MCLK_RATE, + bells->sysclk_rate); + if (ret != 0) { + dev_err(codec->dev, "Failed to set REFCLK for FLL1: %d\n", ret); + return ret; + } + + ret = snd_soc_codec_set_pll(codec, WM5102_FLL2_REFCLK, + ARIZONA_FLL_SRC_MCLK1, + MCLK_RATE, + bells->asyncclk_rate); + if (ret != 0) { + dev_err(codec->dev, "Failed to set REFCLK for FLL2: %d\n", ret); + return ret; + } + aif2_dai = card->rtd[DAI_CODEC_CP].cpu_dai;
ret = snd_soc_dai_set_sysclk(aif2_dai, ARIZONA_CLK_ASYNCCLK, 0, 0);
On Sat, Sep 21, 2013 at 11:10:18AM +0100, Charles Keepax wrote:
Wolfson recommends using a higher frequency REFCLK for best performance rather than the default 32kHz reference clock source. We should set a good example and do so.
The trick here is of course that MCLK1 is not guaranteed to be physically present on the board and there are a range of possible frequencies it could be set to... I'm not sure I actually have any crystals.
Ah... yeah sorry forgot that, have always had a crystal in my board. Best just ignore this patch I guess we will just have to not set a good example.
Thanks, Charles
On Sat, Sep 21, 2013 at 02:28:33PM +0100, Mark Brown wrote:
On Sat, Sep 21, 2013 at 11:10:18AM +0100, Charles Keepax wrote:
Wolfson recommends using a higher frequency REFCLK for best performance rather than the default 32kHz reference clock source. We should set a good example and do so.
The trick here is of course that MCLK1 is not guaranteed to be physically present on the board and there are a range of possible frequencies it could be set to... I'm not sure I actually have any crystals.
On Sat, Sep 21, 2013 at 09:08:36PM +0100, Charles Keepax wrote:
Ah... yeah sorry forgot that, have always had a crystal in my board. Best just ignore this patch I guess we will just have to not set a good example.
Don't top post... one option that occurred to me on the way home is to put a #define in there so people can set it if they want it. Once Tomasz's s3c64xx clk API conversion is done you should be able to start using the FLL on the wm831x to change MCLK2 dynamically.
participants (2)
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Charles Keepax -
Mark Brown