22 Oct
2013
22 Oct
'13
11:04 a.m.
On Fri, Oct 18, 2013 at 06:37:42PM +0300, Jyri Sarha wrote:
This patch adds a separate register location for data port registers to mcasp DT bindings. On am33xx SoCs the McASP registers are mapped trough L4 interconnect, but data port registers are also mapped trough L3 bus to a different memory location.
Applied, thanks.