Hi Dmitry,
On Wed, 2021-03-03 at 11:28 +0300, Dmitry Osipenko wrote:
02.03.2021 14:21, Dmitry Osipenko пишет:
The I2S reset may be asserted at a boot time. Tegra30 I2S driver doesn't manage the reset control and currently it happens to work because reset is implicitly deasserted by the Tegra AHUB driver, but the reset of I2C controller should be synchronous and I2S clock is disabled when AHUB is reset. Add reset control to the Tegra30 I2S driver.
Note that I2S reset was always specified in Tegra30+ device-trees, hence DTB ABI changes aren't required. Also note that AHUB touches I2S resets, hence AHUB resets are now requested in a released state, allowing both drivers to control the I2S resets together.
Signed-off-by: Dmitry Osipenko digetx@gmail.com
sound/soc/tegra/tegra30_ahub.c | 14 ++++++++++--- sound/soc/tegra/tegra30_i2s.c | 36 +++++++++++++++++++++++++++++++++- sound/soc/tegra/tegra30_i2s.h | 1 + 3 files changed, 47 insertions(+), 4 deletions(-)
...
@@ -579,7 +587,7 @@ static int tegra30_ahub_probe(struct platform_device *pdev) if (ret) return ret;
- ahub->reset = devm_reset_control_array_get_exclusive(&pdev->dev);
- ahub->reset = devm_reset_control_array_get_exclusive_released(&pdev->dev);
Thinking a bit more about this, it looks like we actually want something like:
devm_reset_control_array_get_exclusive_released_named()
that will request resets by given names and in a given order, similarly to devm_clk_bulk_get(). This will be very handy for both Tegra audio and GPU drivers. I'll prepare a v2 if there are no objections.
I do have an untested reset control bulk API patch that I've just never finished, because I had no user. I'll send you an RFC, let me know if you can build on that.
regards Philipp