On Fri, 2015-09-25 at 22:58 +0200, Rafael J. Wysocki wrote:
On Friday, September 25, 2015 01:25:49 PM Viresh Kumar wrote:
On 25 September 2015 at 13:33, Rafael J. Wysocki rjw@rjwysocki.net wrote:
You're going to change that into bool in the next patch, right?
Yeah.
So what if bool is a byte and the field is not word-aligned
Its between two 'unsigned long' variables today, and the struct isn't packed. So, it will be aligned, isn't it?
and changing that byte requires a read-modify-write. How do we ensure that things remain consistent in that case?
I didn't understood why a read-modify-write is special here? That's what will happen to most of the non-word-sized fields anyway?
Probably I didn't understood what you meant..
Say you have three adjacent fields in a structure, x, y, z, each one byte long. Initially, all of them are equal to 0.
CPU A writes 1 to x and CPU B writes 2 to y at the same time.
What's the result?
I think every CPU's cache architecure guarantees adjacent store integrity, even in the face of SMP, so it's x==1 and y==2. If you're thinking of old alpha SMP system where the lowest store width is 32 bits and thus you have to do RMW to update a byte, this was usually fixed by padding (assuming the structure is not packed). However, it was such a problem that even the later alpha chips had byte extensions.
James