On Sat, Jul 12, 2008 at 12:00:18AM -0600, Grant Likely wrote:
On Wed, Jul 02, 2008 at 11:48:33AM +0100, Liam Girdwood wrote:
PLL/FLL/clock config is usually done in a separate function (codec_set_pll(), callable by machine driver) so that we can change clocks depending on the available machine clocks and srate.
...
Codec domain (i.e Bias power) PM stuff should be done in codec_dapm_event(). This allows us to power the codec on when we do things like sidetone (with no active playback or capture stream).
Ugh, I'm going to have to leave these two for now. I don't understand enough about the ASoC structure yet to understand what it should look like. I'll probably need help, but I don't think I can get it sorted out before the merge window.
Do these two comments need to be addressed before the driver is merged?
It wouldn't be the only driver not to implement PLL configuration in this way so that's probably be OK for an initial merge. What's expected for PLL configuration is that you implement the DAI set_pll() operation in the codec driver, allowing machine drivers to configure the PLL when they wish.
The power configuration should be fixed, though. Normally drivers either fully implement DAPM (including set_bias_level()) or power everything in the codec up when the driver is loaded. At the minute what the driver is doing appears to be powering the codec up in both _hw_params() and _probe() but never powering anything down - if that is the case then probably all you need to do is remove the extra power up from hw_params(), giving you the simple option.
Hmmm, I haven't been able to find this; either in the code or on a live running system. Where is the common reg dump implemented.
/sys/bus/platform/devices/soc-audio/codec_reg