-----Original Message----- From: Mark Brown [mailto:broonie@kernel.org] Sent: Monday, March 31, 2014 5:08 AM To: Lars-Peter Clausen Cc: Arun Shamanna Lakshmi; Songhee Baek; 'alsa-devel@alsa-project.org'; 'swarren@wwwdotorg.org'; 'tiwai@suse.de'; 'lgirdwood@gmail.com'; 'linux- kernel@vger.kernel.org' Subject: Re: [alsa-devel] [PATCH] ASoC: Add support for multi register mux
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On Mon, Mar 31, 2014 at 01:55:52PM +0200, Lars-Peter Clausen wrote:
On 03/31/2014 01:21 PM, Mark Brown wrote:
The above is a bit confusing... partly this is because of a lack of context (what is MULTI_MUX_INPUT_OFFSET?) and partly because it isn't entirely obvious that stopping as soon as we see any value set is the right choice, especially given the addition to rather than setting of val.
I think the idea is that since we know that for one-hot encodings only powers of two are valid values the other bits are used to encode the register number. E.g 0x4 means bit 3 in register 0, 0x5 means bit 3 in register 1, 0x6 means bit 3 in register 2 and so on. I guess it is possible to make it work. But this seems to be quite hack-ish to me. You'd have to be careful that MULTI_MUX_INPUT_OFFSET(reg_idx) never evaluates to a power of two and there are probably some more pitfalls.
Ugh, right. The fact that I couldn't tell that this was what the code was trying to do from looking at it is not a good sign here.
I will work on this and submit another patch. Thanks for all your feedback.
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