Enable a hardware workaround which avoids problems with the clocking of the ADCs in certain configurations.
Signed-off-by: Mark Brown broonie@opensource.wolfsonmicro.com --- sound/soc/codecs/wm8990.c | 6 ++++-- sound/soc/codecs/wm8990.h | 4 ++-- 2 files changed, 6 insertions(+), 4 deletions(-)
diff --git a/sound/soc/codecs/wm8990.c b/sound/soc/codecs/wm8990.c index 5c84f02..938e154 100644 --- a/sound/soc/codecs/wm8990.c +++ b/sound/soc/codecs/wm8990.c @@ -1272,9 +1272,11 @@ static int wm8990_set_bias_level(struct snd_soc_codec *codec,
/* disable POBCTRL, SOFT_ST and BUFDCOPEN */ wm8990_write(codec, WM8990_ANTIPOP2, WM8990_BUFIOEN); - } else { - /* ON -> standby */
+ /* Enable workaround for ADC clocking issue. */ + wm8990_write(codec, WM8990_EXT_ACCESS_ENA, 0x2); + wm8990_write(codec, WM8990_EXT_CTL1, 0xa003); + wm8990_write(codec, WM8990_EXT_ACCESS_ENA, 0); } break;
diff --git a/sound/soc/codecs/wm8990.h b/sound/soc/codecs/wm8990.h index 0e192f3..7114ddc 100644 --- a/sound/soc/codecs/wm8990.h +++ b/sound/soc/codecs/wm8990.h @@ -80,8 +80,8 @@ #define WM8990_PLL3 0x3E #define WM8990_INTDRIVBITS 0x3F
-#define WM8990_REGISTER_COUNT 60 -#define WM8990_MAX_REGISTER 0x3F +#define WM8990_EXT_ACCESS_ENA 0x75 +#define WM8990_EXT_CTL1 0x7a
/* * Field Definitions.