From d2001cdbc2fda3345af307b4cf3d0f2e53d80c35 Mon Sep 17 00:00:00 2001
From: Hardevsinh Palaniya hardevsinh.palaniya@siliconsignals.io Date: Fri, 13 Jan 2023 11:01:22 +0530 Subject: [PATCH] Add dts to support MAX98090/91 with i.MX8MM-evk
- Add sound-max98090 node to support external codec MAX98090/91 - Use i2c3 for i2c communicate with codec - Use sai5 for i2s communication
Signed-off-by: Hardevsinh Palaniya hardevsinh.palaniya@siliconsignals.io
diff --git a/arch/arm64/boot/dts/freescale/imx8mm-evk-max98090-91.dts b/arch/arm64/boot/dts/freescale/imx8mm-evk-max98090-91.dts new file mode 100644 index 000000000000..d053c586514a --- /dev/null +++ b/arch/arm64/boot/dts/freescale/imx8mm-evk-max98090-91.dts @@ -0,0 +1,65 @@ +#include "imx8mm-evk.dtsi" + +/ { + sound-max98090 { + compatible = "simple-audio-card"; + simple-audio-card,name = "max98090-audio"; + simple-audio-card,format = "i2s"; + simple-audio-card,frame-master = <&cpudai>; + simple-audio-card,bitclock-master = <&cpudai>; + simple-audio-card,widgets = "Speakers", "Speakers"; + simple-audio-card,routing = + "Speakers", "SPKR", + "Speakers", "SPKL", + "IN1", "MICBIAS", + "MIC1","IN1", + "MIC2","IN1"; + + cpudai: simple-audio-card,cpu { + sound-dai = <&sai5>; + dai-tdm-slot-num = <2>; + dai-tdm-slot-width = <32>; + }; + + simple-audio-card,codec { + sound-dai = <&max98090>; + clocks = <&clk IMX8MM_CLK_SAI5_ROOT>; + }; + }; +} + +&i2c3 { + max98090: audio-codec@10 { + compatible = "maxim,max98090","maxim,max98091"; + #sound-dai-ceddlls = <0>; + reg = <0x10>; + clocks = <&clk IMX8MM_CLK_SAI5_ROOT>; + clock-names = "mclk"; + }; +} + +&sai5 { + pinctrl-names = "default"; + pinctrl-0 = <&pinctrl_sai5>; + assigned-clocks = <&clk IMX8MM_CLK_SAI5>; + assigned-clock-parents = <&clk IMX8MM_AUDIO_PLL1_OUT>; + assigned-clock-rates = <24576000>; + clocks = <&clk IMX8MM_CLK_SAI5_IPG>, <&clk IMX8MM_CLK_DUMMY>, + <&clk IMX8MM_CLK_SAI5_ROOT>, <&clk IMX8MM_CLK_DUMMY>, + <&clk IMX8MM_CLK_DUMMY>, <&clk IMX8MM_AUDIO_PLL1_OUT>, + <&clk IMX8MM_AUDIO_PLL2_OUT>; + clock-names = "bus", "mclk0", "mclk1", "mclk2", "mclk3", "pll8k", "pll11k"; + status = "okay"; +}; + +&iomuxc { + pinctrl_sai5: sai5grp { + fsl,pins = < + MX8MM_IOMUXC_SAI5_MCLK_SAI5_MCLK 0xd6 + MX8MM_IOMUXC_SAI5_RXD2_SAI5_TX_BCLK 0xd6 + MX8MM_IOMUXC_SAI5_RXD1_SAI5_TX_SYNC 0xd6 + MX8MM_IOMUXC_SAI5_RXD0_SAI5_RX_DATA0 0xd6 + MX8MM_IOMUXC_SAI5_RXD3_SAI5_TX_DATA0 0xd6 + >; + } +}