27 Nov
2014
27 Nov
'14
6:42 p.m.
On Thu, Nov 27, 2014 at 01:01:59PM -0200, Fabio Estevam wrote:
From: Fabio Estevam fabio.estevam@freescale.com
According to the sgtl5000 datasheet the MCLK frequency range restriction of 8 to 27 MHz only applies when the PLL is used - synchronous SYS_MCLK input mode.
Applied all, thanks.