Hi Daniel,
On 04/04/2014 04:24 PM, Daniel Mack wrote:
Hi Peter,
On 04/04/2014 01:31 PM, Peter Ujfalusi wrote:
The bit clock polarity has been configured incorrectly in the McASP driver for a long time. IB_NF, NB_IF and IB_IF was not correct on the receive side since they were selecting the same edge as we used for the tx.
The driver only had support for DSP_B mode (and probably AC97, but I can not test that). All other formats were broken (DSP_A, I2S, LEFT_J, etc).
Well, we're using this driver in I2S mode for a number of devices since a while, so the above statement is not entirely true :)
True, you could select I2S and ask for inverted frame sync with the old code. However if you ask for DSP_A, LEFT_J, etc it was doing the wrong thing.
The cleanups look sane, though. I can test them on AM33xx based hardware early next week. If you don't want to hold them off until then, no problem. I can also send fixups in case I spot a regression.
That would be great if you could also test these. It seams you have quite good array of codecs available.
Out of interest: which hardware and which dai format are you testing this with?
I have one AM335x board, one AM437x and one DRA7 where I can test right now. I just go one OMAP-l138 board which I need to set up. It is good for legacy (non DT boot) debugging.
Thanks, Daniel