16 Jul
2015
16 Jul
'15
2:23 p.m.
On Wed, Jul 15, 2015 at 11:31:49AM -0500, timothyc.howe@gmail.com wrote:
+static int cs4349_runtime_suspend(struct device *dev) +{
- struct cs4349_private *cs4349 = dev_get_drvdata(dev);
- struct snd_soc_pcm_runtime *rtd = dev_get_drvdata(dev);
- int ret;
- ret = snd_soc_update_bits(rtd->codec, CS4349_MISC, PWR_DWN, 1);
- if (ret < 0)
return ret;- regcache_sync(cs4349->regmap);
- regcache_cache_only(cs4349->regmap, true);
- /* Hold down reset */
So, you've inverted the sync and the cache only here which means we're not going to try to do a sync while cached but we're still doing this immediately before we put the device in reset. Why are we syncing at all? Why would the device be out of sync with the cache and what is the expected result of syncing at this point? We're going to do a sync when we put the device back into write mode...