On Wed, Jan 05, 2011 at 03:27:17PM -0800, Stephen Warren wrote:
Mark Brown wrote:
No, I don't think this should be made visible to machine drivers at all
- they should just see a straight through mapping from the DMA channels
to the ports in the first instance.
Oh. So what should set up this 1:1 mapping then; what module should the DAS register writes be contained in? And later, what module should
I guess the I2S driver?
configure the DAS with the mux configuration that is appropriate for the board? It seems like the machine driver is the only place with the
My suggestion would only work for very simple boards like Harmony.
knowledge to define what the routing should be. Whether the machine driver calls tegra_das_* vs. some codec/mux API to set this up seems like a different issue to whether the machine driver or something else should contain this knowledge.
The end result would be that this would all be done in the application layer, potentially dynamically.
In the short-term, are you expecting the I2S driver to expose a CPU DAI for each audio controller and port? The number of audio controllers and ports isn't equal, and hence it wouldn't be possible to support a board using just port 5 since there's no controller 5 (and even audio controller 3 I think is SPDIF not I2S)...
Oh, hrm. That wasn't clear from your code. Would mapping controller n to port n work for Harmony?