The patch
ASoC: Intel: Skylake: Update DSP stall bits
has been applied to the asoc tree at
git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git
All being well this means that it will be integrated into the linux-next tree (usually sometime in the next 24 hours) and sent to Linus during the next merge window (or sooner if it is a bug fix), however if problems are discovered then the patch may be dropped or reverted.
You may get further e-mails resulting from automated or manual testing and review of the tree, please engage with people reporting problems and send followup patches addressing any issues that are reported if needed.
If any updates are required or you are submitting further changes they should be sent as incremental updates against current git, existing patches will not be replaced.
Please add any relevant lists and maintainers to the CCs when replying to this mail.
Thanks, Mark
From 2f74053bead3f47ddee219f521562db941ce0ae1 Mon Sep 17 00:00:00 2001
From: Jayachandran B jayachandran.b@intel.com Date: Mon, 13 Jun 2016 17:59:03 +0530 Subject: [PATCH] ASoC: Intel: Skylake: Update DSP stall bits
The stall bits needs to comprehend the number of DSP cores running, so update the stall and unstall register writes to comprehend SKL_DSP_CORES_MASK values as well.
Signed-off-by: Jayachandran B jayachandran.b@intel.com Signed-off-by: Ramesh Babu ramesh.babu@intel.com Signed-off-by: Vinod Koul vinod.koul@intel.com Signed-off-by: Mark Brown broonie@kernel.org --- sound/soc/intel/skylake/skl-sst-dsp.c | 11 +++++------ 1 file changed, 5 insertions(+), 6 deletions(-)
diff --git a/sound/soc/intel/skylake/skl-sst-dsp.c b/sound/soc/intel/skylake/skl-sst-dsp.c index 37b1d24a9a9d..33c45aa53532 100644 --- a/sound/soc/intel/skylake/skl-sst-dsp.c +++ b/sound/soc/intel/skylake/skl-sst-dsp.c @@ -106,9 +106,9 @@ static bool is_skl_dsp_core_enable(struct sst_dsp *ctx) static int skl_dsp_reset_core(struct sst_dsp *ctx) { /* stall core */ - sst_dsp_shim_write_unlocked(ctx, SKL_ADSP_REG_ADSPCS, - sst_dsp_shim_read_unlocked(ctx, SKL_ADSP_REG_ADSPCS) & - SKL_ADSPCS_CSTALL(SKL_DSP_CORES_MASK)); + sst_dsp_shim_update_bits_unlocked(ctx, SKL_ADSP_REG_ADSPCS, + SKL_ADSPCS_CSTALL_MASK, + SKL_ADSPCS_CSTALL(SKL_DSP_CORES_MASK));
/* set reset state */ return skl_dsp_core_set_reset_state(ctx); @@ -127,9 +127,8 @@ int skl_dsp_start_core(struct sst_dsp *ctx)
/* run core */ dev_dbg(ctx->dev, "run core...\n"); - sst_dsp_shim_write_unlocked(ctx, SKL_ADSP_REG_ADSPCS, - sst_dsp_shim_read_unlocked(ctx, SKL_ADSP_REG_ADSPCS) & - ~SKL_ADSPCS_CSTALL(SKL_DSP_CORES_MASK)); + sst_dsp_shim_update_bits_unlocked(ctx, SKL_ADSP_REG_ADSPCS, + SKL_ADSPCS_CSTALL_MASK, 0);
if (!is_skl_dsp_core_enable(ctx)) { skl_dsp_reset_core(ctx);