25 Feb
2014
25 Feb
'14
4:55 a.m.
On Tue, Feb 25, 2014 at 12:54:04AM -0300, Fabio Estevam wrote:
Hi Nicolin,
On Tue, Feb 25, 2014 at 12:46 AM, Nicolin Chen Guangyu.Chen@freescale.com wrote:
So register it from the ESAI driver then.
Then I think I need to find a way to pass the clock to CODEC driver...
Does this example from mxs-saif help?
Absolutely yes! Thank you in advance :)
commit 7c9e6150f2e7cbd60e0bc9a19118ca1dc97d2780 Author: Shawn Guo shawn.guo@linaro.org Date: Mon Jul 1 16:16:10 2013 +0800
ASoC: mxs: register saif mclk to clock framework Mostly the mxs system design uses saif0 mclk output as the clock source of codec. Since the mclk is implemented as a general divider with the saif clk as the parent clock, let's register the mclk as a basic clk-divider to common clock framework. Then with it being a clock provdier, clk_get() call in codec driver probe function will just work. Signed-off-by: Shawn Guo <shawn.guo@linaro.org> Signed-off-by: Mark Brown <broonie@linaro.org>