Hi,
On 02/15/11 01:33, ext ylin@mail.com wrote:
Some update: We peeked into the substream->dma_buffer.area, and found out the channels are already switched in DMA buffer. We are looking into McBSP2 and DMA to find some clues, but not familiar in these areas. Any suggestion how to further narrow down the problem?
Few more things: I suppose the twl4030 is the master on the bus (McBSP slave) Since you are using stereo capture, I assume the digital interface is in I2S mode.
I could think of three source for channel switch: 1. The switch happens within the twl4030 codec itself 2. Switch happens because of underflow situation in McBSP 3. Switch happens because of overflow situation in McBSP
To narrow down the problem: 1. You need tracepoints on you board for McBSP2 pins, and a scope You need to monitor the DX, and FS lines (bitclock might be useful as well). Keep the right channel disabled, and run your application, observe the DX/FS on the scope. When you notice the channel swap, check back on the scope, if the data moved from left to right channel.
2/3. This is a bit more trickier, but I have done this several times: You need to use the PRCM compliant interrupt configuration. Do not request the TX/RX (62, 63 for McBSP2) interrupts in omap_mcbsp_request, but request only the common IRQ (17 for McBSP2). Enable the ROVFLEN, RUNDFEN, and RSYNCERREN bits in IRQENABLE_REG. In the ir handler check for these enabled events (in IRQSTATUS_REG), and print out the reason for the event (Do not forget to write back the register content to IRQSTATUS_REG to ack the event).
I hope this helps narrowing down the problem.