On Wed, Apr 29, 2015 at 3:40 AM, Mark Brown broonie@kernel.org wrote:
On Tue, Apr 28, 2015 at 09:58:48PM -0700, Kevin Cernekee wrote:
On Sat, Apr 25, 2015 at 4:32 AM, Mark Brown broonie@kernel.org wrote:
What we should be doing here is providing a way for users to tell regmap if they've reset the register map and actually we already have that interface, it's just not got the best name - regcache_mark_dirty() is effectively it since there's really not a lot of other reasons why a driver would need to mark the cache as dirty. We're just not handling
- How do we tell the difference between "regcache contains a
non-default value that correctly reflects the hardware register contents" versus "regcache contains a non-default value that is waiting to be written when we exit cache_only mode"?
Like I said above we can tell if the hardware was reset because mark_dirty() is called.
That covers the public API, but I do not understand how you intended for this data to be stored in the rbtree if the use of a dirty bitmask is discouraged.
i.e. regcache_sync() finds a register value marked "present". How do we know whether we need to write it back to the hardware? For the special case of "cached non default register values immediately after a HW reset" you can mostly figure this out, but if there was no HW reset how do we know which entries changed while the HW was inaccessible?
I'm not suggesting that we do anything based on the presence of a cache entry, I'm suggesting that we could avoid having to ever cache values that never get referenced on a system (which can be a lot of them for common use cases) saving us memory.
This seems to be solving a different problem. It sounds like you are more worried about regcache_sync() writing back lots of default values for registers that were never touched, than performing unnecessary writes to a few (actively used) registers that weren't changed while we were in cache_only mode. Is that accurate?
FWIW, in the current iteration of the tas571x driver, there are few if any registers that meet this criteria.