On loongson controller, the value of WALLCLK register is always 0, which is meaningless, so we return directly.
Signed-off-by: Yanteng Si siyanteng@loongson.cn Signed-off-by: Yingkun Meng mengyingkun@loongson.cn --- sound/pci/hda/hda_intel.c | 3 +++ 1 file changed, 3 insertions(+)
diff --git a/sound/pci/hda/hda_intel.c b/sound/pci/hda/hda_intel.c index 0222a1721b4d..56b42d786c8b 100644 --- a/sound/pci/hda/hda_intel.c +++ b/sound/pci/hda/hda_intel.c @@ -655,6 +655,9 @@ static int azx_position_ok(struct azx *chip, struct azx_dev *azx_dev) unsigned int pos; snd_pcm_uframes_t hwptr, target;
+ if (chip->driver_type == AZX_DRIVER_LOONGSON) + return 1; + wallclk = azx_readl(chip, WALLCLK) - azx_dev->core.start_wallclk; if (wallclk < (azx_dev->core.period_wallclk * 2) / 3) return -1; /* bogus (too early) interrupt */