This reverts commit 2b5a30cafb2eff4e6a34bc80b1d16ed6ca5c2c71.
It came to our attention that the access to the EM2 register is restricted to the DSP side on MTL compared to prior platforms.
Writing to it from the host side has no effect (negative or positive), it is better to remove the code to not cause confusion and wrong impression.
Signed-off-by: Peter Ujfalusi peter.ujfalusi@linux.intel.com --- sound/soc/sof/intel/mtl.c | 3 --- sound/soc/sof/intel/mtl.h | 2 -- 2 files changed, 5 deletions(-)
diff --git a/sound/soc/sof/intel/mtl.c b/sound/soc/sof/intel/mtl.c index 216fd07a3a93..307faad2ecf4 100644 --- a/sound/soc/sof/intel/mtl.c +++ b/sound/soc/sof/intel/mtl.c @@ -280,9 +280,6 @@ static int mtl_dsp_post_fw_run(struct snd_sof_dev *sdev) }
hda_sdw_int_enable(sdev, true); - - /* enable DMI L1 */ - snd_sof_dsp_update_bits(sdev, HDA_DSP_HDA_BAR, MTL_EM2, MTL_EM2_L1SEN, MTL_EM2_L1SEN); return 0; }
diff --git a/sound/soc/sof/intel/mtl.h b/sound/soc/sof/intel/mtl.h index ddc05304a9d5..26418fb08807 100644 --- a/sound/soc/sof/intel/mtl.h +++ b/sound/soc/sof/intel/mtl.h @@ -28,8 +28,6 @@ #define MTL_HFINTIPPTR_PTR_MASK GENMASK(20, 0)
#define MTL_HDA_VS_D0I3C 0x1D4A -#define MTL_EM2 0x1c44 -#define MTL_EM2_L1SEN BIT(13)
#define MTL_DSP2CXCAP_PRIMARY_CORE 0x178D00 #define MTL_DSP2CXCTL_PRIMARY_CORE 0x178D04