On Thu, Oct 29, 2015 at 04:37:35PM +0100, Roberto Fichera wrote:
Regarding my SSI problem, I was able to keep the DMA working for few second once before it get stopped and never retriggered. Currently I've 2 DMA channel one for TX and another for rx
DMA only stops when getting terminate_all() executed or FIFO doesn't reach the watermark so that no newer DMA request would be issued.
I've changed my DTS and update my fsl_ssi to handle new clocks, I guess only the CLK_SPBA has improved my situation. I've also tried to enable both RIE and TIE to service the ISR, with
Guessing? It'd weird that SPBA would ease the issue here as I was told by the IC team that SSI and SAI in SoloX don't require SPBA clock IIRC.
and without SSI DMA support, but this end with a full system freeze. The ISR was never changed in my fsl_ssi.c.
You mentioned that clock status from the Codec chip shows the bit clock stops but now it's related to DMA? I think you should first figure out where the problem locates as Caleb's problem is different from yours.
As I mentioned, you may need to confirm that if the bit clock generation is stopped. DMA surely won't work when the bit clock ends as SSI may no longer consume the data FIFO so the watermark would never be reached again.
Nicolin