tree: https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git for-5.5 head: 1a476abc723e644248dba975b71122fcf878703b commit: 1a476abc723e644248dba975b71122fcf878703b [32/32] tas2770: add tas2770 smart PA kernel driver reproduce: # apt-get install sparse # sparse version: v0.6.1-rc1-37-gd466a02-dirty git checkout 1a476abc723e644248dba975b71122fcf878703b make ARCH=x86_64 allmodconfig make C=1 CF='-fdiagnostic-prefix -D__CHECK_ENDIAN__'
If you fix the issue, kindly add following tag Reported-by: kbuild test robot lkp@intel.com
sparse warnings: (new ones prefixed by >>)
sound/soc/codecs/tas2770.c:211:14: sparse: sparse: restricted snd_pcm_format_t degrades to integer
sound/soc/codecs/tas2770.c:218:14: sparse: sparse: restricted snd_pcm_format_t degrades to integer sound/soc/codecs/tas2770.c:225:14: sparse: sparse: restricted snd_pcm_format_t degrades to integer
sound/soc/codecs/tas2770.c:361:58: sparse: sparse: incorrect type in argument 2 (different base types) @@ expected int bitwidth @@ got restricted snd_pcm_formint bitwidth @@ sound/soc/codecs/tas2770.c:361:58: sparse: expected int bitwidth sound/soc/codecs/tas2770.c:361:58: sparse: got restricted snd_pcm_format_t
vim +211 sound/soc/codecs/tas2770.c
204 205 static int tas2770_set_bitwidth(struct tas2770_priv *tas2770, int bitwidth) 206 { 207 int ret; 208 struct snd_soc_component *component = tas2770->component; 209 210 switch (bitwidth) {
211 case SNDRV_PCM_FORMAT_S16_LE:
212 ret = snd_soc_component_update_bits(component, 213 TAS2770_TDM_CFG_REG2, 214 TAS2770_TDM_CFG_REG2_RXW_MASK, 215 TAS2770_TDM_CFG_REG2_RXW_16BITS); 216 tas2770->v_sense_slot = tas2770->i_sense_slot + 2; 217 break; 218 case SNDRV_PCM_FORMAT_S24_LE: 219 ret = snd_soc_component_update_bits(component, 220 TAS2770_TDM_CFG_REG2, 221 TAS2770_TDM_CFG_REG2_RXW_MASK, 222 TAS2770_TDM_CFG_REG2_RXW_24BITS); 223 tas2770->v_sense_slot = tas2770->i_sense_slot + 4; 224 break; 225 case SNDRV_PCM_FORMAT_S32_LE: 226 ret = snd_soc_component_update_bits(component, 227 TAS2770_TDM_CFG_REG2, 228 TAS2770_TDM_CFG_REG2_RXW_MASK, 229 TAS2770_TDM_CFG_REG2_RXW_32BITS); 230 tas2770->v_sense_slot = tas2770->i_sense_slot + 4; 231 break; 232 233 default: 234 return -EINVAL; 235 } 236 237 tas2770->channel_size = bitwidth; 238 239 ret = snd_soc_component_update_bits(component, 240 TAS2770_TDM_CFG_REG5, 241 TAS2770_TDM_CFG_REG5_VSNS_MASK | 242 TAS2770_TDM_CFG_REG5_50_MASK, 243 TAS2770_TDM_CFG_REG5_VSNS_ENABLE | 244 tas2770->v_sense_slot); 245 if (ret) 246 goto end; 247 ret = snd_soc_component_update_bits(component, 248 TAS2770_TDM_CFG_REG6, 249 TAS2770_TDM_CFG_REG6_ISNS_MASK | 250 TAS2770_TDM_CFG_REG6_50_MASK, 251 TAS2770_TDM_CFG_REG6_ISNS_ENABLE | 252 tas2770->i_sense_slot); 253 254 end: 255 return ret; 256 } 257 258 static int tas2770_set_samplerate(struct tas2770_priv *tas2770, int samplerate) 259 { 260 int ret; 261 struct snd_soc_component *component = tas2770->component; 262 263 switch (samplerate) { 264 case 48000: 265 ret = snd_soc_component_update_bits(component, 266 TAS2770_TDM_CFG_REG0, 267 TAS2770_TDM_CFG_REG0_SMP_MASK, 268 TAS2770_TDM_CFG_REG0_SMP_48KHZ); 269 if (ret) 270 goto end; 271 ret = snd_soc_component_update_bits(component, 272 TAS2770_TDM_CFG_REG0, 273 TAS2770_TDM_CFG_REG0_31_MASK, 274 TAS2770_TDM_CFG_REG0_31_44_1_48KHZ); 275 if (ret) 276 goto end; 277 break; 278 case 44100: 279 ret = snd_soc_component_update_bits(component, 280 TAS2770_TDM_CFG_REG0, 281 TAS2770_TDM_CFG_REG0_SMP_MASK, 282 TAS2770_TDM_CFG_REG0_SMP_44_1KHZ); 283 if (ret) 284 goto end; 285 ret = snd_soc_component_update_bits(component, 286 TAS2770_TDM_CFG_REG0, 287 TAS2770_TDM_CFG_REG0_31_MASK, 288 TAS2770_TDM_CFG_REG0_31_44_1_48KHZ); 289 if (ret) 290 goto end; 291 break; 292 case 96000: 293 ret = snd_soc_component_update_bits(component, 294 TAS2770_TDM_CFG_REG0, 295 TAS2770_TDM_CFG_REG0_SMP_MASK, 296 TAS2770_TDM_CFG_REG0_SMP_48KHZ); 297 if (ret) 298 goto end; 299 ret = snd_soc_component_update_bits(component, 300 TAS2770_TDM_CFG_REG0, 301 TAS2770_TDM_CFG_REG0_31_MASK, 302 TAS2770_TDM_CFG_REG0_31_88_2_96KHZ); 303 break; 304 case 88200: 305 ret = snd_soc_component_update_bits(component, 306 TAS2770_TDM_CFG_REG0, 307 TAS2770_TDM_CFG_REG0_SMP_MASK, 308 TAS2770_TDM_CFG_REG0_SMP_44_1KHZ); 309 if (ret) 310 goto end; 311 ret = snd_soc_component_update_bits(component, 312 TAS2770_TDM_CFG_REG0, 313 TAS2770_TDM_CFG_REG0_31_MASK, 314 TAS2770_TDM_CFG_REG0_31_88_2_96KHZ); 315 break; 316 case 19200: 317 ret = snd_soc_component_update_bits(component, 318 TAS2770_TDM_CFG_REG0, 319 TAS2770_TDM_CFG_REG0_SMP_MASK, 320 TAS2770_TDM_CFG_REG0_SMP_48KHZ); 321 if (ret) 322 goto end; 323 ret = snd_soc_component_update_bits(component, 324 TAS2770_TDM_CFG_REG0, 325 TAS2770_TDM_CFG_REG0_31_MASK, 326 TAS2770_TDM_CFG_REG0_31_176_4_192KHZ); 327 if (ret) 328 goto end; 329 break; 330 case 17640: 331 ret = snd_soc_component_update_bits(component, 332 TAS2770_TDM_CFG_REG0, 333 TAS2770_TDM_CFG_REG0_SMP_MASK, 334 TAS2770_TDM_CFG_REG0_SMP_44_1KHZ); 335 if (ret) 336 goto end; 337 ret = snd_soc_component_update_bits(component, 338 TAS2770_TDM_CFG_REG0, 339 TAS2770_TDM_CFG_REG0_31_MASK, 340 TAS2770_TDM_CFG_REG0_31_176_4_192KHZ); 341 break; 342 default: 343 ret = -EINVAL; 344 } 345 346 end: 347 if (!ret) 348 tas2770->sampling_rate = samplerate; 349 return ret; 350 } 351 352 static int tas2770_hw_params(struct snd_pcm_substream *substream, 353 struct snd_pcm_hw_params *params, 354 struct snd_soc_dai *dai) 355 { 356 struct snd_soc_component *component = dai->component; 357 struct tas2770_priv *tas2770 = 358 snd_soc_component_get_drvdata(component); 359 int ret; 360
361 ret = tas2770_set_bitwidth(tas2770, params_format(params));
362 if (ret < 0) 363 goto end; 364 365 366 ret = tas2770_set_samplerate(tas2770, params_rate(params)); 367 368 end: 369 return ret; 370 } 371
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