Howard Mitchell wrote;
If den=1 and pllin_rate>20MHz then den and num are adjusted to 0 causing a divide by zero error a few lines further on. Therefore this patch correctly scales num and den such that pllin_rate/den < 20MHz as required in the device data sheet.
Yep, the old code is plain broken and never actually ran, we have been using 16MHz pllin_rate, and I apparently never hit this code path.
Signed-off-by: Howard Mitchell hm@hmbedded.co.uk
Acked-by: Peter Rosin peda@axentia.se
Cheers, Peter
sound/soc/codecs/pcm512x.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/sound/soc/codecs/pcm512x.c b/sound/soc/codecs/pcm512x.c index 5301c4a..8472099 100644 --- a/sound/soc/codecs/pcm512x.c +++ b/sound/soc/codecs/pcm512x.c @@ -713,8 +713,8 @@ static int pcm512x_find_pll_coeff(struct snd_soc_dai *dai,
/* pllin_rate / P (or here, den) cannot be greater than 20 MHz */ if (pllin_rate / den > 20000000 && num < 8) {
num *= 20000000 / (pllin_rate / den);den *= 20000000 / (pllin_rate / den);
num *= DIV_ROUND_UP(pllin_rate / den, 20000000);den *= DIV_ROUND_UP(pllin_rate / den, 20000000);-- 1.7.9.5