Configure the WAKEUPEN register at the same time we configure the rest of the McBSP registers. In case of OMAP3+, if the sysclock has been reconfigured we are going to disable McBSP for the duration of the clock change, which will reset the McBSP registers. The WAKEUPEN register need to be configured later, so the changes will be effective during runtime.
Signed-off-by: Peter Ujfalusi peter.ujfalusi@ti.com --- sound/soc/omap/mcbsp.c | 7 +++---- 1 files changed, 3 insertions(+), 4 deletions(-)
diff --git a/sound/soc/omap/mcbsp.c b/sound/soc/omap/mcbsp.c index 5f6c21d..d716793 100644 --- a/sound/soc/omap/mcbsp.c +++ b/sound/soc/omap/mcbsp.c @@ -173,6 +173,9 @@ void omap_mcbsp_config(struct omap_mcbsp *mcbsp, MCBSP_WRITE(mcbsp, XCCR, config->xccr); MCBSP_WRITE(mcbsp, RCCR, config->rccr); } + /* Enable wakeup behavior */ + if (mcbsp->pdata->has_wakeup) + MCBSP_WRITE(mcbsp, WAKEUPEN, XRDYEN | RRDYEN); }
/** @@ -479,10 +482,6 @@ int omap_mcbsp_request(struct omap_mcbsp *mcbsp) if (mcbsp->pdata && mcbsp->pdata->ops && mcbsp->pdata->ops->request) mcbsp->pdata->ops->request(mcbsp->id - 1);
- /* Enable wakeup behavior */ - if (mcbsp->pdata->has_wakeup) - MCBSP_WRITE(mcbsp, WAKEUPEN, XRDYEN | RRDYEN); - /* * Make sure that transmitter, receiver and sample-rate generator are * not running before activating IRQs.