From: Luca Ceresoli luca.ceresoli@bootlin.com
These are I2S engines internally connected to the built-in audio codec.
Signed-off-by: Luca Ceresoli luca.ceresoli@bootlin.com --- arch/arm64/boot/dts/rockchip/rk3308.dtsi | 54 ++++++++++++++++++++++++ 1 file changed, 54 insertions(+)
diff --git a/arch/arm64/boot/dts/rockchip/rk3308.dtsi b/arch/arm64/boot/dts/rockchip/rk3308.dtsi index 2dfa67f1cd67..093b70563b23 100644 --- a/arch/arm64/boot/dts/rockchip/rk3308.dtsi +++ b/arch/arm64/boot/dts/rockchip/rk3308.dtsi @@ -571,6 +571,60 @@ dmac1: dma-controller@ff2d0000 { #dma-cells = <1>; };
+ /* + * - can be clock producer or consumer + * - up to 8 capture channels and 2 playback channels + * - connected internally to audio codec + */ + i2s_8ch_2: i2s@ff320000 { + compatible = "rockchip,rk3308-i2s-tdm"; + reg = <0x0 0xff320000 0x0 0x1000>; + interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "mclk_tx", "mclk_rx", "hclk", + "mclk_tx_src", "mclk_rx_src", + "mclk_root0", "mclk_root1"; + clocks = <&cru SCLK_I2S2_8CH_TX>, + <&cru SCLK_I2S2_8CH_RX>, + <&cru HCLK_I2S2_8CH>, + <&cru SCLK_I2S2_8CH_TX_SRC>, + <&cru SCLK_I2S2_8CH_RX_SRC>, + <&cru PLL_VPLL0>, + <&cru PLL_VPLL1>; + dmas = <&dmac1 5>, <&dmac1 4>; + dma-names = "rx", "tx"; + resets = <&cru SRST_I2S2_8CH_TX_M>, <&cru SRST_I2S2_8CH_RX_M>; + reset-names = "tx-m", "rx-m"; + rockchip,grf = <&grf>; + status = "disabled"; + }; + + /* + * - can be clock consumer only + * - up to 4 capture channels, no playback + * - connected internally to audio codec + */ + i2s_8ch_3: i2s@ff330000 { + compatible = "rockchip,rk3308-i2s-tdm"; + reg = <0x0 0xff330000 0x0 0x1000>; + interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>; + clock-names = "mclk_tx", "mclk_rx", "hclk", + "mclk_tx_src", "mclk_rx_src", + "mclk_root0", "mclk_root1"; + clocks = <&cru SCLK_I2S3_8CH_TX>, + <&cru SCLK_I2S3_8CH_RX>, + <&cru HCLK_I2S3_8CH>, + <&cru SCLK_I2S3_8CH_TX_SRC>, + <&cru SCLK_I2S3_8CH_RX_SRC>, + <&cru PLL_VPLL0>, + <&cru PLL_VPLL1>; + dmas = <&dmac1 7>; + dma-names = "rx"; + resets = <&cru SRST_I2S3_8CH_TX_M>, <&cru SRST_I2S3_8CH_RX_M>; + reset-names = "tx-m", "rx-m"; + rockchip,grf = <&grf>; + status = "disabled"; + }; + i2s_2ch_0: i2s@ff350000 { compatible = "rockchip,rk3308-i2s", "rockchip,rk3066-i2s"; reg = <0x0 0xff350000 0x0 0x1000>;