On Fri, Jul 31, 2015 at 07:27:19AM +0200, Markus Pargmann wrote:
Hi,
On Thu, Jul 30, 2015 at 04:34:19PM +0200, Maciej S. Szmigiero wrote:
AC'97 bus can support asymmetric playback/capture rates so enable them in this case in fsl_ssi driver.
Signed-off-by: Maciej Szmigiero mail@maciej.szmigiero.name
sound/soc/fsl/fsl_ssi.c | 4 +++- 1 files changed, 3 insertions(+), 1 deletions(-)
diff --git a/sound/soc/fsl/fsl_ssi.c b/sound/soc/fsl/fsl_ssi.c index a83b900..7f4f0b9 100644 --- a/sound/soc/fsl/fsl_ssi.c +++ b/sound/soc/fsl/fsl_ssi.c @@ -1377,7 +1377,9 @@ static int fsl_ssi_probe(struct platform_device *pdev)
/* Are the RX and the TX clocks locked? */ if (!of_find_property(np, "fsl,ssi-asynchronous", NULL)) {
ssi_private->cpu_dai_drv.symmetric_rates = 1;
if (!fsl_ssi_is_ac97(ssi_private))
ssi_private->cpu_dai_drv.symmetric_rates = 1;
Why don't you use the DT property that is parsed here to enable asymmetric rates?
Just found the last version of this series. Please use v2 and describe changes for a new iteration of a series.
There is also a different setup with AC97 which does not use DMA. See the long comment at the top of the file about how ac97 is already used.
Regards,
Markus