22 Feb
2023
22 Feb
'23
1:50 p.m.
On Wed, Feb 22, 2023 at 07:39:43PM +0800, Chancel Liu wrote:
This property specifies power up to audio out time. It's necessary beacause this device has to wait some time before ready to output audio after MCLK, BCLK and MUTE=1 are enabled. For more details about the timing constraints, please refer to WTN0302 on https://www.cirrus.com/products/wm8524/
According to that the delay is a property of MCLK and the sample rate rather than a per board constant, it shouldn't be in DT but rather the driver should figure out the required delay on each startup.