IIR fileter can remove DC offset. It must be enabled when dmic or amic connected to pmic is used.
Signed-off-by: Shunli Wang shunli.wang@mediatek.com --- v2: correct the commit message --- sound/soc/mediatek/mt8183/mt8183-dai-adda.c | 14 +++++++++++--- 1 file changed, 11 insertions(+), 3 deletions(-)
diff --git a/sound/soc/mediatek/mt8183/mt8183-dai-adda.c b/sound/soc/mediatek/mt8183/mt8183-dai-adda.c index 017d7d1d9148..2b758a18c2ea 100644 --- a/sound/soc/mediatek/mt8183/mt8183-dai-adda.c +++ b/sound/soc/mediatek/mt8183/mt8183-dai-adda.c @@ -176,9 +176,6 @@ static int mtk_adda_ul_event(struct snd_soc_dapm_widget *w, case SND_SOC_DAPM_POST_PMD: /* should delayed 1/fs(smallest is 8k) = 125us before afe off */ usleep_range(125, 135); - - /* reset dmic */ - afe_priv->mtkaif_dmic = 0; break; default: break; @@ -426,6 +423,17 @@ static int mtk_dai_adda_hw_params(struct snd_pcm_substream *substream,
ul_src_con0 |= (voice_mode << 17) & (0x7 << 17);
+ /* enable iir */ + ul_src_con0 |= (1 << UL_IIR_ON_TMP_CTL_SFT) & + UL_IIR_ON_TMP_CTL_MASK_SFT; + + /* 35Hz @ 48k */ + regmap_write(afe->regmap, AFE_ADDA_IIR_COEF_02_01, 0x00000000); + regmap_write(afe->regmap, AFE_ADDA_IIR_COEF_04_03, 0x00003FB8); + regmap_write(afe->regmap, AFE_ADDA_IIR_COEF_06_05, 0x3FB80000); + regmap_write(afe->regmap, AFE_ADDA_IIR_COEF_08_07, 0x3FB80000); + regmap_write(afe->regmap, AFE_ADDA_IIR_COEF_10_09, 0x0000C048); + regmap_write(afe->regmap, AFE_ADDA_UL_SRC_CON0, ul_src_con0);
/* mtkaif_rxif_data_mode = 0, amic */