On Fri, May 28, 2010 at 01:27:12PM +0100, Mark Brown wrote:
On Fri, May 28, 2010 at 12:06:25PM +1000, Stuart Longland wrote:
I have a userspace application that mmaps the registers for SSI2 and AUDMUX, and sets this up, so no big deal ... the clock it receives is about 12.1MHz (12.093MHz according to the frequency counter here).
In production this should be done in-kernel.
Indeed... I spent some of yesterday afternoon doing exactly this... which involved some hacking in arch/arm/mach-mx2/clocks_imx27.c... and a _very_ ugly hack to get at the SSI2 registers in my machine driver. It works, but with a few bugs, and will need a big cleanup before I can even consider putting it in mainline.
When I try to play audio; the AUDMUX configuration is as follows:
Port: imx-ssi.0 Raw: cb205000 TxFS output from SSI4, TxClk output from SSI4 Port is symmetric Data received from SSI4
Port: SSI4 Raw: 00001000 TxFS input, TxClk input Port is symmetric Data received from imx-ssi.0
This appears reasonable at first glance.
I'll have a look at the Eukrea CPUIMX27 and baseboard SoC support in a moment, since it looks very similar to what we're doing (in that it's a TI I²S CODEC hooked to an i.MX27 on SSI4) ... this might reveal clues as to what I'm doing wrong.
Have you also checked the pin mux configuration for the i.MX?
I'm not confident on how this is configured; but I have in an array; tx27_pins[] (defined in arch/arm/mach-mx2/mach-tx27.c):
/* SSI3 */ PC28_PF_SSI3_FS, PC29_PF_SSI3_RXD, PC30_PF_SSI3_TXD, PC31_PF_SSI3_CLK, /* SSI4 */ PC16_PF_SSI4_FS, PC17_PF_SSI4_RXD, PC18_PF_SSI4_TXD, PC19_PF_SSI4_CLK,
... which is later set up in tx27_board_init(): mxc_gpio_setup_multiple_pins(tx27_pins, ARRAY_SIZE(tx27_pins), "tx27");
This is what I've seen done on other boards (my mach-tx27.c is based on mach-mx27ads.c). Regards,