On Fri, Mar 02, 2012 at 05:16:04PM +0900, Tomoya MORINAGA wrote:
2012年3月1日8:51 Mark Brown broonie@opensource.wolfsonmicro.com:
+static int ml26124_set_dai_clkdiv(struct snd_soc_dai *codec_dai,
int div_id, int div)
+{
struct snd_soc_codec *codec = codec_dai->codec;
switch (div_id) {
case ML26124_MCLK:
ml26124_update_bits(codec, ML26124_CLK_CTL,
BIT(0) | BIT(1), div);
break;
Why can't the driver calculate this automatically given the MCLK?
Sorry, I can't understand your saying. Why does this driver need to calculate ? I think this driver can use "div" value directly.
Why does the user have to set this divider by hand at all? There's already a set_sysclk() function, just have the user specify the clock they're providing.
ret = snd_soc_codec_set_cache_io(codec, 8, 8, SND_SOC_I2C);
You're mixing regmap API usage and ASoC level I2C, this should be _REGMAP.
Currently, it seems codec control via i2c works well. Let me know why I should use SND_SOC_REGMAP not _I2C.
Have you checked what _I2C and _REGMAP do?
+static int __init ml26124_modinit(void) +{
int ret;
ret = i2c_add_driver(&ml26124_i2c_driver);
if (ret != 0)
module_i2c_driver().
Sorry, I can't understand your saying.
Use module_i2c_driver().