generates interrupt after it successfully finishes. This is really overhead, limiting and not really necessary unless we are doing something special.
We can simply read/write the fifo that should also give exactly what we need! This will also allow to read/write registers in interrupt context, which was not possible with the special command approach.
This is really unclear, sorry.
If read/writes are waiting for an interrupt, it becomes difficult to read or write to any registers from same interrupt handler!
Well, yes, you need to handle the complete() at a lower level than the code that initiates the transactions otherwise you self-deadlock.
IIRC in the Intel initial code, the complete was in the handler and the register IOs in the thread.
Yes, we did the same in previous version of the code, however with this patch reading/writing fifo directly without need of completion should remove that need of another thread!
Right, but you'll also write-off some command/control efficiency by either sleeping too much before checking the status, or sleeping too little and reading status from a transaction that's not finished.