On Thu, Oct 15, 2020 at 01:28:48PM +0800, Shengjiu Wang wrote:
On i.MX8QM, there are separate interrupts for TX and RX.
As the EDMA can't be configured to swing back to first FIFO after writing the second FIFO, so we need to force the burst size to be 2 on i.MX8QM. And EDMA don't support to shift the data from S24_LE to S16_LE, so the supported TX format is also different on i.MX8QM.
Signed-off-by: Shengjiu Wang shengjiu.wang@nxp.com
One small nit, yet I am okay if you don't resend. So:
Acked-by: Nicolin Chen nicoleotsuka@gmail.com
/* Check if clk is a root clock that does not share clock source with others */ @@ -1283,6 +1313,8 @@ static int fsl_spdif_probe(struct platform_device *pdev) /* Initialize this copy of the CPU DAI driver structure */ memcpy(&spdif_priv->cpu_dai_drv, &fsl_spdif_dai, sizeof(fsl_spdif_dai)); spdif_priv->cpu_dai_drv.name = dev_name(&pdev->dev);
- spdif_priv->cpu_dai_drv.playback.formats =
spdif_priv->soc->tx_formats;
Kernel no longer has strict 80-character limit now, and it seems to fits 80 characters?