From: Lee Jones lee.jones@linaro.org
Looks like these have been unchecked since the driver's inception in 2012.
Fixes the following W=1 kernel build warning(s):
sound/soc/ux500/ux500_msp_i2s.c: In function ‘flush_fifo_rx’: sound/soc/ux500/ux500_msp_i2s.c:398:6: warning: variable ‘reg_val_DR’ set but not used [-Wunused-but-set-variable] sound/soc/ux500/ux500_msp_i2s.c: In function ‘flush_fifo_tx’: sound/soc/ux500/ux500_msp_i2s.c:415:6: warning: variable ‘reg_val_TSTDR’ set but not used [-Wunused-but-set-variable]
Cc: zhong jiang zhongjiang@huawei.com Cc: Ola Lilja ola.o.lilja@stericsson.com Cc: Roger Nilsson roger.xr.nilsson@stericsson.com Cc: Sandeep Kaushik sandeep.kaushik@st.com Signed-off-by: Lee Jones lee.jones@linaro.org Signed-off-by: Pierre-Louis Bossart pierre-louis.bossart@linux.intel.com --- sound/soc/ux500/ux500_msp_i2s.c | 8 ++++---- 1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/sound/soc/ux500/ux500_msp_i2s.c b/sound/soc/ux500/ux500_msp_i2s.c index 394d8b2a4a16..fd0b88bb7921 100644 --- a/sound/soc/ux500/ux500_msp_i2s.c +++ b/sound/soc/ux500/ux500_msp_i2s.c @@ -395,7 +395,7 @@ static int enable_msp(struct ux500_msp *msp, struct ux500_msp_config *config)
static void flush_fifo_rx(struct ux500_msp *msp) { - u32 reg_val_DR, reg_val_GCR, reg_val_FLR; + u32 reg_val_GCR, reg_val_FLR; u32 limit = 32;
reg_val_GCR = readl(msp->registers + MSP_GCR); @@ -403,7 +403,7 @@ static void flush_fifo_rx(struct ux500_msp *msp)
reg_val_FLR = readl(msp->registers + MSP_FLR); while (!(reg_val_FLR & RX_FIFO_EMPTY) && limit--) { - reg_val_DR = readl(msp->registers + MSP_DR); + readl(msp->registers + MSP_DR); reg_val_FLR = readl(msp->registers + MSP_FLR); }
@@ -412,7 +412,7 @@ static void flush_fifo_rx(struct ux500_msp *msp)
static void flush_fifo_tx(struct ux500_msp *msp) { - u32 reg_val_TSTDR, reg_val_GCR, reg_val_FLR; + u32 reg_val_GCR, reg_val_FLR; u32 limit = 32;
reg_val_GCR = readl(msp->registers + MSP_GCR); @@ -421,7 +421,7 @@ static void flush_fifo_tx(struct ux500_msp *msp)
reg_val_FLR = readl(msp->registers + MSP_FLR); while (!(reg_val_FLR & TX_FIFO_EMPTY) && limit--) { - reg_val_TSTDR = readl(msp->registers + MSP_TSTDR); + readl(msp->registers + MSP_TSTDR); reg_val_FLR = readl(msp->registers + MSP_FLR); } writel(0x0, msp->registers + MSP_ITCR);