8 Apr
2014
8 Apr
'14
2:07 p.m.
On Fri, Apr 04, 2014 at 11:05:32AM +0100, Mark Brown wrote:
On Fri, Apr 04, 2014 at 03:09:47PM +0800, Nicolin Chen wrote:
The BCP bit in TCR4/RCR4 register rules as followings: 0 Bit clock is active high with drive outputs on rising edge and sample inputs on falling edge. 1 Bit clock is active low with drive outputs on falling edge and sample inputs on rising edge.
Applied, thanks.
Sir, I can't find this patch on any of the remote branches: for-next, topic/fsl-sai and fix/fsl-sai. Where could I find it?
Thank you, Nicolin