Sort main section properties, no functional change.
Signed-off-by: Marek Vasut marex@denx.de --- Cc: Fabio Estevam festevam@gmail.com Cc: Jaroslav Kysela perex@perex.cz Cc: Krzysztof Kozlowski krzysztof.kozlowski+dt@linaro.org Cc: Liam Girdwood lgirdwood@gmail.com Cc: Mark Brown broonie@kernel.org Cc: Nicolin Chen nicoleotsuka@gmail.com Cc: Rob Herring robh+dt@kernel.org Cc: Shengjiu Wang shengjiu.wang@gmail.com Cc: Takashi Iwai tiwai@suse.com Cc: Xiubo Li Xiubo.Lee@gmail.com Cc: alsa-devel@alsa-project.org To: devicetree@vger.kernel.org --- .../devicetree/bindings/sound/fsl,sai.yaml | 72 +++++++++---------- 1 file changed, 36 insertions(+), 36 deletions(-)
diff --git a/Documentation/devicetree/bindings/sound/fsl,sai.yaml b/Documentation/devicetree/bindings/sound/fsl,sai.yaml index 59a13cd0887e9..022da1f4583d6 100644 --- a/Documentation/devicetree/bindings/sound/fsl,sai.yaml +++ b/Documentation/devicetree/bindings/sound/fsl,sai.yaml @@ -43,16 +43,6 @@ properties: reg: maxItems: 1
- interrupts: - items: - - description: receive and transmit interrupt - - dmas: - maxItems: 2 - - dma-names: - maxItems: 2 - clocks: items: - description: The ipg clock for register access @@ -84,19 +74,37 @@ properties: - const: pll11k minItems: 4
- lsb-first: - description: | - Configures whether the LSB or the MSB is transmitted - first for the fifo data. If this property is absent, - the MSB is transmitted first as default, or the LSB - is transmitted first. - type: boolean + dmas: + maxItems: 2 + + dma-names: + maxItems: 2 + + interrupts: + items: + - description: receive and transmit interrupt
big-endian: description: | required if all the SAI registers are big-endian rather than little-endian. type: boolean
+ fsl,dataline: + $ref: /schemas/types.yaml#/definitions/uint32-matrix + description: | + Configure the dataline. It has 3 value for each configuration + maxItems: 16 + items: + items: + - description: format Default(0), I2S(1) or PDM(2) + enum: [0, 1, 2] + - description: dataline mask for 'rx' + - description: dataline mask for 'tx' + + fsl,sai-mclk-direction-output: + description: SAI will output the SAI MCLK clock. + type: boolean + fsl,sai-synchronous-rx: description: | SAI will work in the synchronous mode (sync Tx with Rx) which means @@ -115,26 +123,18 @@ properties: of transmitter. type: boolean
- fsl,dataline: - $ref: /schemas/types.yaml#/definitions/uint32-matrix - description: | - Configure the dataline. It has 3 value for each configuration - maxItems: 16 - items: - items: - - description: format Default(0), I2S(1) or PDM(2) - enum: [0, 1, 2] - - description: dataline mask for 'rx' - - description: dataline mask for 'tx' - - fsl,sai-mclk-direction-output: - description: SAI will output the SAI MCLK clock. - type: boolean - fsl,shared-interrupt: description: Interrupt is shared with other modules. type: boolean
+ lsb-first: + description: | + Configures whether the LSB or the MSB is transmitted + first for the fifo data. If this property is absent, + the MSB is transmitted first as default, or the LSB + is transmitted first. + type: boolean + "#sound-dai-cells": const: 0 description: optional, some dts node didn't add it. @@ -175,11 +175,11 @@ allOf: required: - compatible - reg - - interrupts - - dmas - - dma-names - clocks - clock-names + - dmas + - dma-names + - interrupts
additionalProperties: false