4 Jun
2014
4 Jun
'14
3:37 p.m.
On Wed, Jun 04, 2014 at 12:08:41PM +0000, Bard Liao wrote:
Kind of? It solves the cache sync case and if it's write only then we won't need to go to the register map for reads anyway (outside of interrupt handling and so on).
Does "write only regmap" mean read (almost) everything from cache? If so, we don't need to care about the asymmetry read/write issue. In that case, can we use regmap for mixer/mux controls just like other drivers do?
Yes, exactly - most things should be able to get away with only using the cache I'd expect.