On Tue, Mar 21, 2017 at 04:25:40PM +0200, Daniel Baluta wrote:
On Tue, Mar 21, 2017 at 4:20 PM, Charles Keepax ckeepax@opensource.wolfsonmicro.com wrote:
On Tue, Mar 21, 2017 at 04:05:15PM +0200, Daniel Baluta wrote:
On Tue, Mar 21, 2017 at 2:52 PM, Charles Keepax ckeepax@opensource.wolfsonmicro.com wrote:
On Tue, Mar 21, 2017 at 12:09:36PM +0200, Daniel Baluta wrote:
* use a marker to check if a match is found * didn't removed PLL as Charles suggested because there is a special PLL mode which explictly uses PLL. We could start a discussion on not using PLL when deriving bitclk, but this is to be done in another patch.Could you elaborate on this a little more am I not sure I follow 100%? There is a mode which explictly requires the PLL to be used (WM8960_SYSCLK_PLL) but in that case your wm8960_configure_sysclk code will not be called so I don't see what is causing that to have an effect on this patch?
My doubt is, what happens if wm8960_configure_clocking is called with wm8960->clk_id = WM8960_SYSCLK_PLL and we remove the PLL as suggested.
I wasn't suggesting removing the PLL just that if we find a "relaxed match" we don't need to then check the PLL for a better match, as I suspect that a slightly higher than needed bit clock has less power/performance impact than firing up the PLL.
Which removes the need to differenciate between a relaxed and bang on match in wm8960_configure_sysclk and means you don't have to do the caching the values across the PLL code that you do now.
Oh, I see. So we still use the PLL when no exact or relaxed match is found.
Yeah exactly or in the case that it is requested directly.
Thanks, Charles